JPH0815192B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0815192B2 JPH0815192B2 JP61006236A JP623686A JPH0815192B2 JP H0815192 B2 JPH0815192 B2 JP H0815192B2 JP 61006236 A JP61006236 A JP 61006236A JP 623686 A JP623686 A JP 623686A JP H0815192 B2 JPH0815192 B2 JP H0815192B2
- Authority
- JP
- Japan
- Prior art keywords
- outer lead
- semiconductor device
- lead
- envelope
- bent portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/424—Cross-sectional shapes
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 この発明は例えばDIP型ICのように外囲器からアウタ
リードを突出し、これに曲げ加工部を有する半導体装置
に適用されるものである。Description: TECHNICAL FIELD OF THE INVENTION The present invention is applied to a semiconductor device, such as a DIP type IC, having an outer lead protruding from an envelope and having a bent portion.
従来、一例の半導体装置でDIP型ICのように外囲器か
らアウタリードが突出し、これが中途に曲げ加工部を有
するものがある。このような構造のICは第2図に示され
るリードフレーム100によって以下に説明するように構
成される。すなわち、同図のリードフレーム100は両サ
イドのフレーム部101,101と、これらの間にリード状部1
02a,102aで架橋支持されたチップベッド102と、この外
側にこれとは離隔して放射状に延びるインナリード部10
3a,103a…およびこれらのインナリード部は外囲器の外
で二つ列に延びるアウタリード部103b,103b…からなる
リード部103,103…からなっている。そして、上記チッ
プベッド102に半導体チップがマウントされ、その電極
群が金属細線(半導体チップ,金属細線とも図示省略)
で対応するインナリード端に接続され、さらに、図中に
二点鎖線で示される域104に封止樹脂が施されて第3図
に示されるような外囲器105が形成される。また、第3
図に見られるように、外囲器105から突出したアウタリ
ード部103b,103b…はリードフレームから切離されると
ともに曲げ加工が施される。この曲げ加工はアウタリー
ドに大きな曲げ応力を加えるのみならず、アウタリード
を突出している外囲器の封止樹脂との界面の曲隙を増大
したり、封止樹脂へのダメージ例えばクラックや欠けを
発生させたりなどする。Conventionally, in one example of a semiconductor device, as in a DIP type IC, an outer lead protrudes from an envelope, and this has a bent portion in the middle. An IC having such a structure is constructed as described below by the lead frame 100 shown in FIG. That is, the lead frame 100 in the figure has frame portions 101, 101 on both sides and the lead-shaped portion 1 between them.
02a, 102a bridge supported by the chip bed 102, and the inner lead portion 10 extending radially outwardly from the chip bed 102 with a space therebetween.
3a, 103a ... And these inner lead parts are composed of outer lead parts 103b, 103b ... Lead parts 103, 103 ... That extend in two rows outside the envelope. Then, a semiconductor chip is mounted on the chip bed 102, and its electrode group has a thin metal wire (both semiconductor chip and thin metal wire are not shown).
Are connected to the corresponding inner lead ends, and a sealing resin is applied to a region 104 indicated by a chain double-dashed line in the figure to form an envelope 105 as shown in FIG. Also, the third
As shown in the figure, the outer lead portions 103b, 103b ... Projecting from the envelope 105 are cut from the lead frame and bent. This bending process not only applies a large bending stress to the outer lead, but also increases the bending gap at the interface between the outer lead protruding envelope and the sealing resin, and causes damage to the sealing resin such as cracks and chips. I will let you do it.
上記曲げ加工の応力を低減させるために従来、第3図
aに示すように、アウタリード部103b,103b…に透孔113
b,113b…を設け、あるいは第3図bに示すように、アウ
タリード部103b,103b…の側面に切欠123b,123b…を設け
るなどの手段が講ぜられていた。また、第4図に示すよ
うに曲げ加工部の内側主面に化学的エッチング、あるい
はプレスでのパンチング等を施して該部の板厚tをリー
ド部の板厚Tよりも低減させるなどの手段が講ぜられて
いた。In order to reduce the stress of the bending process, conventionally, as shown in FIG. 3a, the through holes 113 are formed in the outer lead portions 103b, 103b.
, b, 113b ... Or, as shown in FIG. 3b, means such as providing notches 123b, 123b ... on the side surfaces of the outer lead portions 103b, 103b. Further, as shown in FIG. 4, means such as chemical etching or punching with a press is applied to the inner main surface of the bent portion to reduce the plate thickness t of the bent portion from the plate thickness T of the lead portion. Was being offered.
上記従来の技術によると、アウタリードの曲げ加工時
の封止樹脂、封止樹脂とアウタリード曲界面における悪
影響は緩和されるが、加工後のアウタリードの強度に問
題がある。すなわち、製品の工程間の搬送、取扱工程、
検査工程等、さらには製品の使用者における使用後にリ
ードの変形を生じやすく、製品価値を著しく低下させる
重大な問題がある。According to the above-mentioned conventional technique, adverse effects on the sealing resin and the curved interface between the sealing resin and the outer lead when bending the outer lead are alleviated, but there is a problem in the strength of the outer lead after processing. In other words, transportation between product processes, handling processes,
There is a serious problem that the lead is apt to be deformed after use in the inspection process and further by the user of the product, and the product value is remarkably reduced.
この発明は上記従来の問題点に鑑みアウタリードの曲
げ加工部の構造に改良を施した半導体装置を提供する。The present invention provides a semiconductor device in which the structure of the bent portion of the outer lead is improved in view of the above conventional problems.
この発明の半導体装置は外囲器からアウタリードを突
出させこれに曲げ加工を施した半導体装置におけるアウ
ターリードの曲げ加工部の主面に、該アウターリードの
曲げ加工を容易ならしめるためにアウターリードに対し
その長手方向の複数溝を曲げ加工部主面に限り設けたこ
とを特徴とするものである。これにより、アウターリー
ドの曲げ加工時の曲げ応力を低減し、外囲器のリード封
着に係る問題を対策するとともにアウタリードの変形を
防止できる。In the semiconductor device of the present invention, the outer lead is protruded from the envelope and is bent on the main surface of the bent portion of the outer lead in the semiconductor device. On the other hand, a plurality of grooves in the longitudinal direction thereof are provided only on the main surface of the bent portion. Thereby, the bending stress at the time of bending the outer lead can be reduced, the problem relating to the lead sealing of the envelope can be prevented, and the deformation of the outer lead can be prevented.
以下、この発明の実施例につき第1図を参照して説明
する。なお、説明において従来と変わらない部分につい
ては図面に従来と同じ符号を付けて示し説明を省略す
る。An embodiment of the present invention will be described below with reference to FIG. In the description, parts that are the same as those in the related art are denoted by the same reference numerals as those in the related art and will not be described.
第1図aはDIP型ICのアウタリードの曲げ加工部の側
面図で、樹脂封止外囲器105の側面から突出したアウタ
ーリード11は一例としてその曲げ加工部の内側主面にこ
のアウタリードの長手方向に設けられた溝12を備える。
上記溝12はリードフレーム製造時に化学エッチング、あ
るいはプレス工程でパンチングを施して簡易に達成でき
る。そして溝の形状は第1図aのAA線に沿う断面で例示
する第1図c〜eの如く、三角溝12a,半だ円溝(半円
溝)12b,角溝12c等(いずれも複数溝)でよく、溝の深
さは半導体装置の品種,リードフレームの材質,設計等
に基づいて、また、溝の形状によって個々に設定してよ
いが約10〜40%の範囲で効果があり、かつ障害も伴わな
い。なお、上記溝は第1図aは曲げ加工部の内側主面に
設けた例であるが、外側主面に設けた第1図bの溝22の
如くしてもよく、また、この溝22の形状も上記第1図c
〜eに示されたものと同じでよい。FIG. 1a is a side view of the bent portion of the outer lead of the DIP type IC, and the outer lead 11 protruding from the side surface of the resin-sealed envelope 105 is, as an example, the inner main surface of the bent portion. The groove 12 is provided in the direction.
The groove 12 can be easily achieved by chemical etching at the time of manufacturing the lead frame or punching in a pressing process. The shapes of the grooves are triangular grooves 12a, semi-elliptical grooves (semi-circular grooves) 12b, square grooves 12c, etc. as shown in FIGS. Groove), and the depth of the groove may be set individually based on the type of semiconductor device, the material of the lead frame, the design, and the shape of the groove, but it is effective in the range of about 10-40%. And, there are no obstacles. Although FIG. 1A shows an example in which the groove is provided on the inner main surface of the bent portion, the groove may be similar to the groove 22 shown in FIG. 1B provided on the outer main surface. The shape is also shown in Fig. 1c above.
It may be the same as that shown in ~ e.
この発明はアウターリードに対しその長手方向の複数
溝を曲げ加工部主面に限り設けるもので、これにより曲
げ加工時におけるアウタリードに加わる曲げ応力が緩和
され、外囲器の封止樹脂、およびアウタリードと封止樹
脂との界面に対するダメージ、すなわち、封止樹脂の欠
け、クラックや封止樹脂との間隙発生などが防止でき、
また、アウタリードのフォーミング不良やリードの強度
不良、変形等が低減した。叙上により、半導体装置の品
質の向上と安定に著効を奏する。According to the present invention, a plurality of grooves in the longitudinal direction of the outer lead are provided only on the main surface of the bent portion, whereby the bending stress applied to the outer lead at the time of bending is relieved, and the sealing resin for the envelope and the outer lead. It is possible to prevent damage to the interface between the resin and the encapsulation resin, that is, to prevent chipping of the encapsulation resin, cracks, and gaps between the encapsulation resin,
In addition, defective forming of the outer leads, poor strength of the leads, deformation and the like were reduced. Due to the above, the quality of the semiconductor device is improved and the stability is significantly improved.
第1図はこの発明の半導体装置の実施例にかかり、第1
図aと第1図bは曲げ加工部の側面図、第1図c〜eは
いずれも溝の形状を示す断面図、第2図はリードフレー
ムの正面図、第3図a,bはいずれも従来の半導体装置の
斜視図、第4図は従来の半導体装置の曲げ加工部の側面
図である。 11……アウタリード 12,22……アウタリードの溝 12a,12b,12c……溝の形状FIG. 1 shows an embodiment of a semiconductor device according to the present invention.
1A and 1B are side views of the bent portion, FIGS. 1C to 1E are sectional views showing the shape of the groove, FIG. 2 is a front view of the lead frame, and FIGS. Is a perspective view of a conventional semiconductor device, and FIG. 4 is a side view of a bending portion of the conventional semiconductor device. 11 …… Outer lead 12,22 …… Outer lead groove 12a, 12b, 12c …… Groove shape
Claims (1)
加工の施された半導体装置において、アウターリードの
曲げ加工時の曲げ応力を低減させるためにアウターリー
ドに対しその長手方向の複数溝を曲げ加工部主面に限り
設けたことを特徴とする半導体装置。1. In a semiconductor device in which an outer lead protruding from an envelope is bent, a plurality of grooves in the longitudinal direction of the outer lead are bent to reduce bending stress when the outer lead is bent. A semiconductor device characterized in that it is provided only on the main surface of the processed portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61006236A JPH0815192B2 (en) | 1986-01-17 | 1986-01-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61006236A JPH0815192B2 (en) | 1986-01-17 | 1986-01-17 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62165348A JPS62165348A (en) | 1987-07-21 |
| JPH0815192B2 true JPH0815192B2 (en) | 1996-02-14 |
Family
ID=11632879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61006236A Expired - Lifetime JPH0815192B2 (en) | 1986-01-17 | 1986-01-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0815192B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6436058A (en) * | 1987-07-31 | 1989-02-07 | Kyushu Nippon Electric | Lead frame of semiconductor device |
| DE59005028D1 (en) * | 1990-06-30 | 1994-04-21 | Heidenhain Gmbh Dr Johannes | Solder connector and method of making an electrical circuit using this solder connector. |
| TW459357B (en) * | 1999-08-20 | 2001-10-11 | Rohm Co Ltd | Electronic part and method of fabricating thereof |
| JP2002033433A (en) * | 2000-07-13 | 2002-01-31 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| JP7504008B2 (en) | 2020-11-27 | 2024-06-21 | 三菱電機株式会社 | Semiconductor module and method for manufacturing the same |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6032350A (en) * | 1983-08-02 | 1985-02-19 | Nec Corp | Stacked package type semiconductor device |
-
1986
- 1986-01-17 JP JP61006236A patent/JPH0815192B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62165348A (en) | 1987-07-21 |
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