JPH0820465B2 - Electrical inspection method for semiconductor device - Google Patents
Electrical inspection method for semiconductor deviceInfo
- Publication number
- JPH0820465B2 JPH0820465B2 JP2173804A JP17380490A JPH0820465B2 JP H0820465 B2 JPH0820465 B2 JP H0820465B2 JP 2173804 A JP2173804 A JP 2173804A JP 17380490 A JP17380490 A JP 17380490A JP H0820465 B2 JPH0820465 B2 JP H0820465B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- electrodes
- electrode
- inspection
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】 (イ)産業上の利用分野 この発明は、半導体装置の検査方法に関し、詳しくは
突起電極を有するかもしくは電極上に導電性粒子が配置
された半導体装置の電気的検査における電極の取り出し
方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting a semiconductor device, and more specifically, an electrical inspection for a semiconductor device having a protruding electrode or having conductive particles arranged on the electrode. The method of taking out the electrode in.
(ロ)従来の技術 従来、半導体装置の電気的検査においては、金属製の
プローブを半導体装置の電極に順次圧し当てることによ
って電極の取り出しを行い、その電極に所定の入力信号
を与えることによって出力される信号を測定し、その半
導体装置の評価を行っていた。(B) Conventional technology In the conventional electrical inspection of semiconductor devices, electrodes are taken out by sequentially pressing a metal probe against the electrodes of the semiconductor device, and output by applying a predetermined input signal to the electrodes. The measured signal was measured and the semiconductor device was evaluated.
(ハ)発明が解決しようとする課題 しかしながら、従来のこのような方法で電極の取り出
しを行った場合、半導体装置の電極にプローブの接触に
よる損傷が発生する。この損傷は、たとえば特開昭62−
248229号に記載されているような突起電極を有する半導
体装置を圧接により他の基板に実装する場合に、接続部
を不安定にする傾向が見られる。また、特開平1−2274
44号に記載されている様な電極上に導電性粒子が配置さ
れた半導体装置に対して、上記の金属製のプローブを用
いて電気的検査を行うと、導電性粒子が損傷あるいは移
動するため、その後の実装時に接続不良が発生し易いと
いう問題があった。(C) Problems to be Solved by the Invention However, when the electrodes are taken out by such a conventional method, the electrodes of the semiconductor device are damaged by the contact of the probe. This damage is caused by, for example, Japanese Patent Laid-Open No. 62-
When a semiconductor device having a protruding electrode as described in Japanese Patent No. 248229 is mounted on another substrate by press contact, there is a tendency that the connection portion becomes unstable. In addition, JP-A 1-2274
When a semiconductor device with conductive particles arranged on the electrode as described in No. 44 is electrically inspected using the above metal probe, the conductive particles may be damaged or move. However, there is a problem that a defective connection is likely to occur during the subsequent mounting.
この発明はこのような事情を考慮してなされたもの
で、半導体装置の各電極に対応する検査用電極を備えた
基板を使用して半導体装置の電極を損傷させることなく
取り出すことが可能な半導体装置の電気的検査方法を提
供するものである。The present invention has been made in consideration of such circumstances, and a semiconductor that can be taken out without damaging the electrodes of the semiconductor device by using a substrate provided with inspection electrodes corresponding to the respective electrodes of the semiconductor device. An electrical inspection method for an apparatus is provided.
(ニ)課題を解決するための手段 この発明は、微小突起又は導電性粒子を備えた電極を
有する半導体装置の電気的試験方法において、半導体装
置の各電極に対応する位置に検査用電極を備えた硬質基
板を用いて、まず前記硬質基板の検査用電極に対して半
導体装置の電極を位置合わせし、次に半導体装置と前記
硬質基板とを互いに押圧することにより、半導体装置の
各電極の高さのばらつきを矯正し、かつ、半導体装置の
電極と検査用電極とを導通させることを特徴とする半導
体装置の電気的検査方法である。(D) Means for Solving the Problems The present invention provides an electrical testing method for a semiconductor device having electrodes provided with microscopic protrusions or conductive particles, and an inspection electrode is provided at a position corresponding to each electrode of the semiconductor device. Using the hard substrate, the electrodes of the semiconductor device are first aligned with the inspection electrodes of the hard substrate, and then the semiconductor device and the hard substrate are pressed against each other to increase the height of each electrode of the semiconductor device. Is a method for electrically inspecting a semiconductor device, wherein the variation in the thickness is corrected and the electrode of the semiconductor device and the inspection electrode are electrically connected.
(ホ)作用 基板と半導体装置とを互に押圧させると、検査用電極
は半導体装置の全電極に同時に接触する。従って、先端
の鋭利な金属製のプローブを使用しないので、半導体装
置の電極に損傷を与えることがない。さらに、半導体装
置の電極上に配置された導電性粒子を損傷させることが
なく、また、導電性粒子が移動することがない。(E) Action When the substrate and the semiconductor device are pressed against each other, the inspection electrodes simultaneously contact all the electrodes of the semiconductor device. Therefore, since a metal probe having a sharp tip is not used, the electrodes of the semiconductor device are not damaged. Furthermore, the conductive particles arranged on the electrodes of the semiconductor device are not damaged, and the conductive particles do not move.
(ヘ)実施例 以下、図面に示す実施例に基づいてこの発明を詳述す
る。これによって、この発明が限定されるものではな
い。(F) Embodiment Hereinafter, the present invention will be described in detail based on an embodiment shown in the drawings. This does not limit the present invention.
第1図はこの発明の一実施例を示す構成説明図であ
る。この図において、突起電極2が形成された半導体装
置1は、突起電極2と相対する位置に取り出し電極4が
形成された検査基板3に、位置合わせした状態で厚み方
向(矢印5の方向)に押え付けられる。この時、取り出
し電極4の一端は、半導体装置の突起電極2と接触して
電気的に接続され、取り出し電極4の他端は、半導体装
置の検査装置(図示せず)の出力端子に接続されること
により半導体装置2の電気的な検査が行われる。FIG. 1 is a structural explanatory view showing an embodiment of the present invention. In this figure, the semiconductor device 1 having the protruding electrodes 2 formed thereon is aligned in the thickness direction (direction of arrow 5) with the inspection substrate 3 having the extraction electrodes 4 formed at positions facing the protruding electrodes 2. It is held down. At this time, one end of the extraction electrode 4 is in contact with and electrically connected to the protruding electrode 2 of the semiconductor device, and the other end of the extraction electrode 4 is connected to the output terminal of the inspection device (not shown) of the semiconductor device. Thus, the semiconductor device 2 is electrically inspected.
第2図は、この発明の他の実施例を示す構成説明図で
ある。この実施例は、ウェハー状態の半導体装置の検査
を行う場合に好適に実施することができるもので、検査
基板としては台形状断面を有する基板6が使用される。
第3図は基板6の平面図である。第2図を参照して、基
板6は、1チップの電気的検査を行った後、ウェハーも
しくは基板6を1チップの距離だけ移動させることによ
り次のチップの検査が行えるため、連続的に効率良く検
査することができる。FIG. 2 is a structural explanatory view showing another embodiment of the present invention. This embodiment can be suitably carried out when inspecting a semiconductor device in a wafer state, and a substrate 6 having a trapezoidal cross section is used as an inspection substrate.
FIG. 3 is a plan view of the substrate 6. Referring to FIG. 2, the substrate 6 is electrically inspected for one chip, and then the next chip can be inspected by moving the wafer or the substrate 6 by a distance of one chip. Can be inspected well.
これらの実施例における取り出し電極4および7は、
W,Ni,Cu,Ag,Ti,Cr,Au等の金属およびこれら金属の合金
で、1層もしくは2層以上からなっている。また、接触
抵抗を下げるために表面をAuとすることも有効である。The extraction electrodes 4 and 7 in these examples are
Metals such as W, Ni, Cu, Ag, Ti, Cr, Au and alloys of these metals are formed of one layer or two or more layers. It is also effective to use Au on the surface to reduce the contact resistance.
検査基板3および6の材質としては、ガラス、セラミ
ック、ガラス−エポキシ、金属に絶縁材料を被覆したも
の等の硬質基板を使用することができる。この場合に
は、硬質基板によって、突起電極の高さのばらきつを矯
正することができる。また、基板3および6にゴム等の
弾性を有する基板を使用することもできる。弾性基板を
使用した場合、各取り出し電極は突起電極の高さのばら
つきに対しても追随することができるので、低荷重で確
実な検査が可能である。As a material for the inspection substrates 3 and 6, a hard substrate such as glass, ceramic, glass-epoxy, or metal coated with an insulating material can be used. In this case, the hard substrate can correct variations in the height of the protruding electrodes. Further, substrates having elasticity such as rubber can be used for the substrates 3 and 6. When an elastic substrate is used, each lead-out electrode can follow variations in height of the protruding electrode, so that reliable inspection can be performed with a low load.
以上、突起電極を有する半導体装置を検査する場合に
ついて述べたが、電極上に導電性粒子が配置された半導
体装置の検査についても、同様に検査することができる
ことは言うまでもない。Although the case of inspecting the semiconductor device having the protruding electrodes has been described above, it goes without saying that the same can be inspected in the case of the semiconductor device in which the conductive particles are arranged on the electrodes.
(ト)発明の効果 この発明によれば、半導体装置の電極に損傷を与える
ことを防止することができるため、電気的検査後に半導
体装置を他の基板に実装する場合に、安定な接続状態を
得ることができる。また、検査基板を用いて半導体基板
の電極を厚み方向に押え付けるため、たとえば、特開昭
62−248229号に開示されている方法で、半導体装置を他
の基板に接続する場合に、初期の電極の高さのばらつき
を矯正することができ、接続における安定性を向上する
ことができる。この場合、半導体装置の各電極は硬質基
板の検査用電極で同時に押圧されるので、高さの矯正時
に半導体装置の電極に与えるダメージが抑制される。(G) Effect of the Invention According to the present invention, it is possible to prevent the electrodes of the semiconductor device from being damaged. Therefore, when the semiconductor device is mounted on another substrate after the electrical inspection, a stable connection state can be obtained. Obtainable. Further, since the electrodes of the semiconductor substrate are pressed in the thickness direction by using the inspection substrate, for example, as disclosed in
With the method disclosed in 62-248229, when the semiconductor device is connected to another substrate, it is possible to correct the initial variation in the height of the electrode and improve the stability in the connection. In this case, since the electrodes of the semiconductor device are pressed simultaneously by the inspection electrodes of the hard substrate, damage to the electrodes of the semiconductor device at the time of height correction is suppressed.
第1図はこの発明の一実施例を説明するための構成説明
図、第2図はこの発明の他の実施例を示す第1図対応
図、第3図は第2図の要部を示す平面図である。 1……半導体装置、2……突起電極、3……検査基板、
4……取り出し電極。FIG. 1 is a structural explanatory view for explaining an embodiment of the present invention, FIG. 2 is a view corresponding to FIG. 1 showing another embodiment of the present invention, and FIG. 3 is a main part of FIG. It is a top view. 1 ... Semiconductor device, 2 ... Projection electrode, 3 ... Inspection substrate,
4 ... Take-out electrode.
Claims (1)
する半導体装置の電気的検査方法において、半導体装置
の各電極に対応する位置に検査用電極を備えた硬質基板
を用いて、まず前記硬質基板の検査用電極に対して半導
体装置の電極を位置合わせし、次に半導体装置と前記硬
質基板とを互いに押圧することにより、半導体装置の各
電極の高さのばらつきを矯正し、かつ、半導体装置の電
極と検査用電極とを導通させることを特徴とする半導体
装置の電気的検査方法。1. A method for electrically inspecting a semiconductor device having electrodes provided with fine protrusions or conductive particles, wherein a hard substrate provided with an inspection electrode at a position corresponding to each electrode of the semiconductor device is first used. The electrodes of the semiconductor device are aligned with respect to the inspection electrodes of the hard substrate, and then the semiconductor device and the hard substrate are pressed against each other to correct the height variation of each electrode of the semiconductor device, and, A method for electrically inspecting a semiconductor device, comprising electrically connecting an electrode of the semiconductor device and an electrode for inspection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2173804A JPH0820465B2 (en) | 1990-06-29 | 1990-06-29 | Electrical inspection method for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2173804A JPH0820465B2 (en) | 1990-06-29 | 1990-06-29 | Electrical inspection method for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0462479A JPH0462479A (en) | 1992-02-27 |
| JPH0820465B2 true JPH0820465B2 (en) | 1996-03-04 |
Family
ID=15967472
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2173804A Expired - Fee Related JPH0820465B2 (en) | 1990-06-29 | 1990-06-29 | Electrical inspection method for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0820465B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4917685A (en) * | 1972-06-05 | 1974-02-16 | ||
| JPS599934A (en) * | 1982-07-07 | 1984-01-19 | Nippon Denshi Zairyo Kk | Manufacture of probe card |
| JPS6447958A (en) * | 1987-08-19 | 1989-02-22 | Seiko Epson Corp | Contact probe |
-
1990
- 1990-06-29 JP JP2173804A patent/JPH0820465B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0462479A (en) | 1992-02-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |