JPH0823852B2 - Input/Output Processor - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to control information for each input/output device stored in a main memory, and in particular to a method for quickly utilizing such control information,
This relates to a method for replacing control information stored in a buffer memory of an input/output device.

(Prior Art) Conventionally, in an input/output processing device that transfers data between a main memory and an input/output device using control information stored in the main memory, the main memory is accessed to refer to/update the control information. In order to reduce the overhead caused by accessing the main memory, the input/output control device has a buffer memory for storing the control information inside, and the data transfer is controlled using the control information inside the buffer memory.

(Problem to be solved by the invention) In the above-mentioned conventional input/output processing device, when data is transferred between multiple input/output devices, control information for data transfer is loaded into each entry of the buffer memory and used. This eliminates the need to access the control information stored in the main memory each time data transfer is controlled.
High-speed data transfer can be controlled simply by accessing the buffer memory. However, such a buffer memory is expensive compared to the main memory, and the number of entries is generally smaller than the number of input/output devices.

For this reason, in order to load new control information when all entries in the buffer memory are in use, it is necessary to first save the control information of one of the entries in the main memory and then load it into the entry.

Each entry in such a buffer memory is usually used with the same weight, that is, the selection of an entry to be saved in the main memory is made among all the entries.
Therefore, in a buffer memory having such a configuration, the entries to be saved are selected regardless of the characteristics of the target I/O device, so when the above control information is required, it may not be present in the buffer memory and it may be necessary to reload it from the main memory, resulting in an increase in overhead.

The object of the present invention is to provide an input/output control device which is configured to eliminate the above-mentioned drawbacks by storing part or all of the control information in a buffer memory on an input/output device basis, and by providing a flag which indicates the type of control information in which the entry can be stored corresponding to each entry in the buffer memory, thereby making it possible to clearly classify the usage of each entry in the buffer memory and group them.

(Means for solving the problem) An input/output processing device according to the present invention comprises a transfer circuit for implementing data transfer between a plurality of input/output devices and a main memory in accordance with control information for each of the input/output devices stored in the main memory; buffer memory means for sequentially storing part or all of the control information for each of the input/output devices in units of the input/output devices; flag means for displaying a type of control information that can be stored in each of the entries in the buffer memory in order to clarify a usage classification of each entry of the buffer memory; and comparison means for comparing, when control information corresponding to an I/O device to which data is to be transferred by the transfer circuit is not present in the buffer memory means, an operation type of the I/O device to which data is to be transferred, sent from the transfer circuit, with each of the types of control information displayed by the flag means, and when the comparison means detects a match, the control information is read from the entry of the buffer memory corresponding to the type of control information displayed by the flag means and saved in the main memory, and the control information corresponding to the I/O device to which data is to be transferred by the transfer circuit is read from the main memory and stored in the entry of the buffer memory corresponding to the type of control information displayed by the flag means, and the stored control information is used for data transfer.

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an input/output processing device according to the present invention. In FIG. 1, 10 is a main memory;
20 is an input/output processing device, 30 is a transfer circuit, 40 is a buffer memory control circuit, 50 is a buffer memory, 60 is a flag, 70 is a comparator, 80 is a selector, 90 is a register, 100 is an adder, 11
1, 112 are input/output devices.

In FIG. 1, the main memory 10 holds transfer data and transfer programs for the input/output devices 111 and 112, and also holds first and second control information corresponding to the input/output devices 111 and 112.
and the input/output devices 111, 112, and a buffer memory control circuit 40 for managing control information during data transfer. In order to avoid complication, circuits that are not directly related to the present invention are omitted in Fig. 1.

The buffer control circuit 40 has a plurality of entries, each of which is a buffer memory 50 for holding control information corresponding to an active I/O device, and a buffer memory
a flag 60 for storing the type of control information that can be stored in each entry corresponding to each entry of the buffer memory 50; a register 90 for holding the addresses (entry numbers) of the buffer memory 50 and the flag 60; and an adder 100 for updating the contents of the register 90 so that it becomes the number of the next entry.
It is composed of a selector 80 for switching between the entry number indicated by the transfer circuit 30 and the entry number generated by the adder 100, and a comparator 70 for comparing the output of the flag 60 with the type of control information (type of operation) indicated by the transfer circuit 30.

Further, the transfer circuit 30 follows instructions of the transfer program stored in the main memory 10 and transfers data between the main memory and the corresponding input/output devices 111 and 112 using control information stored in the buffer memory 50 .

Here, the control information stored in the buffer memory 50 is
It is managed as shown in FIG.

(Effects of the Invention) As described above, the present invention has the effect of clarifying the usage classification of the buffer memory and improving the utilization efficiency of the buffer memory by providing a flag indicating the type of control information that can be stored in each entry of the buffer memory.

That is, the usage classification is clarified for each entry of the buffer memory, and according to the characteristics of the controlled I/O device,
By limiting the number of entries that can be used by each device, it is possible to prevent the buffer memory from being monopolized by some input/output devices and also to prevent necessary control information from being lost from the buffer memory, resulting in the effect of efficiently storing control information inside the buffer memory.

[Brief explanation of the drawings] Fig. 1 is a block diagram showing one embodiment of an input/output processing device according to the present invention. Fig. 2 is a flow chart showing the operation of the input/output processing device shown in Fig. 1. 10... main memory, 20... input/output processing device, 30... transfer circuit, 40... buffer memory control circuit, 50... buffer memory, 60... flag, 70... comparator, 80... selector, 90... register, 100... adder, 111, 112... input/output device

Claims (1)

[Claims] [Claim 1] An input/output processing device comprising: a transfer circuit for transferring data between a plurality of input/output devices and a main memory in accordance with control information for each of the input/output devices stored in the main memory; buffer memory means for sequentially storing part or all of the control information for each of the input/output devices on a unit basis of the input/output device; flag means for displaying the type of control information that can be stored in each entry of the buffer memory in order to clarify the classification of usage of each entry of the buffer memory; and comparison means for comparing, when control information corresponding to an I/O device to which data is to be transferred by the transfer circuit is not present in the buffer memory means, an operation type of the I/O device to which data is to be transferred, sent from the transfer circuit, with each of the types of control information displayed by the flag means, wherein, when the comparison means detects a match, the control information is read from the entry of the buffer memory corresponding to the type of control information displayed by the flag means and saved in the main memory, the control information corresponding to the I/O device to which data is to be transferred by the transfer circuit is read from the main memory and stored in the entry of the buffer memory corresponding to the type of control information displayed by the flag means, and the stored control information is used for data transfer.