JPH0827319B2 - Anti-phase detection circuit - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a three-phase alternating current anti-phase detection circuit.

(Prior art and its problems) For example, when a three-phase AC power supply is connected to a three-phase induction motor, if the power supply is erroneously connected, the motor may reverse and cause serious trouble. Therefore, in order to prevent such a power supply connection error, a three-phase alternating current anti-phase detection circuit is used. FIG. 7 shows an example in which the antiphase detection circuit is used to prevent the reverse rotation of the three-phase induction motor as described above. Each phase R, S, T of the three-phase AC is connected to a three-phase induction motor M via an electromagnetic contactor L. The anti-phase detection circuit 10 is provided in parallel with the power input terminal of the three-phase induction motor M.

 FIG. 8 shows the configuration of such an anti-phase detection circuit 10.

The R phase is connected to the LED anode terminal side and the S phase is connected to the cathode terminal side of one photocoupler PC1. The S phase is connected to the LED anode terminal side and the T phase is connected to the cathode terminal side of the other photocoupler PC2. The transistor output of the photocoupler PC1 is the D flip-flop F.
Transistor output of photo coupler PC2 is D terminal to F terminal
It is given to the clock terminals of the flip-flops FF, respectively. In the figure, R1 to R4 are resistors for controlling current, and D1 and D2 are diodes for limiting input voltage.

Next, the operation of the anti-phase detection circuit having the above configuration will be described with reference to FIGS. 9 and 10.

Fig. 9 shows the operation waveforms of each part when the S-T phase voltage is in the advanced state with respect to the R-S phase voltage (that is, the positive phase state), and Fig. 10 shows that the three-phase AC power supply is reversed. The operation waveform of each part when it is connected and the RS phase voltage is in the advanced state with respect to the S-T phase voltage (it is in an antiphase state) is shown.

First, in the positive phase state, RS shown in FIG.
By inputting the phase voltage a to the photocoupler PC1, the photocoupler PC1 outputs the phase signal c as shown in FIG. 9 (c). On the other hand, when the ST phase voltage b shown in FIG. 9 (b) is input to the photocoupler PC2, the phase signals c and 120 are output from the photocoupler PC2 as shown in FIG. 9 (d). A phase signal d having a phase difference of ° is output. Since the phase signal c is at the "H" level at the fall of the phase signal d, the Q output e of the D flip-flop FF at this time becomes the "H" level (Fig. 9 (e)).
reference). That is, when the three-phase alternating current is in the positive phase, the D flip-flop FF outputs the "H" level.

On the other hand, the waveforms of the RS phase voltage and the ST phase voltage in the antiphase state are shown in FIGS. 10 (a) and 10 (b). At this time, the phase relationship between the phase signals c and d is as shown in FIG.
As shown in (d), the phase relationship in the normal phase state is opposite. That is, when the phase signal d falls, the phase signal c is at "L" level, so the Q output e of the D flip-flop FF becomes "L" level.

In this way, it can be determined from the state of the D flip-flop FF whether or not the three-phase AC power supply is correctly connected to the three-phase induction motor M.

However, although the conventional anti-phase detection circuit is effective in determining the positive phase / anti-phase of the three-phase alternating current, for example, one of the contacts of the electromagnetic connector L shown in FIG. 7 causes a contact failure,
Even if an accident occurs in which the three-phase induction motor M is stopped due to a so-called open-phase state, there is a problem that the open-phase state cannot be detected. For example, when the R phase is missing, the phase signal c is always at "H" level. Therefore, the "H" level is output from the D flip-flop FF, and it is erroneously determined that the three-phase AC power supply is normally connected.

(Object of the Invention) The present invention has been made in view of such circumstances, and an object of the present invention is to provide a anti-phase detection circuit capable of not only anti-phase detection but also open-phase detection. .

(Structure and Effect of the Invention) [Structure] The present invention has the following structure in order to achieve such an object.

That is, the anti-phase detection circuit according to the present invention includes the first phase detection means and the second phase detection means as means for detecting the phases of the two line voltages of the three-phase AC input. The first phase signal from the first phase detecting means is applied as a clock pulse to the flip-flop circuit that latches the set voltage. The second phase signal from the second phase detecting means is given to the reset signal generating means. The reset signal generating means creates a reset signal based on delaying the second phase signal by the mono-multivibrator, and the reset signal causes the operation of the flip-flop circuit at antiphase input and phase loss. Reset it.

[Action]

When the three-phase AC input is a positive-phase input, the flip-flop is operated by the first phase signal, the set voltage is latched, and the output is inverted. On the other hand, when the three-phase AC input is in the opposite phase, the flip-flop circuit is reset by the reset signal and remains in the initial state. When a phase loss occurs such that one of the line voltages becomes zero volt, the first phase signal is not output or the reset signal resets the flip-flop circuit.
The flip-flop circuit remains in the initial state. When the open phase occurs such that the line voltages have the same phase, the reset signal generating means delays the second phase signal, so that there is a phase difference between the first phase signal and the second phase signal. Occurs,
Based on this, the reset signal is output to reset the flip-flop circuit and maintain its initial state.

〔effect〕

From the above, according to the present invention, not only the anti-phase detection of the three-phase AC input but also the open phase detection can be performed.

(Description of Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram of an anti-phase detection circuit according to an embodiment of the present invention.

In the figure, the same reference numerals as those in FIG.

The photocoupler PC1 and the like constitute first phase detecting means for detecting the phase of the RS phase voltage a. The photocoupler PC2 and the like constitute second phase detecting means for detecting the phase of the ST phase voltage b. Such phase detecting means is not limited to the photocoupler, and may be configured by using, for example, a transformer and a waveform shaper.

The output of the photocoupler PC1 is given to the clock pulse input terminal ck of the flip-flop circuit FF1 via the inverter G1. The flip-flop circuit FF1 is a D-flip-flop, and the voltage + V is set to its D terminal. Hereinafter, the output of the inverter G1 will be referred to as the phase signal c.

On the other hand, the output of the photocoupler PC2 is given to the A terminal of the monomultivibrator M1 via the inverter G2.
The mono multivibrator M1 realizes a delay function included in the reset signal generating means. The delay time is set to 1/3 or less of the 3-phase AC input cycle (60Hz). In this embodiment, according to the time constant of the resistor R5 and the capacitor C1,
It is set to about 4m sec. Hereinafter, the output of the inverter G2 will be referred to as the phase signal d.

The output e of the mono multivibrator M1 is given to the clock pulse input terminal ck of the flip-flop circuit FF2. The flip-flop circuit FF2 is a D-flip-flop circuit, and the voltage + V is set to its D terminal. The phase signal d is the above-mentioned mono multivibrator M1.
And the reset terminal R of the flip-flop circuit FF2 via the inverter G3. The output e of the flip-flop circuit FF2 is given to the reset terminal R of the flip-flop circuit FF1.

The Q output of the flip-flop circuit FF1 is given to the A terminal of the retriggerable monomultivibrator M2. The pulse width of the retriggerable mono multivibrator M2 is set to be one cycle or more of the three-phase AC input. In this embodiment, the time constant of the resistor R6 and the capacitor C2 is about 1
It is set to 00msec. The Q output of the retriggerable mono multivibrator M2 is a detection output for determining the positive phase, antiphase, and open phase of the three-phase AC input.

Next, the operation of the embodiment having the above configuration will be described with reference to FIG.
This will be described with reference to FIG.

In the case of positive phase input When the three-phase AC input is in positive phase (in the present embodiment, S-
When the T-phase voltage is in the advanced phase with respect to the R-S phase voltage), the R-S phase voltage a is shown in Fig. 2 (a), the S-T phase voltage b is shown in Fig. 2 (b), The phase relationships are as shown. Therefore, the phase signal d shown in FIG.
Has a phase of the phase signal c shown in FIG. 2 (c).
The waveform is advanced by 120 degrees. By applying the phase signal d to the mono multivibrator M1, the output e of the mono multivibrator M1 becomes a pulse delayed by about 4 msec from the rising of the phase signal d as shown in FIG. 2 (e). This output e is given to the flip-flop circuit FF2, so that the flip-flop circuit F
F2 is triggered by the rising edge of the output e and latches the voltage + V.

On the other hand, the phase signal d is inverted by the inverter G3,
The signal f shown in FIG. 6F is given to the flip-flop circuit FF2. As a result, the flip-flop circuit FF2 is reset by the signal f, and its output (reset signal g) becomes as shown in FIG. 2 (g).

By the way, the flip-flop circuit FF1 outputs the phase signal c
Is input, the voltage + V is latched and then reset by the rising edge of the reset signal g. Therefore, the Q output h of the flip-flop circuit FF1 is the second
The pulse becomes a pulse synchronized with the phase signal c as shown in FIG. When this Q output h is input to the retriggerable mono multivibrator M2, as described above, the pulse width of the retriggerable mono multivibrator M2 is set to one cycle or more of the three-phase AC input. The detection output i) becomes "H" level as shown in FIG. 2 (i). In this way, when the three-phase AC input is the positive phase input, the detection output i becomes "H" level.

In the case of antiphase input The operation waveforms of the respective parts in this case are shown in FIGS. 3 (a) to (i). As is clear from FIGS. 7C and 7D, the phase of the phase signal c is the phase signal d at the antiphase input.
120 degrees ahead of. Therefore, the reset signal g is at the “H” level at the rising of the phase signal c. Therefore, since the flip-flop circuit FF1 does not latch the voltage + V even if the phase signal c is input,
The detection output i maintains the "L" level. Thus, in the case of antiphase input, the detection output i becomes "L" level.

In the case of T-phase open phase The operation waveforms of each part in this case are shown in FIGS. 4 (a) to (i). In the case of the T phase open phase, the S-T phase voltage b becomes zero volts as shown in FIG.
Also remains at the “L” level as shown in FIG.
Therefore, the reset signal g, which is the output of the flip-flop circuit FF2, becomes "H" level as shown in (g) of the figure, and the state in which the flip-flop circuit FF1 is reset continues. Therefore, the Q output of the flip-flop circuit FF1 remains at the "L" level as shown in FIG. 6H, and the detection output i becomes the "L" level as shown in FIG. As described above, in the case of the T-phase open phase, the detection output i becomes the “L” level.

In the case of R-phase open phase The operation waveforms of each part in this case are shown in FIGS. 5 (a) to (i). In the case of the R-phase open phase, the R-S phase voltage a becomes zero volt as shown in FIG. 7A, so the phase signal c also remains at the “L” level as shown in FIG. . Therefore, since the flip-flop circuit FF1 does not latch the voltage + V, its Q output h
Becomes "L" level, and the detection output i also becomes "L" level as shown in FIG. In this way, in the case of the R-phase open phase, the detection output i becomes the “L” level.

In the case of S phase open phase The operation waveforms of the respective parts in this case are shown in FIGS. 6 (a) to (i). In the case of the S-phase open phase, a current flows between the T-R phases, so that the RS phase voltage a and the S-T phase voltage b are almost in phase, as shown in FIGS. Therefore, the phase signals c and d are almost in phase as shown in FIGS. From this, it is understood that the detection output cannot be obtained by simply inputting the phase signals c and d into the flip-flop circuit FF as in the conventional circuit shown in FIG. In the present embodiment, the reason why the mono-multivibrator M1 is provided to delay the phase signal d is to enable the open phase detection of the S phase.

That is, since the phase signal d is delayed by the mono-multivibrator M1, the falling timing of the reset signal g is higher than the rising timing of the phase signal d, as shown in FIG. Is delayed by the delay time of. Therefore, when the phase signal c rises, the reset signal g is at "H" level,
That is, since the flip-flop circuit FF1 is in the reset state, its Q output h becomes the "L" level as shown in FIG. 9H, and the detection output i also becomes "L" as shown in FIG. Become a level. Thus, even in the case of S-phase open phase,
The detection output i becomes "L" level.

As described above, the detection output i is "H" in the case of the positive phase input.
The detected output i is "L" when the phase is opposite or open.
According to this embodiment, not only the anti-phase of the three-phase AC input but also the open phase can be detected because the level is reached.

In the above embodiment, the positive phase, the antiphase, and the open phase are detected by the output of the retriggerable mono multivibrator M2, but as is clear from the above description,
Since the determination can be made also by the output of the flip-flop circuit FF1, the retriggerable mono multivibrator M2 is not always required in the present invention.

Further, in the above-described embodiment, the case where the ST phase voltage is in the advanced phase with respect to the RS phase voltage is the positive phase input,
The opposite state is assumed to be antiphase input, but this is RS
The case where the phase voltage is in the advanced phase with respect to the ST phase voltage may be regarded as the positive phase input, and the opposite state may be defined as the antiphase input.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an anti-phase detection circuit according to an embodiment of the present invention, FIG. 2 is an operation waveform diagram of each part of the above-mentioned embodiment at the time of positive phase input, and FIG. 3 is an anti-phase input. 4 is an operation waveform diagram of each part of the above-described embodiment, FIG. 4 is an operation waveform diagram of each part of the above-described embodiment at T phase open phase, and FIG. FIG. 6 is an operation waveform diagram of each part of the embodiment when the S phase is open, FIG. 7 is an explanatory diagram showing a usage state of the anti-phase detection circuit according to the conventional example and the embodiment, and FIG. Is a circuit diagram showing the configuration of the conventional example, FIG. 9 is an operation waveform diagram of each part of the conventional example at the time of positive phase input, and FIG. 10 is an operation waveform diagram of each part of the conventional example at the time of reverse phase input. . PC1, PC2 ... Photo coupler, FF1, FF2 ... Flip-flop circuit, M1 ... Mono multivibrator, M2 ... Retriggerable mono multivibrator.

Claims (1)

[Claims] 1. A first phase detecting means for detecting a phase of a first line voltage of a three-phase AC input, and a second phase for detecting a phase of a second line voltage of the three-phase AC input. Detecting means, a flip-flop circuit for latching a set voltage by being supplied with the first phase signal from the first phase detecting means as a clock pulse, and a second phase from the second phase detecting means. A mono-multivibrator for delaying the signal, and a reset signal generating means for resetting the operation of the flip-flop at the antiphase input and the phase loss by a reset signal obtained by the mono-multivibrator. Anti-phase detection circuit.