JPH0827664B2 - Power supply detection circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply detection circuit, and more particularly, to a load that includes a regulated direct current power supply that outputs a relatively high level direct current high voltage and a relatively low level direct current low voltage. The present invention relates to a power supply detection circuit that detects a time in a specified output state in which power is supplied with a high voltage and a low voltage that are equal to or higher than a specified value.

Conventional background As a DC power supply for an electronic control device, a relatively high voltage + 24V constant voltage is supplied to the main circuit of the control device, and a low voltage + 5V constant voltage is supplied to the peripheral digital IC (integrated circuit) and the like. There is something.

Generally, both output voltages of this type of DC power supply have different rising and falling depending on the capacitance component of the applied load impedance. Therefore, when the DC power supply is turned on and + 24V is applied to the arithmetic processing circuit of the main circuit of the electronic control unit to start a predetermined control sequence, the peripheral digital
There is a risk that the low voltage applied to the IC will not rise to the specified + 5V and the control device will malfunction.

On the other hand, conventionally, for example, a power supply detection circuit 5 for generating a power supply detection signal (5) indicating a power supply state as shown by the one-dot chain line in FIG. 1 is known.

In FIG. 1, a relatively high voltage + 24V for the main circuit of the electronic control unit (not shown) is supplied to the output terminal T ₃₁ from the commercial AC power source 1 via the power switch 2, the rectifier 3 and the series regulator 4 to another output terminal. Low voltage + 5V for digital IC (not shown) is output to T ₃₂ .

The power supply detection circuit 5 includes a transformer 6 connected to the AC power supply 1, a rectifier 7 connected to the secondary side output terminal of the transformer 6, voltage comparators 8-1 to 8-3, and a capacitor (C).
And a resistor (R). A digital IC in which the low-voltage output voltage of the DC power supply device is applied to one input terminal of each of the voltage comparators 8-1 to 8-3, while the time constant of the CR circuit 9 is connected to the low-voltage output terminal T _32.
It is appropriately set in consideration of the load impedance such as. With this configuration, when the DC power supply device is turned on, the output terminal T ₅ of the power supply detection circuit 5 outputs a power supply detection signal indicating whether or not a voltage of about +5 V that is higher than the specified level is output to the output terminal T _32. ▲ ▼ is output.

By the way, according to the conventional type power supply detection circuit 5,
Power supply detection signal that indicates a period during which a predetermined low-voltage output voltage (+ 5V) is substantially output, that is, a period during which approximately + 5V above the specified level is output excluding the rising and falling transition periods of the low-voltage output. However, this power supply detection circuit 5 has drawbacks in that the structure is very complicated, large, and the manufacturing cost is high.

In addition, the power supply detection signal ▲ ▼ is a high voltage output (+24
V) only indicates whether the DC power supply is ON or OFF, and it is unknown whether a high voltage output above the specified level is output to the output terminal T _31. In the case of an electronic control device including the above, there is a high risk of malfunction, which is inconvenient.

The present invention has been made in view of the above problems, and in detecting the output state of a DC power source that applies two types of DC constant voltages of relatively high voltage and low voltage to a load, a voltage divider and a first A binarization signal indicating whether the voltage output is above a predetermined level is obtained by using the one voltage comparator, and a binarization signal indicating whether the low voltage output is above the predetermined level is obtained by using the second voltage comparator. By obtaining a signal and connecting the output terminals of the first and second voltage comparators to make a wired logic determination of the outputs from these voltage comparators, both output voltages of the DC power supply are substantially defined. To provide a power supply detection circuit having a simple configuration, a small size, and a low manufacturing cost, which generates a binarized power supply state detection signal indicating a time when power is being supplied to a load with an output voltage equal to or higher than a value. To aim.

The present invention will be described below with reference to the accompanying drawings showing one embodiment.

Embodiment 2 FIG. 2 shows a power supply detection circuit 10 according to an embodiment of the present invention.

It should be noted that, to the _two input terminals T ₁ and T ₂ of the power supply detection circuit 10, a relatively high voltage output (+ 24V) of a DC power supply device (not shown) and the high voltage output are passed through a well-known 3-terminal regulator (not shown). The transformed low voltage output (+ 5V) is applied.

In FIG. 2, reference numeral 11 denotes a voltage dividing variable resistor connected between the input terminal T ₁ and the ground, and a high voltage output to be detected is set to a voltage suitable for comparison and discrimination by a first voltage comparator 12 described later. Partial pressure.

Reference numeral 12 is a first voltage comparator configured by using an operational amplifier. The positive input terminal of the first voltage comparator 12 is connected to the variable resistor 11 via the resistor R ₁ and the comparator 12
While connecting to the output terminal of and through the resistor R ₂ for positive feedback,
The negative input terminal is the input terminal T ₁ and the resistor R ₃ connected to ground.
And a Zener diode 13 are connected to a connection point 14 to form a so-called Schmitt circuit. With this configuration, when the high-voltage output to be detected input to the positive input terminal is equal to or lower than the reference voltage or the first PF (power failure) detection level that is predetermined by the Zener diode 13 in consideration of the specified voltage of the high-voltage output, the signal " While outputting "H", when the reference voltage is exceeded, an inverted signal "L" is output. The first voltage comparator 12
Immediately after the output of is switched, the original state is maintained even if it fluctuates within the hysteresis width of the Schmitt trigger level defined by the resistors R ₁ and R ₂ . For example, now
Even if the detected high voltage output exceeds the reference voltage and the output switches from “H” to “L”, and immediately after that the detected voltage decreases within the hysteresis width, the output of the voltage comparator 12 is “L”. "Hold on. On the contrary, when switching from “L” to “H”, the output of the voltage comparator 12 is “H” if the increase of the detection signal is within the range of the hysteresis width as described above. "Hold on. In this way,
The vibration of the discrimination signal of the first voltage comparator 12 based on the fluctuation of the detected voltage, that is, the so-called chattering phenomenon is effectively suppressed.

Reference numeral 15 is a second voltage comparator using a system reset IC (integrated circuit). Hereinafter, this second voltage comparator 15 is referred to as a reset IC. This reset IC 15 is, as shown in FIG.
It is composed of a resistor R ₅ , a constant voltage diode 17, and transistors 18 and 19. The detection voltage of the low-voltage output (+ 5V) is input to the input terminal 16 of the reset IC 15, and the detection voltage is adjusted by the constant-voltage diode 17 to a predetermined reference voltage or the second PF (power failure). )
When it is below the detection level, transistor 18
Is turned off, the transistor 19 is turned on, and therefore the output terminal 20 is set to "L", while the transistor 18 is turned on when the detection voltage exceeds the reference voltage (second PF level).
Is turned on and the transistor 19 is turned off, so that the output terminal 20 is switched to "H".

The output terminal of the first voltage comparator 12 and the output terminal 20 of the reset IC 15 are connected via a lead wire, and the output terminal T _{3 at} this connection point connects the output of the first voltage comparator 12 and the output of the reset IC 15. Form wired and logic circuits. With this configuration, the result of the AND logic determination of the output of the first voltage comparator 12 and the output of the reset IC 15 is output to the output terminal T ₃ . When the output of the output terminal T ₃ is "H", the output of the first voltage comparator 12 and the reset IC15 are both "H", thus the high voltage output and the low voltage output are both predetermined level (first and 2PF It is above the level) and is in the state where the specified voltage + 24V and + 5V is substantially supplied to each load.

Reference numeral 25 is a third voltage comparator using an operational amplifier. The positive input terminal of the third voltage comparator 25 is a resistor R ₇ connected between the low voltage side input terminal T _{2 of the} power supply detection circuit 10 and the ground.
The negative input terminal is connected to the connection point 26 of R ₈ , while the negative input terminal is connected to the output terminal of the first voltage comparator 12. With this configuration, a PF signal that is substantially the above signal ▲ ▼ is output to the output terminal T ₄ of the power supply detection circuit 10 connected to the output terminal of the third voltage comparator 25.

Next, the operation of the power supply detection circuit 10 having the above configuration will be described with reference to the output voltage waveform diagram in FIG.

Now, a DC power source (not shown) is turned on, and a relatively high voltage (+ 24V) constant voltage output is output from the DC power source to a main circuit of an electronic control unit (not shown) with a built-in microcomputer.
Low voltage (+
5V) constant voltage output is supplied. At this point
Denote by t ₀ .

The low voltage output is such that the high voltage output is output via a known three-terminal regulator (not shown).

The high voltage output of the DC power supply, that is, the voltage applied to the input terminal T ₁ of the power supply detection circuit 10 is shown in FIG. 4 (a), while the low voltage output, that is, the voltage applied to the input terminal T ₂ of the power supply detection circuit 10 is shown. The voltage is shown in Fig. 4 (e).

A predetermined first PF detection in which a detection signal representing a high voltage output input from the input terminal T ₁ to the positive input terminal of the first voltage comparator 12 via the variable resistor 11 and the resistor R ₁ is determined by the constant voltage diode 13 When the level (determined in consideration of a voltage slightly lower than + 24V) is exceeded, the output of the first voltage comparator 12 becomes "H" as shown in FIG. 4 (d). This is indicated by t ₁ .

On the other hand, at time t ₁ , the detection voltage of the low voltage output applied to the input terminal 16 of the reset IC 15 is a predetermined reference level determined by the constant voltage diode 17 (at the second PF detection level, a voltage slightly lower than the specified output voltage + 5V). (Determined according to the above), the transistor 18 of the reset IC 15 is turned off and the transistor 19 of the reset IC 15 is turned on. Therefore, the output of the reset IC 15 is “L” as shown in FIG. 4 (f). To be done.

After that, when the low voltage output exceeds the second reference voltage or the second PF detection level, the transistor 18 of the reset IC 15 is turned on and the transistor 19 of the reset IC 15 is turned off.
Output becomes "H". This time point is indicated by t ₂ .

At time t ₂ , the output “H” of the first comparator 12 and reset
The output of IC15 "H" is wired and logically determined,
As a result, as shown in FIG. 4 (g), the output PF of the output terminal T ₃ is to "H".

When the DC stabilized power supply is turned off at time t ₃ ,
The drop in the high voltage output at the input terminal T ₂ begins and then
The detection voltage of the high voltage output when falls below the first reference level or the 1PF detection level at time t _4, the output of the first comparator 12 switches to "L".

On the other hand, at time t ₄ , as shown in FIG.
When the detection voltage of the low voltage output is equal to or higher than the second reference level or the second PF detection level, the transistor 18 of the reset IC 15 is turned on, the transistor 19 is turned off, and the output of the reset IC 15 is set to "H". Therefore, the output “L” of the first voltage comparator 12 and the output “H” of the reset IC 15 are wired and logically determined, and the output signal PF of the output terminal T ₃ is switched to “L”.

Then, at time t ₅ , when the low voltage output at the input terminal T ₂ falls below the second reference voltage, the output of the reset IC 15 switches to "L" as shown in FIG. 4 (f).

As described above, if the power supply detection signal PF of the output terminal T ₃ is “H”, it indicates that both the high voltage output and the low voltage output from the DC stabilized power supply are in the specified voltage output state. If either one of them is not in the specified voltage output state, the power supply detection signal PF is set to "L".

It should be noted that, by the third voltage comparator 25 of the power supply detection circuit 10, a detection signal indicating a power supply output state, which is roughly the above PF signal, is inverted.
PF is obtained, and this signal PF is shown in FIG. 4 (h).

The power supply detection signal ▲ ▼ is used, for example, for resetting the central processing circuit of the electronic control device, protecting the memory circuit of the device, or instructing the power failure state of the power supply, and the signal ▲
By using ▼ for the reset of the central processing circuit or the battery backup command, the malfunction of the electronic control device can be effectively suppressed to the minimum.

5 (a) to 5 (h) show the output voltage waveforms at the respective components of the power supply detection circuit 10 in the case of a so-called light capacitive load in which the low-voltage load of the DC power source has a small capacitance component. The operation of the power supply detection circuit 10 in this case is performed in the same manner as in the case of the heavy capacitive load described above, and the description thereof will be omitted.

Effect As described above, according to the present invention, whether one high voltage output from the DC stabilized power supply is equal to or higher than the specified voltage level by the first voltage logic determination circuit configured by the voltage divider and the voltage comparator. It is logically determined whether or not the other low-voltage output of the DC power supply is higher than a specified voltage level by the second voltage logic determination circuit, and both outputs of the first and second voltage logic determination circuits are wired. Logic decision is made to detect the time when both outputs of the DC power supply are in the specified output state, so there is no need for many voltage comparators, CR delay circuits, etc. as in the conventional type power supply detection circuit. The structure can be very simple and compact.

By using the Schmitt circuit as the first voltage comparator, it is possible to effectively prevent chattering of the detection result based on the fluctuation of the detection signal, and to ensure proper power supply from the DC power supply to the load.

[Brief description of drawings]

FIG. 1 is a conventional DC power supply detection circuit diagram, FIG. 2 is a DC power supply detection circuit diagram according to the present invention, and FIG.
The detailed circuit diagram of the reset IC of the second voltage comparator applicable to the power supply detection circuit of FIG. 4, FIG. 4 and FIG. 5 are each of the power supply detection circuit of FIG. 2 during power supply to heavy and light capacitive loads, respectively. It is an output voltage waveform diagram of a component. 5 ... Conventional feed detection circuit, 10 ... Feed detection circuit of the present invention, 11 ... Variable resistor, 12 ... First voltage comparator, 13 ...
1st PF detection level setting zener diode, 15 …… Reset IC (second voltage comparator), 17 …… 2nd PF detection level setting zener diode, T ₁ …… High voltage input terminal, T ₂ …… Low voltage input terminal , T ₃₁ , T ₃₂ …
... Power supply detection signal output terminal.

Claims (2)

[Claims] 1. A power supply detection circuit for detecting a power supply state to a load by a stabilized DC power supply which outputs a relatively high specified DC high voltage and a relatively low specified DC low voltage. It includes a voltage dividing means for receiving a high voltage output and converting the voltage level of the high voltage output into a level substantially equal to the specified DC low voltage, and the output voltage of the voltage dividing means is set in consideration of the specified DC high voltage. And a first voltage logic judging means for logically judging whether or not the first voltage reference level is exceeded and outputting a binary logic judgment signal, and a low voltage output from the DC stabilized power supply, and the low voltage output is A second voltage logic judging means for logically judging whether or not a second voltage reference level defined in consideration of the specified DC low voltage is exceeded and outputting a binary logic judgment signal; and the first and second embodiments. Voltage logic judgment means Formed by direct member electrically connected directly between the output terminals, the first and second
The specified output state timing in which both of the binary logic judgment signals output from the voltage logic judgment means are received to make a wired logic judgment, and the DC stabilized power supply supplies power to the load with a high voltage and a constant voltage both higher than a specified value A power supply detection circuit, comprising: a wired logic determination means for outputting the binary logic determination signal shown. 2. The power supply detection circuit according to claim 1, wherein the first voltage logic determination means is configured by using a Schmitt trigger circuit.