JPH0828758B2 - Line monitoring method - Google Patents

Description

The present invention relates to a line monitoring system using a flag idle in a data link line using HDLC, and a line fault occurs in a data link line using HDLC even when frame transfer is not performed. And the line status detection unit that periodically detects the data reception status of the data communication circuit for the purpose of detecting recovery, and the length of the data in the received frame exceeds a predetermined length. A long frame detection section for detecting the error count and an error counter for counting the number of line errors. The line state detection section adds or subtracts the error counter according to the detection result from the long frame detection section, and the value of the error counter When the threshold value exceeds a predetermined threshold value, a line failure condition is set, and the value of the error counter becomes 0. Configured to the line recovery state when Tsu.

[Industrial applications]

The present invention relates to a line monitoring system in a data communication system, and more particularly to a line monitoring system using flag idle in a data link line using HDLC.

[Conventional technology]

The HDLC method, which has been used as a digital data communication method from the past, can transmit arbitrary bit patterns.
This method is suitable for computer communication that requires high-speed data transfer with high reliability because of its features such as continuous data transfer and strict error detection. On the other hand, in this HDLC method, apart from sending data error detection, error frames such as FCS error, byte error, and ABORT are received in order to detect a line failure, and the number of times exceeds a certain threshold value. Alternatively, when a line is in a dormant state for a certain time or longer, it is detected as a line failure.

Further, the detection of recovery of a line that has fallen into a failure state determines that the line has recovered when the elapsed time after the line has come out of the dormant state exceeds a certain value.

[Problems to be Solved by the Invention]

However, in such a conventional method, when the line receiving the frame data has a failure, the frame cannot be terminated and the failure cannot be detected. In other words, there is a problem that a failure cannot be detected except for a frame discarding in which all the data bits in the frame are 1 and an FCS error which is a flag pattern at a position where the data is incorrect. Therefore, when the intra-frame data being received exceeds the predetermined length, by detecting this frame as an error frame, it is possible to detect the line fault during the intra-frame data reception.

The present invention, in a data link line using HDLC,
The purpose is to detect line failure and recovery even when frame transfer is not performed.

[Means for solving the problem]

 FIG. 1 is a block diagram of the present invention.

The line status detector 1 determines whether the flag
Any one of four line states of an idle state, a normal frame receiving state, a mark idle state, and a flag search state is detected. The long frame detection unit 2 detects that the length of the data in the received frame exceeds a predetermined length, that is, it is a long frame. The error counter 3 is incremented when the detection result of the line state detection unit 1 is the mark idle state or the flag search state and when the long frame detection unit 2 detects a long frame.

[Action]

In Fig. 1, the line state detection unit 1 does not indicate the mark / idle state when 15 or more "1" bits are consecutive from the bit pattern of the data sent from the line, or other than normal frame reception. Look for flags in
When the search state is detected, the error counter 3 is added. On the other hand, the error counter is cleared to zero when the normal frame is received and when the flag is in the idle state where the flag is continuously transmitted on the line.

Next, while the normal frame is being received, if the long frame detection unit 2 exceeds the predetermined length, the error counter 3 is incremented.

In this way, the line state is periodically monitored by the line state detection unit 1 and the long frame detection unit 2, and when the value of the error counter 3 exceeds a predetermined threshold value, the line state is detected. It is determined that a failure has occurred.

When the flag / idle reception state is detected by the line state detection unit 1 from the data on the line in the fault state, and the long frame state is not detected by the long frame detection unit 2, and the line state is detected. The error counter 3 is decremented in two cases in which the normal reception state of the frame is detected by the detection unit 1.
Then, when the value of the error counter falls below 0, it is determined that the line failure is recovered and the recovery state is entered.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a functional block diagram in one embodiment of the present invention. Further, in HDLC, all information is transmitted in units of frames, and FIG. 3 is a block diagram of this frame. The configuration of this embodiment will be described below with reference to FIG. 2 while referring to the frame configuration diagram. Line data
The line state detection unit A11 that has received 10 detects some line states defined by HDLC. First, the frame reception starts by detecting the flag 20 having the bit pattern "01111110" from the line data. The line state detection unit A11 extracts the address 21 of the received frame and determines whether the data is for its own station. If the data is for its own station, the control unit 22, the information unit 23, the FCS 24, and the flag 25 indicating the end of the frame are continuously extracted. Depending on the status of the received data, mark idle, byte error, abort status and FCS for error detection of the received data are detected, and each status is transmitted as a detection signal 13 to the line status detection unit B14, and the frame is detected. The received data included in the above is transmitted to the line state detecting unit B as the received data 12. The line state detecting unit A11 also performs a flag search if a failure occurs during frame reception.

In the line state detection unit B14 that has received the reception data 12 and the detection signal 13, the normal data reception is detected, the flag idle is detected in a continuous flag reception state for indicating transmission suspension, and the line state detection unit A11 detects F
CRC calculation is performed from the CS block to detect a CRC error. In the above-described error frame reception state detected by the mark idle, flag search, byte error and CRC error detected by the line state detecting unit A11 and the line state detecting unit B14, the value of the error counter is added.

Next, the long frame detection unit 16 that has received the data reception signal 15 from the line state detection unit B14 counts the length of the received frame, and if it exceeds a predetermined length, detects it as a long frame. Also in this case, the value of the error counter is added.

FIG. 4 is a flow chart showing an operation of detecting a fault condition in the embodiment of the present invention. First, the line state detection units A11 and B14 and the long frame detection unit 16 detect the line state (S1).

Next, an operation for detecting a failure state is performed according to the detected state. An error counter is added (S5) in the mark idle state in which 15 or more consecutive "1" bits are consecutive or in the flag search state (S2). If not, abort or
It is determined whether the frame is an error frame causing an FCS error (S3). If it is an error frame, the error counter addition processing is performed (S5), and if it is not an error frame, it is determined whether or not it is a long frame (S5).
Four). If it is a long frame, the error counter addition processing is performed (S5). If it is not a long frame, it is determined that the normal frame is being received and the error counter is cleared to zero (S6). Further, after performing the error counter addition, the predetermined threshold value is compared with the predetermined error counter (S7). The line is monitored because the line status continues.

As described above, the fault state detection processing shown in FIG. 4 continues monitoring by detecting the state of the line at regular time intervals.

FIG. 5 shows an operation for detecting that the line which has fallen into the failure state returns to the recovery state. First,
Similar to the operation of detecting the fault condition, the line condition is detected at regular time intervals (S11). As a result, in the flag detection state or in the normal frame reception state which is not a long frame (S12), the error counter is decremented (S
13). If it is any other state, the value of the error counter is compared with the threshold value (S14), and if it is larger than the threshold value, it is determined that the fault state continues.

Error counter subtraction due to the normal frame reception (S1
As a result of 3), when it becomes 0 (S15), it is determined that the line has returned to the recovery state, and if not, the line is continuously monitored as a failure state.

〔The invention's effect〕

According to the present invention, it becomes possible to detect a line failure in frame reception, which is impossible with the conventional technology. In the conventional technique, a failure in which all the bits become "1" during frame reception can be detected as a mark idle or an abort, whereas according to the method of the present invention, any bit due to a line failure is detected. A pattern can also be detected by detecting it as a long frame. As a result, highly reliable communication using the HDLC procedure can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a functional block diagram in the embodiment of the present invention, FIG. 3 is a frame configuration diagram of HDLC in the embodiment of the present invention, and FIG. 5 is a flowchart for detecting a recovery state in the embodiment, FIG. 6 is a flowchart for detecting a failure state in the prior art, and FIG. 7 is a flowchart for detecting a recovery state in the prior art. . 1 ... Line status detection unit, 2 ... Long frame detection unit, 3 ... Error counter.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Misase Shimazu 3-9-18 Shin-Yokohama, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Fujitsu First Communication Software Co., Ltd. (72) Inventor Nao Koga Shin-Yokohama, Yokohama-shi, Kanagawa Prefecture 3-9-18 Fujitsu First Communication Software Limited (72) Inventor Takashi Sugino 3-9-18 Shin-Yokohama, Kohoku Ward, Yokohama City, Kanagawa Prefecture 3-918 Fujitsu First Communication Software Limited (72) Inventor Yoshiyuki Inami Kanagawa 3-9-18 Shin-Yokohama, Kohoku-ku, Yokohama-shi, Japan, within Fujitsu Daiichi Communication Software Co., Ltd. (56) References JP-A-52-130653 (JP, A) JP-A-55-933 (JP, A)

Claims (3)

[Claims] 1. A line for monitoring a data reception state of a data communication circuit at a predetermined cycle to detect a line state of any one of a flag idle state, a normal frame reception state, a mark idle state and a flag search state. A state detection unit (1), a long frame detection unit (2) for detecting that the length of data in the received frame exceeds a predetermined length, the line state detection unit or the long frame detection unit. An error counter (3) for adding or subtracting according to the detection result from at least one of the parts, and when the value of the error counter (3) exceeds a predetermined threshold value, a line fault condition is set, and the error A line monitoring method characterized in that a line recovery state is set when the counter value reaches 0. 2. The error counter is detected when the line state detecting unit detects that the line state is a mark idle state or a flag search state while a fault state is being detected, or when an error frame is received. The line monitoring system according to claim 1, wherein the error counter is decremented when a flag idle state is detected while the recovery state is being detected. 3. The long frame detector counts the number of bits of data in a frame when the normal frame reception state is detected by the line state detector, and the number of bits is predetermined. If it exceeds the number, it is determined that a long frame has been detected, the error counter is incremented when the long frame is detected during the failure state detection, and the long frame is detected when the recovery state is detected. The line monitoring system according to claim 1, wherein the error counter is subtracted when it is not detected.