JPH08330665A - Manufacture of optical semiconductor laser - Google Patents

Abstract

PURPOSE: To provide a method for manufacturing a semiconductor laser integrated with a single semiconductor laser having a low threshold value and a high efficiency and an optical waveguide device. CONSTITUTION: A mesa having a double hetero layer including an active layer is selectively grown by an organic metal vapor growing method on a region sandwiched between a pair of SiO2 film stripe masks formed on an InP substrate. Thereafter, the SiO2 films 4 are deposited, then entirely etched by Ar ion milling to remove the SiO2 film of the mesa oblique surface 5, at least the mesa is covered with photoresist, the SiO2 film except the mesa is wet etched to be removed to thereby form a growth preventing mask necessary for the growth of the current block layer, and an excellent current narrowing structure is provided in the active layer formed by the selective growth.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser used for optical communication, and more particularly to a method for manufacturing a single semiconductor laser suitable for low threshold and high efficiency operation and an optical semiconductor laser integrated with an optical waveguide device.

[0002]

2. Description of the Related Art With the progress of optical fiber communication technology, not only long-distance, large-capacity trunk line transmission system,
It is also beginning to spread to subscribers. From the viewpoint of ease of use, semiconductor lasers are also strongly required to have performances such as environment resistance, low power consumption, that is, low threshold, and high efficiency, and there is an urgent need to further improve the characteristics. In addition, integration with other optical waveguide devices has become necessary from the viewpoint of high functionality.

As a conventionally known semiconductor laser, a structure using a pn junction as a current blocking layer by a buried hetero (BH) structure is known [for example, the Institute of Electronics, Information and Communication Engineers, Spring Conference Lecture Collection. , C-21
3 (page 4-210)].

On the other hand, as a conventionally known method for manufacturing a semiconductor laser, a selective metal organic vapor phase epitaxy method (selective MO-V method) is applied to a region sandwiched by growth inhibition masks of _two SiO ₂ films.
A method of forming an active layer by PE growth is known. This method is suitable for low-threshold laser fabrication because it can form an optical waveguide with low loss, and can control the waveguide width by the SiO ₂ film pattern width, and is also excellent in controllability. Furthermore, the bandgap can be controlled in the direction of the waveguide simply by changing the SiO ₂ film mask width, which is an effective technique for manufacturing an optical integrated device.

As a conventional optical semiconductor device using this technique, a selective MO is formed in a region sandwiched by two growth prevention masks.
-By growing a trapezoidal double hetero layer (DH layer) including a light absorption layer by VPE growth, part of the growth blocking mask on both sides of the DH layer is removed, and a modulator in which a cladding layer is grown is integrated. Known semiconductor lasers [for example, the Institute of Electronics, Information and Communication Engineers, 1993 Autumn Meeting Proceedings, C-9].
8 (page 4-178)].

In the conventional method of manufacturing a semiconductor laser having a current block structure using a pn junction shown in FIG. 6, as shown in FIG. 6A, a p-InP clad is formed on a substrate 28 made of p-InP. Layer and a DH layer (double hetero layer) 29 sandwiched between the n-InP clad layer are formed, and FIG.
As shown in FIG. 6C, a current block layer 31 including a p-InP layer, an n-InP layer, and a p-InP layer is sequentially formed after forming a mete-stripe by using the SiO ₂ film 30 as a mask as shown in FIG. After stacking and removing the SiO ₂ film 30 as shown in FIG. 6D, the n-InP layer 32,
The n-InGaAs layer 33 is sequentially stacked. And Si
After depositing the O ₂ film 34 and opening a window on the n-side, the p-electrode 3
5, the n-electrode 36 was formed to complete the device.

Further, the selective MO according to the second conventional example shown in FIG.
In the method of manufacturing a semiconductor laser using the VPE growth,
As shown in FIG. 7A, two stripe masks 38 of SiO ₂ film are formed on a substrate 37 made of n-InP at an interval of 1.8 μm, and a waveguide region is formed in a region sandwiched by the stripe masks 38. A DH layer 39 sandwiched between the n-InP clad layer and the p-InP clad layer is formed by selective MO-VPE growth, and a stripe mask 38 of a SiO ₂ film adjacent to the waveguide region is formed as shown in FIG. 7B. 2 μm each, the DH layer 39 is filled with the p-InP layer 40, and the p-InGaAs layer 41 is further grown on the p-InP layer 40, and the SiO ₂ film 42 is formed on the entire surface as shown in FIG. 7C. After the deposition and opening of the p-side window, the p-electrode 43 and the n-electrode 44 were formed to complete the device.

[0008]

However, in the case of the conventional example 1 described above, it is necessary to control the side etching amount and the mesa width of the SiO ₂ film with respect to the mask in order to make the current blocking layer have an optimum shape. In wet etching, it was difficult to accurately control the side etching amount and the mesa width due to variations in the wafer surface and variations in the etching rate.

Further, in the case of the conventional example 2 described above, in order to realize a highly efficient operation, a current block structure is required in order to efficiently inject a current into the active layer. Since the structure has only a built-in voltage difference using a junction, the leakage current is large at the time of high injection,
There is a problem that high output operation cannot be performed. Further, in order to introduce the current block structure into the DH layer formed by selective MO-VPE growth, the growth blocking mask must be formed only on the mesa of the DH layer having a width of 1.0 to 1.5 μm. In the patterning method using normal alignment exposure,
It was impossible to eliminate misalignment.

An object of the present invention is to provide a method of manufacturing an optical semiconductor laser in which a single semiconductor laser having a low threshold value and high efficiency and an optical waveguide device are integrated.

[0011]

In order to achieve the above object, an optical semiconductor laser manufacturing method according to the present invention is a method for manufacturing an optical semiconductor laser including a mesa growth step, an ion milling step, and an etching step. Then, the mesa growth process is a process of growing a mesa having a double hetero layer including an active layer on a semiconductor substrate by a metal organic chemical vapor deposition method, and the ion milling process forms an insulating layer on the entire surface of the semiconductor substrate. After that, the entire surface is etched by ion milling,
The etching process is a process of removing the insulating layer deposited on the slope of the mesa, and the etching process is a process of covering the mesa with a photoresist, leaving an insulating layer on the top of the mesa, and removing the other insulating layers by etching. Is.

The insulating layer on the slope of the mesa is removed by utilizing the fact that the etching rate of the insulating layer on the slope of the mesa is higher than that of the flat surface.

Further, the insulating layer deposited on the bottom side of the mesa slope covered with the photoresist is removed by side etching.

Further, there is a current block layer forming step, and the current block layer forming step is a process of growing the current block layer by leaving the insulating layer on the head of the mesa.

[0015]

[Function] Utilizing the fact that the etching rate of the insulating layer on the slope of the mesa during ion milling is higher than that of the flat surface, the insulating layer on the slope of the mesa is selectively removed, and then the insulating layer on the top of the mesa is left flat. By removing the insulating layer on the surface,
It enables formation of a current blocking layer using a pn junction.

[0016]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIGS. 1 and 2 are sectional views showing a method of manufacturing a semiconductor laser according to Embodiment 1 of the present invention in the order of steps.

As shown in FIG. 1A, a SiO ₂ film is deposited to a thickness of 150 nm on a substrate 1 made of n-InP having a (100) plane orientation by a thermal CVD method, and an interval of 1.01 in the <011> direction. A pair of SiO ₂ film stripe masks 2 having a width of 5 μm and a width of 8 μm are formed by ordinary photolithography and wet etching.

Next, by selective MO-VPE growth, the growth pressure is 75 Torr, the growth temperature is 625 ° C., and the carrier concentration is 5 ×.
An n-InP clad layer having a layer thickness of 10 ¹⁷ cm ⁻³ and a thickness of 0.1 μm, an active layer made of non-doped i-InGaAsP having a wavelength composition of 1.30 μm and a layer thickness of 0.2 μm, and a carrier concentration of 5 × 10 ¹⁷ cm ⁻³ . 0.1 μm p-InP clad layer
The layers are stacked to form a DH layer (double hetero layer) 3. At this time, in the above mask arrangement, an exposed mesa of the (111) B plane is formed. Next, a 400 nm thick SiO ₂ film 4 is deposited on the entire surface of the wafer by a thermal CVD method.

Next, as shown in FIG. 1B, the entire surface is etched by ion milling using an inert gas such as Ar gas, and the SiO ₂ film 4 on the mesa slope portion 5 is removed.
The etching rate of the SiO ₂ film depends on the incident angle of Ar ions as shown in FIG. 3, and the etching rate becomes large by setting the angle, and it becomes maximum at about 60 °. On the other hand, the (111) B surface of the mesa slope is exposed,
The incident angle of Ar ions on the mesa slope is about 55 °. Therefore, in the mesa slope portion, the etching rate is about twice as high as in the flat portion, so that the SiO ₂ film on the flat surface is left and only the SiO ₂ film on the slope of the mesa can be removed.

Next, as shown in FIG. 1C, a photoresist mask 6 is formed by ordinary photolithography so as to cover the mesa top. At this time, if the mask width is 5 μm, the alignment margin for forming the mask on the mesa top can be 1 μm or more. This can be sufficiently patterned by ordinary aligning exposure. Then, the SiO ₂ film 4 on the flat surface other than the mesa top is removed by etching with a mixed solution of hydrofluoric acid and ammonium fluoride. At this time, the photoresist mask 6 partially covers the flat surface SiO ₂ film 4, but it can be completely removed by side etching. As a result, the SiO ₂ film 4 can be left only on the mesa top.

Next, as shown in FIG. 2D, MO-VP
Growth pressure 75 Torr, growth temperature 625 by E growth method
P-InP having a carrier concentration of 5 × 10 ¹⁷ cm ⁻³ at 0 ° C.
N-InP of ³ μm and carrier concentration of 5 × 10 ¹⁸ cm ⁻³ is 1.0 μm and p-In of carrier concentration of 5 × 10 ¹⁷ cm ^−3.
P is sequentially laminated in a thickness of 0.2 μm to form the current block layer 7.

After that, as shown in FIG. 2E, the SiO ₂ film mask on the mesa was removed by hydrofluoric acid, and the MO-VP was removed.
Growth pressure 75 Torr, growth temperature 625 by E growth method
The p-InP layer 8 having a carrier concentration of 5 × 10 ¹⁷ cm ^-3 at 1.5 ° C. has a thickness of 1.5 μm, and the p-InP having a carrier concentration of 5 × 10 ¹⁸ cm ^{-3 has} a p-In concentration of 5 μm.
The GaAs layer 9 is laminated.

After that, the SiO ₂ film 10 is formed by the thermal CVD method.
Is deposited to a thickness of 350 nm, a contact window is opened by ordinary photolithography and wet etching, and Ti
/ Au is deposited by a 100/300 nm sputtering method, and the p-side electrode 11 having a pad structure is formed by ordinary photolithography and wet etching. Then, the wafer is polished to 100 μm, and the n-side electrode 12 is Ti / Au is deposited by a 100/300 nm sputtering method, and sintering is performed at 430 ° C. in an N ₂ atmosphere.

Finally, the device is completed by cleaving the device to a length of 300 μm. In this embodiment, the oscillation threshold value at room temperature is 5 m.
A, slope efficiency of 0.3 W / A, and saturated light output of 50 mW or more were obtained.

(Embodiment 2) FIG. 4A is a plan view showing a method of manufacturing a semiconductor laser according to a second embodiment of the present invention in the order of steps, FIG. 4B is a sectional view of the same, and FIGS. Of these, the diagram on the left side is a sectional view taken along the line aa ′ of (B), and the diagram on the right side is b- in FIG.
It is a b'line sectional view. In this embodiment, a semiconductor laser and an optical modulator are integrated. FIG. 5 is a structural diagram of an integrated device of the optical modulator and DFB laser of this embodiment.

As shown in FIG. 4A, a diffraction grating having a period of 241.7 nm in the <011> direction is formed on a laser portion 14 of a substrate 13 made of n-InP having a (100) plane orientation by an interference exposure method and wet etching. Form 15.

Next, a SiO ₂ film is formed by thermal CVD to 15
0 nm is deposited, and in the laser section 14, a pair of SiO ₂ having a width of 18 μm and a length of 500 μm in the <011> direction with a width of 5 μm and a modulator section 16 of 5 μm and a length of 200 μm.
The film stripe mask 17 is formed by ordinary photolithography and wet etching.

Next, as shown in FIG. 4 (B), MO-VP
Growth pressure 75 Torr, growth temperature 625 by E growth method
Carrier composition with wavelength composition 1.13 μm at 5 ° C. 5 × 10¹⁷c
m^-3 The guide layer made of n-InGaAsP of 0.1 μm
m, laser band 14 has a bandgap wavelength composition of 1.56
μm non-doped InGaAs well layer, wave
InGaAsP having a long composition of 1.15 μm is used as a barrier layer
7 multiple quantum well layers, carrier concentration 5 × 10¹⁷cm^-3
Of the p-InP is grown to grow the DH layer 18
To form

Next, as shown in FIG. 4C, a SiO ₂ film 19 having a thickness of 400 nm is deposited on the entire surface of the wafer by a thermal CVD method, and the entire surface is etched by ion milling using Ar gas to form the SiO on the slope of the mesa. ₂ Remove the film. At this time, in the above mask arrangement, the modulator section 16 and the laser section 1
In No. 4, since the growth rate is different and the DH layer thickness is different, the (111) B plane is exposed on the mesa slope. Since the etching rate of ion milling is determined only by the incident angle of ions, the SiO ₂ film 19 on the flat surface is left and the SiO ₂ on the mesa slope surface is left.
Only the membrane 19 can be removed.

Next, a photoresist mask is formed by ordinary photolithography so as to cover the mesa top.
Then, the SiO ₂ film on the flat surface other than the mesa top is removed by etching with a mixed solution of hydrofluoric acid and ammonium fluoride. At this time, the photoresist mask is partially flat surface S
Although the iO ₂ film 4 is covered, it can be completely removed by side etching.

The following crystal growth step is carried out by the MO-VPE growth method as in Example 1, with a growth pressure of 75 Torr and a growth temperature of 625 ° C. and a carrier concentration of 5 × 10 ¹⁷ cm ⁻³ p-.
InP 0.3 μm, carrier concentration 5 × 10 ¹⁸ cm ⁻³ n-InP 1.0 μm, carrier concentration 5 × 10 ¹⁷ cm
^-3 p-InP is sequentially laminated to a thickness of 0.2 μm to form the current blocking layer 20.

After that, the SiO ₂ film mask on the mesa was removed with hydrofluoric acid, and the carrier concentration was 5 × 1 at a growth pressure of 75 Torr and a growth temperature of 625 ° C. by MO-VPE growth method.
A p-InP layer 21 having a thickness of 0 ¹⁷ cm ^-3 is 1.5 μm, and a p-InGaAs layer 22 having a carrier concentration of 5 × 10 ¹⁸ cm ^-3 is laminated. Next, using the photoresist as a mask, a mesa stripe having a width of 10 μm is formed with a mixed solution of bromine and methanol.

After that, the SiO ₂ film 23 is formed by the thermal CVD method.
Is deposited to a thickness of 350 nm, a contact window is opened by ordinary photolithography and wet etching, and Ti
/ Au is deposited by a 100/300 nm sputtering method, and p-side electrodes 24 having a pad structure are formed on the modulator section 16 and the laser section 14 by ordinary photolithography and wet etching.
After polishing to μm, Ti / Au to be the n-side electrode 25 is deposited on the back surface by a 100/300 nm sputtering method, and sintering is performed at 430 ° C. in an N ₂ atmosphere.

Finally, the laser portion 14 and the modulator portion 16 are cleaved at the center, and a high reflection film 26 is formed on the laser side end surface and a non-reflective film 27 is formed on the modulator side end surface of the SiNx film by sputtering. Completed (Figure 5).

In this embodiment, the threshold value of the laser is 8 mA, 10
The optical output at 0 mA was 30 mW, which was more than twice the conventional optical output. When a reverse bias voltage of 3 V was applied to the modulator section, a good extinction ratio of 15 dB was obtained.

In the above embodiment, the ion milling is
Although r is used, it is not limited to this, and a reactive gas may be used. Further, although the n-type substrate is used in the above embodiment, a p-type substrate may be used by providing an appropriate current block structure. Further, the DH layer structure is not limited to the above-mentioned embodiment and may be any layer structure.

[0038]

As described above, the method of manufacturing a semiconductor laser of the present invention utilizes the fact that the incident angle of ions on the SiO ₂ film during ion milling is maximized at 60 ° C., so that the selective MO-VPE is performed. Si on the mesa slope of the DH layer formed by growth
By selectively removing the O ₂ film and then removing the SiO ₂ film on the flat surface other than the DH mesa top by wet etching using a photoresist mask, DH
By forming a SiO ₂ film only on the mesa top of the layer, it is possible to form a current block layer using a pn junction, and a low threshold, high efficiency, high output single semiconductor laser and optical waveguide device are integrated. Realize a semiconductor laser.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a method of manufacturing a semiconductor laser according to a first embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor laser according to the first embodiment of the present invention in the order of steps.

FIG. 3 is a characteristic diagram showing the incident angle dependence of the etching rate when ion milling the SiO ₂ film with Ar.

FIG. 4 is a cross-sectional view showing a method of manufacturing a semiconductor laser integrated with a modulator according to the second embodiment of the present invention in the order of steps.

FIG. 5 is a structural diagram showing an integrated device of an optical modulator and a semiconductor laser according to a second embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a method of manufacturing a semiconductor laser according to Conventional Example 1 in the order of steps.

7A to 7C are cross-sectional views showing a method of manufacturing a semiconductor laser according to Conventional Example 2 in the order of steps.

[Explanation of symbols]

1 Substrate 2 Stripe Mask 3 DH Layer 4 SiO ₂ Film 5 Mesa Slope 6 Photoresist Mask 7 Current Block Layer 8 p-InP Layer 9 n-InGaAs Layer 10 SiO ₂ Film 11 p-side Electrode 12 n-side Electrode 13 Substrate 14 Laser Part 15 Diffraction grating 16 Modulator part 17 Stripe mask 18 DH layer 19 SiO ₂ film 20 Current blocking layer 21 p-InP layer 22 p-InGaAs layer 23 SiO ₂ film 24 p-side electrode 25 n-side electrode 26 highly reflective film 27 None Reflective film 28 Substrate 29 DH layer 30 SiO ₂ film 31 Current blocking layer 32 n-InP layer 33 n-InGaAs layer 34 SiO ₂ film 35 p-side electrode 36 n-side electrode 37 Substrate 38 Stripe mask 39 DH layer 40 p-InP layer 41 p-InGaAs layer 42 SiO ₂ film 43 p-side electrode 44 n-side electrode

[Procedure amendment]

[Submission date] August 30, 1996

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Figure 6

[Correction method] Change

[Correction content]

6 is a cross-sectional view sequentially showing the steps of producing the engagement Ru semiconductors lasers of the conventional example 1.

Claims (4)

[Claims] 1. A method of manufacturing an optical semiconductor laser including a mesa growth step, an ion milling step, and an etching step, the mesa growth step including an active layer on a semiconductor substrate by a metal organic chemical vapor deposition method. This is a process to grow a mesa having a double hetero layer.In the ion milling process, after forming an insulating layer on the entire surface of the semiconductor substrate, the entire surface is etched by ion milling to remove the insulating layer deposited on the sloped part of the mesa. The method of manufacturing an optical semiconductor laser is characterized in that the etching step is a step of covering the mesa with a photoresist, leaving an insulating layer on the top of the mesa, and removing the other insulating layers by etching. 2. The optical semiconductor laser according to claim 1, wherein the insulating layer on the slope of the mesa is removed by utilizing the fact that the etching rate of the insulating layer on the slope of the mesa is larger than that of a flat surface. Manufacturing method. 3. The method of manufacturing an optical semiconductor laser according to claim 1, wherein the insulating layer deposited on the bottom side of the mesa slope covered with the photoresist is removed by side etching. 4. The method according to claim 1, further comprising a current blocking layer forming step, wherein the current blocking layer forming step is a process of growing the current blocking layer by leaving an insulating layer on the head of the mesa. A method for manufacturing an optical semiconductor laser as set forth in.