JPH084085B2 - Method for electrolytic etching of semiconductor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a method for electrolytically etching a semiconductor.

(Prior Art) As a conventional electrolytic etching method for a semiconductor, there is one using an etching apparatus as shown in FIG. 4 (J. Electrochem. Soc. 177, p959, 1970).

In FIG. 4, 10 is the first tank, 20 is the second tank, and
The semiconductor substrate 2 which is the semiconductor to be etched and the counter electrode 3 corresponding to the semiconductor substrate 2 are arranged in the tank 10, and the reference electrode 4 is arranged in the second tank 20. First and second tanks 10,
20 is filled with the same electrolyte solution 5, and both tanks 10, 20 are
The insertion end of the first tank 10 is connected by a bridge 7 which is a capillary 6. Ionic conduction between the two tanks 10 and 20 is enabled through the capillary 6 and the bridge 7. 8 is a potentiostat as a DC power source, the lead wires 9a, 9b, 9c of which are the counter electrode 3,
It is connected to the semiconductor substrate 2 and the reference electrode 4. Reference numeral 11 is a heating element, 12 is a stirrer, and the stirrer 12 is rotationally driven by a magnetic drive means (not shown) outside the tank.
The electrolyte solution 5 in the first tank 10 is heated by a heater 11 and agitated by a stirrer 12 as needed.

During the electrolytic etching, ion conduction between the first tank 10 and the second tank 20 is achieved by the bridge 7 provided with the capillary 6, and the potentiostat 8 also causes ion conduction between the semiconductor substrate 2 and the reference electrode 4. The direct-current voltage applied between the semiconductor substrate 2 and the counter electrode 3 is controlled so that the potential difference of 1 is always a constant value. Thus, the semiconductor substrate 2 is kept at a constant potential while the electrolytic etching is in progress, so that uniform and accurate etching is performed.

(Problems to be Solved by the Invention) In the conventional method for electrolytically etching a semiconductor, the bridge 7 provided with the capillary 6 ensures ion conduction between the first tank 10 and the second tank 20. Since the potential difference between the semiconductor substrate 2 and the comparison electrode 4 is set to a constant value, the range in which the potential is accurately controlled on the semiconductor substrate 2 is limited to the vicinity of the tip portion of the capillary 6, and the semiconductor There is a problem that it is difficult to perform uniform and accurate etching on the substrate 2.

The present invention has been made in view of such conventional problems, and an object thereof is to provide an electrolytic etching method for a semiconductor capable of performing uniform and accurate etching processing with high yield.

[Structure of the Invention] (Means for Solving Problems) In order to solve the above problems, the present invention includes a counter electrode corresponding to the semiconductor to be etched and a reference electrode held at a predetermined potential. In the method of electrolytically etching the semiconductor to be etched at a constant potential by controlling the semiconductor to be etched to a constant potential difference with respect to the reference electrode, the reference electrode is formed on the semiconductor to be etched. Is the gist.

(Function) The DC voltage applied between the semiconductor to be etched and the counter electrode is controlled so that the potential difference between the semiconductor to be etched and the reference electrode formed on the semiconductor to be etched is always a constant value. Then, electrolytic etching of the semiconductor to be etched proceeds under a constant potential. At this time, since the reference electrode is formed on the semiconductor to be etched and arranged in the vicinity of the etched region, the controllability of the potential difference with respect to the entire etched region is improved, and the etched region is made to have a constant potential almost all over. To be done. Thus, uniform and accurate electrolytic etching process proceeds.

(Embodiment) An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

In FIG. 1, the same or equivalent members and devices as those shown in FIG. 4 are designated by the same reference numerals as those used above, and a duplicate description will be omitted.

First, the structure of the etching apparatus and the semiconductor to be etched applied to this embodiment will be described.

As shown in FIG. 1, the etching apparatus has one etching tank 1, and the comparison electrode 18 is formed on a semiconductor substrate 14 which is a semiconductor to be etched. The semiconductor substrate 14 having the comparison electrode 18 is prepared as follows. This will be described with reference to the process chart of FIG.

First, the semiconductor substrate 14 is subjected to an oxidation treatment for about 40 minutes in a humidified oxygen atmosphere at 1100 ° C., for example, and SiO _{2 having} a thickness of about 500 nm is used.
The film 15 is formed (FIG. 2 (a)). Then, by photo-etching, the portion of the SiO ₂ film 1 that will become the etched region 14a is
5 is removed to form a mask pattern. Then, the Ag film 16 is deposited on the entire surface by, for example, a vacuum vapor deposition method, and the pattern is transferred by photoetching to form the Ag film 16 having a desired shape on the SiO ₂ film 15. By dipping this in an Hcl solution for about 1 minute, the surface layer of the Ag film 16 is converted into Agcl 17 to form a reference electrode 18 (FIG. 2 (b)). The reference electrode 18 is formed over a wide area in a lattice shape in plan view so that the etched region 14d can be made to have a constant potential over the entire surface.

Then, after removing the SiO ₂ film 15 on the back surface of the semiconductor substrate 14, Al 19, Ni 21 and Ag 22 are vacuum-deposited on the back surface.
Was continuously deposited, and further about 15 ° C in N ₂ atmosphere at about 450 ° C.
Heat treatment for 15 minutes to improve the electrical contact between Al 19 and semiconductor substrate 14
23 is formed (FIG. 2 (c)).

Next, an electrolytic etching method for the semiconductor substrate prepared as described above will be described.

In the semiconductor substrate 14, the substrate electrode 23 is connected to the potentiostat 8 via the lead wire 9b, and the reference electrode 18 is the lead wire.
It is connected to the potentiostat 8 via 9c, and its etched region 14a is placed in the electrolyte solution 5 in the etching tank 1 so as to face the counter electrode 3.

The potentiostat 8 is provided between the semiconductor substrate 14 and the counter electrode 3 so that the potential difference between the semiconductor substrate 14 and the comparison electrode 18 formed on the semiconductor substrate 14 is always a constant value. The applied DC voltage is controlled so that the side 14 becomes (+), and the semiconductor substrate 14, in other words, the region to be etched 14a is electrolytically etched at a constant potential. At this time, since the comparison electrode 18 is formed on the semiconductor substrate 14 and arranged in the immediate vicinity of the etched region 14a, the controllability of the potential difference with respect to the entire etched region 14a is improved, and the etched region 14a is substantially formed. A constant potential is applied over the entire surface. Therefore, as shown in FIG. 2 (d), the etched region 14a is uniform and is etched with a required accuracy.

After the required etching process, the reference electrode 18 and the substrate electrode 23 are not necessary and are appropriately removed.

Further, in the example of FIG. 1, a case where one semiconductor substrate 14 is electrolytically etched is shown, but a large number of semiconductor substrates can be collectively etched in the same etching tank. In such a case, each semiconductor substrate is provided with a reference electrode, and the regions to be etched of the respective semiconductor substrates are independently subjected to constant potential control. Is improved.

Next, FIG. 3 shows another example of the semiconductor substrate applied to this embodiment. The electrolytic etching process using this semiconductor substrate is performed as one step in manufacturing a semiconductor pressure sensor.

The formation of the reference electrode and the substrate electrode on the semiconductor substrate will be described. First, the N-type epitaxial layer 25 having a required thickness is formed on the surface of the P-type Si substrate 24 having the (100) crystal plane as a surface by the epitaxial growth method. (FIG. 3 (a)). Then, using the thermal oxidation method similar to the above, Si
An O ₂ film 15 is formed, and the required area of Si is photoetched.
The O ₂ film 15 is removed. A piezoresistor 26 consisting of a P-type diffusion layer resistance is formed in the removed region of the SiO ₂ film 15 by the impurity diffusion method (FIG. 3 (b)).

Al wiring layer 27 by vacuum evaporation method and photo etching
Then, the interlayer insulating film 28 made of PSG is formed by the CVD method.
And the external wiring hole 29 is opened by photoetching. Next, the PSG film 31 is deposited again on the entire surface by the CVD method (FIG. 3 (c)).

The SiO ₂ film 15 on the back surface side is removed by photoetching to open a portion to be the etched region 24a, and the comparison electrode 18 made of Ag film 16 and Agcl 17 is formed on the SiO ₂ film 15 by the same process as described above. To form. On the other hand, on the surface side, the SiO ₂ film in the required area was photoetched.
After removing the PSG films 28 and 31, 15, the substrate electrode 23 made of Al19, Ni21 and Ag22 is formed by the same process as described above (FIG. 3 (d)).

The electrolytic etching method for the region to be etched 24a prepared as described above is performed in substantially the same manner as above using saturated water hydrazine as the electrolyte solution 5 in order to proceed the plane anisotropic etching.

Then, when the potential of the P-type Si substrate 24 with respect to the reference electrode 18 is set to be constant at about -0.6 V, the N-type Si and the P-type Si are set.
Due to the difference in the passivation potential, the anisotropic etching of the P-type Si substrate 24 can be stopped when it reaches the N-type epitaxial layer 25, as shown in FIG. 3 (e). The etching processing of the required shape is performed accurately.

After the etching process, the reference electrode 18, the substrate electrode 23 and
Since the PSG film 31 is unnecessary, the PSG film 31 is appropriately removed and the etching process for manufacturing the semiconductor pressure sensor is completed.

[Effect of the Invention] As described above, according to the present invention, since the reference electrode is formed on the semiconductor to be etched and is arranged in the immediate vicinity of the region to be etched, the reference electrode to the entire surface of the region to be etched is There is an advantage that the controllability of the potential difference between the two is improved and the etched region is made to have a constant potential over almost the entire surface, and uniform and accurate electrolytic etching proceeds to improve the yield.

[Brief description of drawings]

FIG. 1 is a block diagram showing an etching apparatus applied to an embodiment of a method for electrolytically etching a semiconductor according to the invention of FIG. 2, and FIG. 2 is a step of forming a reference electrode or the like on a semiconductor substrate applied to the embodiment. FIG. 3 is a process diagram showing an example, FIG. 3 is a process diagram showing an example of a process for forming a reference electrode or the like on another semiconductor substrate applied to the above-mentioned embodiment, and FIG. 4 is applied to a conventional semiconductor electrolytic etching method. It is a block diagram which shows the etching apparatus performed. 1: etching bath, 3: counter electrode, 5: electrolyte solution, 8: potentiostat, 14: semiconductor substrate, 18: reference electrode, 23: substrate electrode.

Claims (1)

[Claims] 1. A counter electrode corresponding to a semiconductor to be etched,
With a reference electrode held at a predetermined potential, by controlling the semiconductor to be etched at a constant potential difference with respect to the reference electrode, in the method of electrolytically etching the semiconductor to be held at a constant potential, A method for electrolytically etching a semiconductor, wherein the reference electrode is formed on the semiconductor to be etched.