JPH087963B2 - Servo circuit - Google Patents

Description

The present invention relates to a servo circuit suitable for use in an optical disk device or the like.

[Outline of Invention]

In the present invention, the error signal is sampled and held, and the reference level for operating the protection switch is changed according to the hold value.

[Conventional technology]

FIG. 9 shows a servo byte pattern of a sample servo in the optical disk device. Each sector of the optical disk is composed of 43 servo blocks, and one servo block is composed of 2 bytes of servo bytes and 16 bytes of data bytes following the servo bytes. The servo bytes consist of two wobbled pits and one clock pit, and the wobbled pits are arranged on the left and right of the track center.
When the pickup (light spot for information detection) traces the track center, the amount of decrease in the amount of light in the left and right wobbled pits becomes equal, and when the trace position shifts to the left and right, there are two The amount of decrease in the amount of light in the wobbled pit changes. Therefore, a tracking error signal is generated from the difference in the amount of decrease (RF signal level difference) between the two positions, and this tracking error signal is held during the section of the subsequent data byte.

Also, the two wobbled pits are changed to a longer interval and a shorter interval for every 16 tracks, and by detecting the change in this interval, the number of tracks can be accurately counted (16-track counting) even during high-speed search. You can do it.

The distance D between the wobbled pit and the clock pit, which is located further after, is set to a special length that does not appear in the data byte. Therefore, this distance D can be detected as a synchronization signal. Various timing signals are generated based on the detected synchronization signal. The clock is generated corresponding to the detection signal of the clock pit. The mirror surface portion of the distance D is used as a focus area, in which a focus error signal is detected and held in the section of the following data byte.

[Problems to be solved by the invention]

In such an optical disc device, for example, in order to protect the tracking actuator when the level of the tracking error signal exceeds a predetermined reference level,
The tracking servo loop switch is opened. Alternatively, the limiter switch for limiting the level is turned on so that an error signal above a predetermined level is not output.

FIG. 8 is a conventional circuit diagram for detecting the level at which such a protection switch is operated. That is, the error signal is supplied to an actuator (not shown),
Part of it is input to the window comparator 1. The window comparator 1 compares the error signal with a reference level V ₁ as an upper limit and a reference level V ₂ as a lower limit, and outputs a predetermined alarm signal when the reference level V ₁ or more or the reference level V ₂ or less. A predetermined protection switch operates in response to this alarm signal.

However, the reference levels V ₁ and V ₂ are set to a relatively large value so that the protection operation is not unnecessarily performed. As a result, the actuator is already driven by an error signal of a large level, not only cannot be detected promptly but also it takes time to recover, which makes it difficult to execute effective protection operation.

Therefore, the present invention enables a protection operation to be executed quickly and reliably.

[Means for solving problems]

The servo circuit of the present invention includes a sample hold circuit for holding an input error signal, a reference level generation circuit for outputting a reference level signal based on the voltage of the hold signal held by the sample hold circuit, and an error signal. And a reference level signal are compared with each other, and a comparison circuit that outputs a control signal that becomes a valid state when the error signal exceeds the reference level signal and a control circuit that inputs the error signal and the hold signal and is supplied from the comparison circuit A switch that outputs a hold signal when the signal is in the valid state and outputs an error signal when the control signal is not in the valid state.

[Action]

The error signal is input to the sample and hold circuit and held therein to become a hold signal. The reference level generation circuit outputs a reference level signal based on the voltage of the hold signal. The comparator circuit compares the unheld error signal with the reference level signal, and when the error signal is larger than the reference level signal, the control signal in the valid state is supplied to the switch. The switch selects and outputs the hold signal when the control signal is valid, that is, when the error signal is larger than the reference level signal. The error signal is selected when the control signal is not in the valid state, that is, when the error signal has a level lower than the reference level signal.

Therefore, when a sudden change occurs in the error signal due to a defect on the disk, the error signal is detected and the hold signal is continuously output, so that these disturbances are hardly applied to the servo loop.

〔Example〕

FIG. 1 is a block diagram of a servo circuit of the present invention. The RF signal reproduced and output from the optical disk is input to a sample hold circuit (tracking error signal generation circuit) 11.

Now, when the light spot traces the section of the servo byte as shown in FIG. 6 (a), the level of the RF signal becomes smaller corresponding to the pit position as shown in FIG. 6 (b). The timing signal generation circuit 20 detects the synchronization signal, and generates and outputs various timing signals as shown in FIGS. 6 (c) to 6 (g) with reference to the synchronization signal. The timing signals of (c), (d), and (e) in the same figure are in the wobbled pit and the clock pit of the servo byte, the timing signal in (f) is in the focus area, and the timing signal in (g) is the same. Corresponds to the servo byte section, respectively. The sample hold circuit 11 outputs RF when two timing signals corresponding to wobbled pits are input.
Each of the signal levels is sampled, and a signal (tracking error signal) corresponding to the difference between the two is generated and output.
The generated tracking error signal is held until the two wobbled pits are reproduced again in the next servo byte section.

The tracking error signal output from the sample hold circuit 11 is input to the sample hold circuit 12.

FIG. 5 shows an embodiment of the sample hold circuits 11 and 12. The switches 51 and 52 are turned on (switch to the contact S side) when timing signals corresponding to the front and rear wobbled pits are input, respectively, and are turned off (switch to the contact H side) at other times. As a result, the RF signal levels corresponding to the two wobbled pits are sampled in the capacitors 53 and 54, respectively, and further held. The capacitors 53 and 54 and the hold voltage are input to the operational amplifier 59 via the resistors 55 and 56. The operational amplifier 59 constitutes a differential amplifier 60 together with the resistors 58 and 58, and outputs the difference (tracking error signal) between the two hold voltages.

The switches 51 and 52 of the sample hold circuit 11 are turned on (sampled) in the section (S) of the wobbled pit as shown in FIG. 7 (a), and the other section (H).
The switch 61 of the sample hold circuit 12 is turned on at a predetermined timing (S) when the switches 51 and 52 are in the hold state, as shown in FIG. It is turned on (switched to the contact S side) and turned off (switched to the contact H side) in another period (H). Therefore, the sample and hold circuit
The tracking error signal output by 11 is sampled by the capacitor 62, further held, and output via the resistor 63.

The hold output of the sample hold circuit 12 is the generation circuit 16
Is input to The generation circuit 16 is configured, for example, as shown in FIG. The output of the sample hold circuit 12 is supplied to the connection point of the diodes 33 and 34 in the series circuit including the resistor 31, the diodes 33 and 34, and the resistor 32. Therefore, the anode of the diode 33 becomes the voltage V _{1 which is} higher than the hold voltage by the voltage drop of the diode 33 (about 0.6V),
The cathode of 34 has a voltage V ₂ lower than the hold voltage by a voltage drop of the diode 34 (about 0.6 V). Therefore, the reference voltages V ₁ and V ₂ change according to the hold voltage.

The reference voltages V ₁ and V ₂ output from the generation circuit 16 are input to the window comparator 17 and compared with the tracking error signal output from the sample hold circuit 11. The window comparator 17 outputs a low level signal when the level of the tracking error signal is within the range of the reference voltages V ₁ and V ₂ , and outputs a level signal when the level exceeds the range.

The output of the window comparator 17 is input to the frequency setting circuit 18. The number-of-times setting circuit 18 is configured, for example, as shown in FIG. When the output of the window comparator 17 changes from low level to high level, the RS flip-flop 41
Is set, and a signal at a higher level than the output Q is output.

The output of the flip-flop 41 is supplied to the reset terminal of the counter 42, and the counter 42 is reset when the output of the flip-flop 41 changes from the high level to the low level. After that, the sample hold circuit is connected to the clock terminal.
When twelve sampling pulses (S) (FIG. 7 (b)) are input, the rising edges thereof are counted and an output is generated when the count value reaches a preset predetermined value (for example, 2). This output resets the flip-flop 41. Therefore, the flip-flop 41 outputs a high-level signal from when the output is output from the window comparator 17 until after the sampling pulse is input twice to the sample hold circuit 12.

The output of the number-of-times setting circuit 18 is output to the switch 14 via the OR gate 19. The switch 14 is switched upward in the figure when a high level signal is input from the OR gate 19, and is switched downward in the figure when a low level signal is input. Therefore, when the window comparator 17 does not generate an output (during normal operation), the tracking error signal output from the sample and hold circuit 11 is the resistor 13, the switch
It is supplied to an actuator (not shown) via 14.

At this time, the limiter circuit 15 is connected between the resistor 13 and the sample hold circuit 12. The limiter circuit 15 is composed of a parallel circuit of a PNP transistor 21 and an NPN transistor 22, as shown in FIG. 2, for example. Transistor 21,
22 emitter and base are resistor 13 and sample hold circuit
12 connected to each. As a result, when the voltage of the resistor 13 (voltage of the tracking error signal) becomes higher than or lower than the voltage between the base and emitter (about 0.6V) from the hold voltage, the transistor 21 or 22 turns on, and the voltage of the tracking error signal becomes lower than the hold voltage. It is clamped (limited) to a voltage that is approximately 0.6V higher or lower.

When the window comparator 17 operates, a high level signal is output from the OR gate 19, and the switch 14 is switched to the upper side in the figure, the hold voltage of the sample hold circuit 12 is output to the actuator via the switch 14.
The output of the OR gate 19 is also output to the sample hall circuit 12. The switch 61 of the sample hold circuit 12 is switched to the contact H side when a high level signal is input from the OR gate 19, and holds the hold operation until a low level signal is input.

As a result, the tracking error signal output from the switch 14 becomes as shown by the solid line E in FIG. 7 (c). That is, basically, it changes step by step for each servo block, but the amount of change is the reference voltage V ₁ shown by the one-dot chain line
When it becomes V ₂ or more or less, is clamped to the reference voltages V ₁ or V ₂ by the operation of the limiter circuit 15, is not a large level signal shown by the broken line E ₁ is output.
Also, when the error voltage exceeds the reference voltage V ₁ or V ₂ , until the sampling pulse is detected twice (after the 2
In the section of the servo block), the hold voltage of the immediately preceding servo block is output as it is. Therefore, the disturbance due to the defect on the disk is hardly applied in the servo loop.

The reference voltages V ₁ and V ₂ (window width) are set corresponding to the maximum change width that can normally occur in one servo block (1 sample) section (about 24 μs), but within a relatively short period Since there is, it will be a sufficiently small value. Therefore, it is possible to reliably detect the defect before the actuator is largely displaced, and to quickly correct the error signal.

When an abnormality of the sync signal is detected by a means not shown (for example, when the sync signal is not detected in a predetermined servo byte section), the detection signal is input to the OR gate 19, so that the case described above is also applied. The same protection operation as is performed.

The case where the present invention is applied to the servo circuit using the tracking error signal has been described above as an example. In addition to this, a focus error signal, a cross track signal generated corresponding to a detection signal of a clock pit, and a low-pass forming a PLL circuit. It can also be applied to a servo circuit using a filter output signal or the like. Also, not the sample servo,
It can also be applied to continuous servo by sampling the error signal.

〔effect〕

As described above, the servo circuit of the present invention includes the sample hold circuit for holding the input error signal, and the reference level generation circuit for outputting the reference level signal based on the voltage of the hold signal held by the sample hold circuit. , Compare the error signal with the reference level signal,
A comparison circuit that outputs a control signal that becomes valid when the error signal exceeds the reference level signal, and a hold signal when the control signal supplied from the comparison circuit is in the valid state by inputting the error signal and the hold signal And a switch that outputs an error signal when the control signal is not in a valid state, and accurate servo can be continued without being affected by a defect. Therefore, the optical disk rotates at a high speed of 1800 rpm and the servo band is several KHz.
In such a case, the present invention is particularly effective because the servo system is weakened by an internal disturbance such as a defect due to the wide band.

[Brief description of drawings]

1 is a block diagram of a servo circuit of the present invention, FIG. 2 is a block diagram of a limiter circuit thereof, FIG. 3 is a block diagram of a generation circuit thereof, and FIG. 4 is a block diagram of a circuit setting circuit thereof.
FIG. 5 is a block diagram of the sample hold circuit, and FIG.
FIG. 7 and FIG. 7 are timing charts thereof, FIG. 8 is a block diagram of a conventional servo circuit, and FIG. 9 is an explanatory diagram of a servo byte pattern. 1 …… Wind comparator 11,12 …… Sample hold circuit 13 …… Resistance 14 …… Switch 15 …… Limiter circuit 16 …… Generation circuit 17 …… Wind comparator 18 …… Rotation setting circuit 19 …… Or gate 20 …… Generation Circuit 21 …… PNP transistor 22 …… NPN transistor 31,32 …… Resistance 33,34 …… Diode 41 …… RS flip-flop 42 …… Counter 51,52 …… Switch 53,54 …… Capacitor 55 to 58 ...... Resistance 59 ...... Operational amplifier 60 ...... Differential amplifier 61 ...... Switch 62 ...... Capacitor 63 ...... Resistance

Claims (1)

[Claims] 1. A sample hold circuit for holding an input error signal, a reference level generation circuit for outputting a reference level signal based on the voltage of the hold signal held by the sample hold circuit, and the error signal. And a reference level signal, and a comparator circuit that outputs a control signal that becomes valid when the error signal exceeds the reference level signal, and inputs the error signal and the hold signal to perform the comparison. A servo circuit, comprising: a switch that outputs the hold signal when the control signal supplied from the circuit is in the valid state and outputs the error signal when the control signal is not in the valid state.