JPH088651B2 - Contour correction device - Google Patents
Contour correction deviceInfo
- Publication number
- JPH088651B2 JPH088651B2 JP63097585A JP9758588A JPH088651B2 JP H088651 B2 JPH088651 B2 JP H088651B2 JP 63097585 A JP63097585 A JP 63097585A JP 9758588 A JP9758588 A JP 9758588A JP H088651 B2 JPH088651 B2 JP H088651B2
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- Prior art keywords
- signal
- delay
- value
- delayed
- input
- Prior art date
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Description
【発明の詳細な説明】 [産業上の利用分野] この発明はカラーテレビ受信機やビデオテープレコー
ダなどにおいて映像信号の輪郭を強調して画像の鮮鋭度
を改善する輪郭補正装置に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contour correction apparatus for enhancing the sharpness of an image by enhancing the contour of a video signal in a color television receiver, a video tape recorder or the like.
[従来の技術] 第3図は本出願人の先出願に係る特願昭62-127830号
の輪郭補正装置の構成例のブロツク回路図で、(1)は
映像信号が入力される入力端子、(3),(4)は入力
信号を時間3Dだけ遅延させる遅延回路、(9)は、毎時
刻、遅延回路(3)の出力信号と入力信号の振幅差を算
出する減算器、(10)は遅延回路(3)の出力信号と、
遅延回路(4)の出力信号の振幅差を算出する減算器、
(11)は減算器(9)の出力の絶対値Aを出力する絶対
値回路、(12)は減算器(10)の出力の絶対値Bを出力
する絶対値回路、(13)は絶対値回路(11),(12)の
出力A,Bの大小を比較し、その結果に基づいて切換制御
信号を出力する比較器、(14)はこの切換制御信号に基
づいて、入力信号と、遅延回路(3),(4)の出力信
号を切換えて出力端子(15)に出力する切換スイツチで
ある。[Prior Art] FIG. 3 is a block circuit diagram of a configuration example of a contour correcting device of Japanese Patent Application No. 62-127830, which is a prior application of the present applicant, and (1) shows an input terminal to which a video signal is inputted, (3) and (4) are delay circuits that delay the input signal by time 3D, (9) is a subtracter that calculates the amplitude difference between the output signal of the delay circuit (3) and the input signal, and (10) at each time. Is the output signal of the delay circuit (3),
A subtractor for calculating the amplitude difference between the output signals of the delay circuit (4),
(11) is an absolute value circuit that outputs the absolute value A of the output of the subtractor (9), (12) is an absolute value circuit that outputs the absolute value B of the output of the subtractor (10), and (13) is an absolute value A comparator that compares the magnitudes of the outputs A and B of the circuits (11) and (12) and outputs a switching control signal based on the result, (14) is a delay signal based on this switching control signal This is a switching switch that switches the output signals of the circuits (3) and (4) and outputs them to the output terminal (15).
次に動作について説明する。 Next, the operation will be described.
入力端子(1)から入力された入力信号は、遅延回路
(3)で時間3Dだけ遅延され、ついで遅延回路(4)で
時間3D遅延される。したがつて、切換スイツチ(14)の
3つの入力端子a,b,cには、現時刻の入力信号と、時間3
Dおよび時間6D前の入力信号の3つの信号が同時に入力
される。いま、遅延回路(3)の出力信号をf(t)と
すると、現在の入力信号はf(t+3D)で、また、遅延
回路(4)の出力信号はf(t−3D)で表わされる。第
4図(a)にこれらの3つの信号の位置関係を示す。減
算器(9)は、毎時刻、(信号f(t)の振幅)−(信
号f(t+3D)の振幅)(以下、「f(t)−f(t+
3D)」のように記載する)を演算し、絶対値回路(11)
は減算結果の絶対値Aを出力する。同様に、減算器(1
0)はf(t)−f(t−3D)を演算し、絶対値回路(1
2)は減算結果の絶対値Bを出力する。比較器(13)は
絶対値A,Bの比較を行い、A<Bの期間は切換スイツチ
(14)を端子aに切換えて信号f(t+3D)を出力し、
A=Bのときには端子bに切換えて信号f(t)を出力
し、A>Bの期間は端子cに切換えて信号f(t−3D)
を出力する切換制御信号を出力してスイツチ(14)を切
換える。この結果、出力端子(15)からは、第4図
(b)に太い実線で示す信号g(t)が出力される。こ
の出力信号g(t)の波形は、立上り時間の遅い入力信
号f(t)を、立上り時間の速い信号波形を補正した信
号となる。The input signal input from the input terminal (1) is delayed by the delay circuit (3) for time 3D, and then delayed by the delay circuit (4) for time 3D. Therefore, the three input terminals a, b, and c of the switching switch (14) have the input signal of the current time and the time 3
Three signals, D and the input signal 6D before the time, are simultaneously input. Now, assuming that the output signal of the delay circuit (3) is f (t), the current input signal is f (t + 3D), and the output signal of the delay circuit (4) is f (t-3D). FIG. 4 (a) shows the positional relationship of these three signals. The subtractor (9) outputs (amplitude of signal f (t))-(amplitude of signal f (t + 3D)) (hereinafter, "f (t) -f (t +)" every time.
3D) ”)) and calculate the absolute value circuit (11)
Outputs the absolute value A of the subtraction result. Similarly, the subtractor (1
0) calculates f (t) -f (t-3D), and the absolute value circuit (1
2) outputs the absolute value B of the subtraction result. The comparator (13) compares the absolute values A and B, and during the period of A <B, switches the switching switch (14) to the terminal a and outputs the signal f (t + 3D),
When A = B, the signal is switched to the terminal b and outputs the signal f (t). During the period of A> B, the signal is switched to the terminal c and the signal f (t-3D).
The switch (14) is switched by outputting a switching control signal for outputting. As a result, the output terminal (15) outputs the signal g (t) shown by the thick solid line in FIG. 4 (b). The waveform of the output signal g (t) is a signal obtained by correcting the input signal f (t) having a slow rise time and the signal waveform having a fast rise time.
なお、上記実施例における演算を式で表わすと、 A=|f(t)−f(t+3D)| B=|f(t)−f(t−3D)| となる。また、出力信号g(t)は、 として表わされる。When the calculation in the above embodiment is expressed by an equation, A = | f (t) -f (t + 3D) | B = | f (t) -f (t-3D) | The output signal g (t) is Is represented as
[発明が解決しようとする課題] 先出願に係る輪郭補正装置は、上記のように所定時間
3Dずつ時間差のある3つの信号を切換えるための切換制
御信号を、3つの被切換信号の振幅差のもとづいた演算
により作成しているため、被切換信号のS/Nが悪い場
合、すなわち入力信号に大きな振幅の雑音が含まれる場
合、例えば第5図(a)に示すような雑音を含む映像信
号が入力された場合には、第5図(b)に示すように、
望ましくない時点で信号が切換えられるため、出力信号
g(t)の波形がくずれて所期の輪郭補正効果が得られ
ないという問題が生じた。[Problems to be Solved by the Invention] The contour correction device according to the prior application has a predetermined time
When the S / N of the switched signal is bad, that is, the input signal When a noise having a large amplitude is included in, for example, when a video signal including noise as shown in FIG. 5 (a) is input, as shown in FIG. 5 (b),
Since the signals are switched at an undesired time point, the waveform of the output signal g (t) is distorted and the desired contour correction effect cannot be obtained.
この発明は上記のような問題点を解消するためになさ
れたもので、雑音の影響をうけることが少ない輪郭補正
装置を得ることを目的とする。The present invention has been made to solve the above problems, and an object of the present invention is to obtain a contour correction device that is less susceptible to noise.
[課題を解決するための手段] この発明に係る輪郭補正装置は、入力された映像信号
より所定時間だけ遅れた第1の遅延信号およびこの所定
時間より大きい時間遅れた第2の遅延信号を取り出す第
1および第2の遅延手段と、上記第1の遅延手段への入
力信号、上記第1の遅延信号および第2の遅延信号につ
いて、それぞれ上記所定時間よりは小さい単位時間だけ
遅れた信号および進んだ信号を作成して上記3つの信号
別に加算値もしくは平均値を算出する第1ないし第3の
加算手段と、上記第2の加算値から上記第1の加算値を
減算した値の絶対値X,および上記第2の加算値から上記
第3の加算値を減算した値の絶対値Yを算出する手段
と、絶対値X,Yの大小を比較し、X<Yの期間は上記第
1の遅延手段への入力信号を選択し、X=Yの期間は上
記第1の遅延信号を選択し、X>Yの期間は上記第2の
遅延信号を選択して映像信号として出力する手段とを備
えたものである。[Means for Solving the Problem] A contour correction device according to the present invention extracts a first delay signal delayed by a predetermined time from an input video signal and a second delay signal delayed by a time longer than the predetermined time. With respect to the first and second delay means, the input signal to the first delay means, the first delay signal and the second delay signal, a signal delayed by a unit time smaller than the predetermined time and a lead, respectively. First to third adding means for creating an additional signal and calculating an addition value or an average value for each of the three signals, and an absolute value X of a value obtained by subtracting the first addition value from the second addition value. , And means for calculating the absolute value Y of the value obtained by subtracting the third added value from the second added value, and the magnitudes of the absolute values X, Y are compared, and the period of X <Y is the first value. Select the input signal to the delay means, and set X = Y Selects the first delay signal, the period of X> Y is obtained by a means for outputting as a video signal and selecting the second delay signal.
[作用] 第1ないし第3の加算手段の算出値は、第1の遅延手
段への入力信号、第1の遅延信号および第2の遅延信号
を、それぞれ単位時間ずつ遅れた信号および進んだ信号
との加算値または平均値となるので、雑音が含まれてい
る場合でも平均化され、雑音による値の変化が少なくな
る。このため、これら3つの加算値または平均値の差の
絶対値の大小比較にもとづいて上記入力信号、第1およ
び第2の遅延信号を選択する際、雑音によつて誤つた信
号選択が行なわれることが少なくなる。[Operation] As the calculated values of the first to third adding means, the input signal to the first delay means, the first delayed signal and the second delayed signal are delayed by unit time and advanced, respectively. Since it is an addition value or an average value of and, even if noise is included, it is averaged, and the change of the value due to noise is reduced. Therefore, when selecting the input signal and the first and second delay signals based on the magnitude comparison of the absolute values of the differences between these three added values or the average value, a wrong signal is selected due to noise. Less often.
[発明の実施例] 以下、この発明の一実施例を図について説明する。[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings.
第1図において、第3図と同一符号はそれぞれ同一構
成部分を示しており、(2),(5)は、入力信号をそ
れぞれ時間Dだけ遅延させる遅延回路、(3),(4)
は入力信号を1D,2D,および3D遅延させる遅延回路、
(6),(7),(8)は加算器である。遅延回路
(3)の3D遅延出力信号をf(t)とすると入力信号は
f(t+4D)、遅延回路(2)の出力信号はf(t+3
D)、遅延回路(3)の2D遅延出力信号はf(t+
D)、1D遅延出力信号はf(t+2D)、遅延回路(4)
の3D遅延出力信号はf(t−3D)、2D遅延出力信号はf
(t−2D)、1D遅延出力信号はf(t−D)、遅延回路
(5)の出力信号はf(t−4D)と表わせる。また、加
算器(6),(7),(8)は、それぞれ(f(t+4
D)+f(t+3D)+f(t+2D)),(f(t+D)
+f(t)+f(t−D))および(f(t−2D)+f
(t−3D)+f(t−4D))の加算を行い、加算値を減
算器(9),(10)に出力する。In FIG. 1, the same reference numerals as those in FIG. 3 indicate the same components, and (2) and (5) are delay circuits for delaying the input signal by the time D, (3) and (4), respectively.
Is a delay circuit that delays the input signal by 1D, 2D, and 3D,
(6), (7) and (8) are adders. When the 3D delayed output signal of the delay circuit (3) is f (t), the input signal is f (t + 4D) and the output signal of the delay circuit (2) is f (t + 3).
D), the 2D delay output signal of the delay circuit (3) is f (t +
D), 1D delay output signal is f (t + 2D), delay circuit (4)
3D delay output signal is f (t-3D), 2D delay output signal is f
The (t-2D) and 1D delayed output signals can be expressed as f (t-D), and the output signal of the delay circuit (5) can be expressed as f (t-4D). Further, the adders (6), (7) and (8) are respectively (f (t + 4
D) + f (t + 3D) + f (t + 2D)), (f (t + D)
+ F (t) + f (t-D)) and (f (t-2D) + f
(T-3D) + f (t-4D)) is added and the added value is output to the subtracters (9) and (10).
次に動作について説明する。入力端子(1)から入力
された映像信号f(t+4D)は、遅延回路(2),
(3),(4)を通つて信号f(t+3D),f(t),f
(t−3D)となり、スイツチ回路(14)で切換えられて
出力端子(15)に出力信号g(t)が得られる。このス
イツチ回路(14)の切換制御信号は、以下のようにして
作成される。加算器(6)は、入力信号f(t+4D)
と、遅延回路(2)の1D遅延出力信号f(t+3D)と、
遅延回路(3)の1D遅延出力信号f(t+2D)との和 (i=−1,0,1の値をとる)を算出し、加算器(7)は
遅延回路(3)の2D遅延出力信号f(t+D)と、3D遅
延出力信号f(t)と、遅延回路(4)の1D遅延出力信
号f(t−D)との和 を算出し、加算器(8)は、遅延回路(4)の2D遅延出
力信号f(t−2D)と、3D遅延出力信号f(t−3D)、
遅延回路(5)の出力信号f(t−4D)の和 を算出する。減算器(9)は、毎時刻、加算器(7)の
出力 と加算器(6)の出力 の差 を演算し、絶対値回路(11)は減算結果の絶対値Xを出
力する。同様に、減算器(10)は、 を演算し、絶対値回路(12)は減算結果の絶対値Yを出
力する。Next, the operation will be described. The video signal f (t + 4D) input from the input terminal (1) is supplied to the delay circuit (2),
The signal f (t + 3D), f (t), f passes through (3) and (4).
(T-3D), which is switched by the switch circuit (14) and the output signal g (t) is obtained at the output terminal (15). The switching control signal of the switch circuit (14) is created as follows. The adder (6) receives the input signal f (t + 4D)
And the 1D delay output signal f (t + 3D) of the delay circuit (2),
Sum with 1D delay output signal f (t + 2D) of delay circuit (3) (I = −1,0,1), and the adder (7) outputs the 2D delayed output signal f (t + D) of the delay circuit (3) and the 3D delayed output signal f (t). Sum with 1D delay output signal f (t-D) of delay circuit (4) The adder (8) calculates the 2D delay output signal f (t-2D) of the delay circuit (4) and the 3D delay output signal f (t-3D),
Sum of output signals f (t-4D) of delay circuit (5) To calculate. The subtractor (9) outputs the output of the adder (7) every time. And the output of the adder (6) Difference And the absolute value circuit (11) outputs the absolute value X of the subtraction result. Similarly, the subtractor (10) And the absolute value circuit (12) outputs the absolute value Y of the subtraction result.
比較器(13)は、絶対値XとYの大小の比較を行い、
X<Yの期間は切換スイツチ(14)を端子aに切換えて
信号f(t+3D)を出力し、X=Yのときには端子bに
切換えて信号f(t)を出力し、X>Yの期間は端子C
に切換えて信号f(t−3D)を出力する切換制御信号を
出力する。この結果出力端子(15)からは第2図(a)
に示すようなノイズ成分を含む映像信号が入力された場
合であつても第2図(b)に示す信号g(t)が出力さ
れる。この出力g(t)は、第5図(b)の様に雑音に
よる選択誤りによつて生じた好ましくない信号が生じる
ことなく、雑音のない場合の第4図(b)に示する出力
g(t)に概ね似た波形となつており、雑音による選択
誤りを防いで信号の立ち上り(トランジエント)時間が
改善される。The comparator (13) compares the magnitudes of absolute values X and Y,
In the period of X <Y, the switching switch (14) is switched to the terminal a to output the signal f (t + 3D), and when X = Y, it is switched to the terminal b to output the signal f (t). Is terminal C
And a switching control signal for outputting the signal f (t-3D). As a result, the output terminal (15) is shown in FIG. 2 (a).
The signal g (t) shown in FIG. 2B is output even when a video signal containing a noise component as shown in FIG. This output g (t) is the output g shown in FIG. 4 (b) when there is no noise without the generation of an undesired signal caused by a selection error due to noise as shown in FIG. 5 (b). The waveform is almost similar to that of (t), which prevents the selection error due to noise and improves the signal rise (transient) time.
なお上記実施例における演算を式で表わすと として表わされる。In addition, when the calculation in the above embodiment is expressed by an equation, Is represented as
なお、上記実施例では、3つの被切換信号を、3Dの時
間差を有する信号f(t+3D),f(t),f(t−3D)と
したが、時間間隔は、三者の信号間に相関があればどの
ような時間差にしても良い。In the above embodiment, the three switched signals are the signals f (t + 3D), f (t), f (t-3D) having a 3D time difference, but the time interval is three signals. If there is a correlation, any time difference may be set.
また、上記実施例では雑音の影響を少なくする為に、被
切換信号とその前・後2つの信号の加算値を用いたが、
平均値としてもよく、また、加算または平均値をとる信
号の(サンプルの)数を多くすればより雑音の影響を少
なくすることができる。Further, in the above embodiment, in order to reduce the influence of noise, the added value of the signal to be switched and the two signals before and after it is used.
The average value may be used, and the effect of noise can be further reduced by increasing the number of signals (samples) that are added or averaged.
[発明の効果] 以上のように、この発明によれば、入力信号を遅延さ
せて遅延量の異なる3つの被切換信号を作成し、これら
3つの被切換信号それぞれについて、上記遅延量よりは
小さい単位時間ずつ遅れた信号および進んだ信号を作成
して加算値もしくは平均値を算出し、これらの加算値も
しくは平均値にもとづいて切換信号を作成して上記3つ
の被切換信号を切り換えるように構成したものであるか
ら、入力信号に雑音が含まれている場合であつても単位
時間遅れた信号および進んだ信号との加算値もしくは平
均値で振幅比較を行うため雑音の影響が減殺されるの
で、選択誤りが少なくなり、雑音の影響の少ない映像信
号の輪郭補正装置が得られる効果がある。[Effects of the Invention] As described above, according to the present invention, the input signal is delayed to create three switched signals having different delay amounts, and each of these three switched signals is smaller than the delay amount. A configuration in which a signal delayed by unit time and a signal advanced by each time are created to calculate an added value or an average value, and a switching signal is created based on the added value or the average value to switch the above three switched signals Therefore, even if the input signal contains noise, the effect of noise is reduced because the amplitude comparison is performed with the added value or average value of the signal delayed by the unit time and the signal advanced. There is an effect that a selection error is reduced and a contour correction device for a video signal with less influence of noise can be obtained.
第1図はこの発明の一実施例のブロツク回路図、第2図
はこの実施例の動作を説明するための各部の信号波形
図、第3図は先出願に係る輪郭補正装置の一構成例のブ
ロツク回路図、第4図および第5図はそれぞれこの構成
例の動作を説明するための各部の信号波形図である。 (2),(3),(4),(5)……遅延回路、
(6),(7),(8)……加算器、(9),(10)…
…減算器、(11),(12)……絶対値回路、(13)……
比較器、(14)……切換スイツチ。 なお、各図中、同一符号は同一、または相当部分を示
す。FIG. 1 is a block circuit diagram of an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part for explaining the operation of this embodiment, and FIG. 3 is a structural example of a contour correction device according to the prior application. FIG. 4 is a block circuit diagram, and FIGS. 4 and 5 are signal waveform diagrams of respective parts for explaining the operation of this configuration example. (2), (3), (4), (5) ... Delay circuit,
(6), (7), (8) ... Adder, (9), (10) ...
… Subtractor, (11), (12) …… Absolute value circuit, (13) ……
Comparator, (14) ... Switching switch. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
た第1の遅延信号を取り出す第1の遅延手段と、上記入
力された映像信号より上記所定時間より大きい時間だけ
遅れた第2の遅延信号を取り出す第2の遅延手段と、 上記第1の遅延手段への入力信号より上記所定時間より
は小さい単位時間だけ遅れた信号および進んだ信号を取
り出し、これらの信号および当該入力信号の加算値もし
くは平均値を算出する第1の加算手段と、 上記第1の遅延信号より上記単位時間だけ遅れた信号お
よび進んだ信号を取り出し、これらの信号および当該第
1の遅延信号の加算値もしくは平均値を算出する第2の
加算手段と、 上記第2の遅延信号より上記単位時間だけ遅れた信号お
よび進んだ信号を取り出し、これらの信号および当該第
2の遅延信号の加算値もしくは平均値を算出する第3の
加算手段と、 上記第2の加算手段の算出値から上記第1の加算手段の
算出値を減算した値の絶対値X,および上記第2の加算手
段の算出値から上記第3の加算手段を減算した値の絶対
値Yを算出する手段と、 上記絶対値X,Yの大小を比較してX<Yの期間は上記第
1の遅延手段への入力信号を選択し、X=Yの期間は上
記第1の遅延信号を選択し、X>Yの期間は上記第2の
遅延信号を選択して出力する手段とを備えた輪郭補正装
置。1. A first delay means for extracting a first delay signal delayed by a predetermined time from an input video signal, and a second delay delayed by a time longer than the predetermined time from the input video signal. Second delay means for extracting a signal, and a signal delayed by a unit time smaller than the predetermined time and a signal advanced from the input signal to the first delay means, and the added value of these signals and the input signal. Alternatively, a first addition means for calculating an average value and a signal delayed by the unit time and a signal advanced from the first delay signal are taken out, and an addition value or an average value of these signals and the first delay signal is taken out. And a signal which is delayed by the unit time from the second delay signal and a signal which has advanced, and the addition of these signals and the second delay signal. A third adding means for calculating a value or an average value, an absolute value X of a value obtained by subtracting the calculated value of the first adding means from the calculated value of the second adding means, and the second adding means. The means for calculating the absolute value Y of the value obtained by subtracting the third adding means from the calculated value is compared with the magnitude of the absolute values X, Y, and input to the first delay means for the period of X <Y. A contour correcting apparatus comprising: a signal selecting unit for selecting the first delay signal during the period X = Y and selecting and outputting the second delay signal during the period X> Y.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63097585A JPH088651B2 (en) | 1988-04-20 | 1988-04-20 | Contour correction device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63097585A JPH088651B2 (en) | 1988-04-20 | 1988-04-20 | Contour correction device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01268359A JPH01268359A (en) | 1989-10-26 |
| JPH088651B2 true JPH088651B2 (en) | 1996-01-29 |
Family
ID=14196315
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63097585A Expired - Lifetime JPH088651B2 (en) | 1988-04-20 | 1988-04-20 | Contour correction device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH088651B2 (en) |
-
1988
- 1988-04-20 JP JP63097585A patent/JPH088651B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01268359A (en) | 1989-10-26 |
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