JPH088774B2 - Inverter device parallel operation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention uses a plurality of inverter devices in order to increase the capacity of a voltage source inverter, and operates by connecting their outputs in parallel via a reactor. The present invention relates to a parallel operation circuit of an inverter device.

[Conventional technology]

FIG. 4 is a circuit diagram showing an example of a parallel operation circuit of a conventional inverter device. This is an example of the parallel connection via the output reactor of the two single-phase inverters INV1, INV2 fed from a common DC power source, the transistor T _P1
, T _P2 and T _N1 and T _N2 are driven at the same point, an arc extinguishing signal, in order to double the output capacity.

Generally, even when inverter devices are connected in parallel via an output reactor and they are operated in the same phase, an unbalanced current is generated due to variations in the characteristics of the switching elements (turn-on and turn-off time, on-voltage, etc.).

Figures 5A and 5B are modeled examples of unbalanced current waveforms that occur due to variations in the turn-on and turn-off characteristics of the switching element. Figure 5A, in the case of the load current i _L> 0, P is a transistor (positive) side arm, T _P1 turns on earlier than T _P2 in the ON state, an example in which T _P2 is turned off earlier than T _P1 at the time of OFF Shows. In this case, a positive voltage is applied to the output reactor during turn-on and turn-off, resulting in an unbalanced current ( Is defined. ) Also increases positively. In this example, since the load current i _L > 0, the N-side arm transistors T _N1 and T _N2 do not conduct, and therefore the N-side arm transistors T _N1 and T _N2 do not conduct, and therefore An unbalanced current due to the switching time difference of the transistor on the N-side arm does not occur.

In addition, FIG. 5B shows that when load current i _L <0,
(Negative) side arm transistor is in the ON state T _N2 is T _N1
It shows an example of turning on earlier and turning off T _N1 earlier than T _N2 when off. Also in this case, a positive voltage is applied to the output reactor during turn-on and turn-off, as in FIG. 5A, and the resulting unbalanced current also increases positively. In this example, since the load current i _L is i _L <0, the transistors T _P1 and T _P2 in the P-side arm do not conduct, and therefore an unbalanced current due to the switching time difference between the transistors in the P-side arm does not occur. . On the other hand, when the switching timing has a relationship opposite to the example shown in FIGS. 5A and 5B, a negative voltage is applied to the output reactor, and as a result, the unbalanced current increases negatively.

As described above, the unbalanced current resulting from the unbalanced voltage due to the variation in the turn-on and turn-off characteristics of the switching element depends only on the variation in the characteristic of the switching element on the P side when the load current i _L > 0. Load current i _L <0
In this case, it depends only on the variation in the characteristics of the switching element on the N side, and its polarity is as shown in FIGS. 5A and 5B.

[Problems to be solved by the invention]

The unbalanced current generated as described above may impair the load sharing of the inverter, and in the worst case, one inverter may be fully loaded. Further, the output reactor connected for suppressing the unbalanced current has a suppressing effect on the AC component of the unbalanced current, but does not suppress the DC component. Note that in the case of a device that operates at a variable frequency such as a VVVF (variable voltage variable frequency) inverter, low frequency components and DC components may be included, especially at low frequency operation, and unbalanced current can be suppressed only by the output reactor. Is difficult. As a result, there are problems that the output reactor becomes large and the output capacity of the parallel inverter decreases.

Therefore, the present invention reduces the size of the output reactor during the parallel operation of the voltage source inverter devices and enables the parallel operation of the inverter devices capable of increasing the output capacity of the parallel inverter by approximately n times (n: the number of parallel units). The purpose is to provide a circuit.

[Means for solving problems]

In order to connect and operate n single-phase or multi-phase voltage source inverter devices fed by a common DC power source in parallel by an output reactor, other inverter devices operated in parallel with the output current of the reference inverter device are operated. A detection circuit for detecting a deviation current from the output current, (n-1) regulators for performing a predetermined adjustment operation to make the deviation current zero, and a P-side arc extinguishing output from the inverter controller. Governing a point extinguishing signal to a switch element constituting the P-side arm of the voltage source inverter device based on the command and the output of the controller,
P including the ramp function generated based on the P side arc extinguishing command
A P-side reference signal generating circuit that outputs a side reference signal, and a switch that configures an N-side arm of the voltage source inverter device based on an N-side point extinguishing command output from an inverter control device and the output of the regulator. Controls the point extinguishing signal to the element,
N including a ramp function generated based on the N side arc extinguishing command
An N-side reference signal generation circuit that outputs a side reference signal and a comparator that determines a point extinguishing signal to each switch element are provided, and the P-side reference signal is compared with zero volt to form a reference inverter device. Create a point extinguishing signal to the P-side arm to configure,
The P-side reference signal is compared with the regulator output to generate a point extinguishing signal to a P-side arm that constitutes an inverter device other than the reference inverter device, and the N-side reference signal is compared with zero volt. Then, a point extinguishing signal to the N-side arm that constitutes the reference inverter device is created, and the N-side reference signal and the controller output are compared, and the N side that constitutes an inverter device other than the reference inverter device. A point extinguishing signal to the arm is created, and when the deviation current is positive, the point extinguishing signal of the other inverter device which is operated in parallel with the point extinguishing signal of the reference inverter device is set to the P side DC busbar. When the switch element connected to the switch is turned on, the phase is advanced, when the switch element is turned off, the phase is delayed, and when the switch element connected to the N-side DC bus is turned on, the phase is delayed, and the switch element is turned off. On the other hand, when the deviation current is negative, the relationship between the point of the reference inverter device and the arc extinguishing signal and the point of the other inverter device operated in parallel and the arc extinguishing signal is opposite to the above. To be in a phase relationship of.

[Action]

When operating the voltage source inverter device in parallel, the output currents of the phases connected in parallel are detected, and the points of the reference inverter device and the arc extinguishing signal are set so that the DC component of the deviation current and the low frequency AC component are made zero. On the other hand, the points of the other inverters that are operated in parallel and the phase of the arc extinguishing signal are correspondingly
-1) The output reactor is downsized by suppressing the output capacity by automatic control using the controller of the stand.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the present invention. In order to adjust the switching time difference of the switching elements between the parallel inverters INV1 and INV2, the DC component of the unbalanced current and the AC component of low frequency are set to zero. It is configured by adding an automatic control circuit. In the figure, 1 and 2 are point extinguishing signal generation circuits, 3 is a controller, and 4 is an inverter control device. That is, the present invention can control the unbalanced current as described above by adjusting the voltage v _LB of the output reactor, but since the voltage v _LB of this output reactor is approximately proportional to the switching time difference of the switching elements between the parallel inverters, This is based on the principle that it can be controlled by positively adjusting this. Since the polarity of the output reactor voltage v _LB , the switching element points between the parallel inverters, and the arc extinguishing order are related as shown in Table 1, adjust the points and arc extinguishing order shown in this table. For example, v _LB can be controlled arbitrarily, and as a result, the unbalanced current can also be controlled arbitrarily.

In the example of FIG. 1, the point and the arc extinguishing signal of the inverter INV2 are adjusted with reference to the point and the extinguishing signal of the inverter INV1. That is, two unit inverters INV1, I
The deviation i ₁ −i ₂ is obtained from the output currents i ₁ and i _{2 of} NV2, and this deviation current i ₁ −i ₂ is supplied to the controller 3 via a first-order lag filter (not shown) for the ripple low band. By inputting this signal, the controller 3 outputs the INV2 point and the arc-extinguishing signal phase-shifting command to make i ₁ −i ₂ zero. Based on this, the INV2 point and the extinguishing signal are input to the INV1 point and the extinguishing signal. Point extinguishing signal generating circuit including a phase shifter for advancing or delaying an arc signal by a predetermined time
Input to 1 and 2 to determine the switching timing of the inverter INV2. As a result, the output reactor voltage v _LB
Also has an average value of the unbalanced currents i ₁ −i ₂ .

Although FIG. 1 shows the case where the number of parallel inverter devices is two, the present invention can be applied to the case of three or more. For example, in the case of three parallel connections, the inverter INV1 is used as a reference inverter, and the points of the inverters INV2 and INV3 and the arc extinguishing signal are adjusted so that i ₁ −i ₂ and i ₁ −i ₃ are controlled to zero. do it. Note that i ₁ is the output current of INV1, i ₂ , i
₃ is the output current of INV2, INV3.

Although FIG. 1 shows an example of a single phase, even in the case of a multi-phase inverter, the same effect can be obtained by applying the present invention for each phase. Furthermore, the same effect can be obtained by applying the present invention to a self-turn-off device such as a GTO (gate turn-off) thyristor as well as a switching device as a transistor.

FIG. 2 is a circuit diagram showing a concrete example of the point extinction signal generating circuit and the regulator shown in FIG. In the figure, 11 and 21 are a ramp waveform generating circuit including a NOT gate NOT, an analog switch SW, a resistor R, a capacitor C and an operational amplifier (op amp) OP, 12A, 12B and 21A, 21B are comparators, 3 is a resistor R, It is a regulator including a capacitor C and an operational amplifier OP. Therefore, it can be said that the lamp extinguishing signal generating circuit 1 (2) is composed of the ramp waveform generating circuit 11 (21) and the comparators 12A, 12B (21A, 21B). Then, in this configuration, the point of the inverter INV1 and the extinguishing signal are used as a reference, and the point of the INV2 and the extinguishing signal are adjusted. Also, the voltage of the output reactor v _LB
The relationship between the polarity of INV2, the point of INV2, the point of INV1 of the extinguishing signal, and the function of advance and delay with respect to the extinguishing signal are shown in Table 2.

Since the point and the arc extinguishing signal cannot be advanced with respect to the original signal (T _P , T _{N in} FIG. 1), the point of the reference inverter INV1 and the extinguishing signal are turned on with respect to the original signal. It is configured so that it is delayed by the same amount of time in advance and the point of INV2 and the extinguishing signal are advanced with respect to that signal.

FIG. 3 is a time chart for explaining the operation of FIG. The waveform name symbols in the figure correspond to the waveforms of the portions of the signal described in FIG.

The point of the P-side arm transistor, the arc extinguishing signal T _P and the point of the N-side arm transistor, and the arc extinguishing signal T _N supplied from the inverter controller 4 are input to the ramp waveform generating circuits 11 and 21 for movement control. Then, waveforms such as A and B in FIG. 3 are obtained. The analog switch SW used in the ramp waveform generation circuits 11 and 21 is assumed to be "closed" when the control input is logic "0" and "open" when the control input is logic "1". Be the reference
The INV1 point and the arc extinguishing signals T _P1 and T _N1 are
It is generated at the intersection of the signals A and B with zero volt by 21A and drives the switching transistor of the inverter INV1. On the other hand, the phase-controlled INV2 point and arc extinguishing signals T _P2 and T _N2 are generated at the intersections of the signals A and B and the output ΔV _LB ^* of the controller 3 by the comparators 12B and 21B, and the switch of the inverter INV2 is generated. Drive the transistor. The output signal ΔT _LB ^* of the adjuster 3 becomes positive when i ₁ > i ₂ , while i
_It is connected to a polarity that becomes negative when ₁ <i ₂ , and outputs a voltage that i ₁ = i ₂ in the steady state.

〔The invention's effect〕

According to the present invention, in parallel operation of the voltage source inverter device, the output currents of the phases connected in parallel are respectively detected, and the point of the reference inverter is set so that the DC component of the deviation current and the AC component of the low frequency are made zero. Since the points of other inverters that are operated in parallel and the phase of the arc extinguishing signal are automatically adjusted with respect to the arc extinguishing signal, the output reactor can be downsized and the output capacity of the parallel inverter can be increased by almost n times ( n: number of units in parallel). As a result, it is possible to provide a large-capacity inverter device which is smaller in size and lower in cost than before.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a concrete example of the point extinguishing signal generating circuit shown in FIG. 1, and FIG. 3 is for explaining the operation of FIG. FIG. 4 is a circuit diagram showing an example of a parallel operation circuit of a conventional inverter device, FIG. 5A is a time chart for explaining the operation when the load current is positive in FIG. 4, and FIG. Similarly, it is a time chart for explaining the operation when the load current is negative. Code explanation 1, 2 ...... Point extinguishing signal generation circuit, 3 ...... Controller, 4 ...... Inverter control device, 11, 12 ...... Ramp waveform generation circuit, 12
A, 12B, 21A, 21B …… Comparator, INV1, INV2 …… Inverter device, TR …… Switching transistor, NOT ……
Not gate, SW ... Analog switch, R ... Resistance,
C: capacitor, OP: operational amplifier (op amp).

Claims (1)

[Claims] 1. An output of a reference inverter device for connecting and operating n (where n is an integer) single-phase or multi-phase voltage source inverter devices fed by a common DC power source in parallel by an output reactor. A detection circuit that detects a deviation current between the current and the output current of another inverter device that is operated in parallel, and a predetermined adjustment calculation to make the deviation current zero (n-
1) A controller, and a point extinction to a switch element forming a P side arm of the voltage source inverter device based on a P side arc extinguishing command output from an inverter control device and an output of the regulator. A P-side reference signal generating circuit that controls a signal and outputs a P-side reference signal including a ramp function generated based on the P-side point extinguishing command, an N-side point extinguishing command output from an inverter controller, and the adjustment Based on the output of the voltage regulator, it controls a point extinguishing signal to a switch element forming the N side arm of the voltage source inverter device, and an N side reference signal including a ramp function generated based on the N side point extinguishing command. An N side reference signal generating circuit for outputting and a comparator for determining a point extinguishing signal to each switch element are provided, and the P side constituting the reference inverter device is compared with the P side reference signal and zero volt. Point extinguishing signal to arm And comparing the P-side reference signal with the regulator output to create a point extinguishing signal to the P-side arm that constitutes an inverter device other than the reference inverter device. By comparing with the bolt, a point extinguishing signal to the N-side arm constituting the reference inverter device is created, and the N-side reference signal and the controller output are compared to determine an inverter device other than the reference inverter device. A point extinguishing signal for the N-side arm to be configured is created, and when the deviation current is positive, a point extinguishing signal of another inverter device that is operated in parallel with respect to the point extinguishing signal of the reference inverter device, When the switch element connected to the P side DC bus is turned on, the phase is advanced, when the switch element is turned off, the phase is delayed, and when the switch element connected to the N side DC bus is turned on, the phase is delayed. When the element is single off, the phase is advanced, while when the deviation current is negative, the point of the reference inverter device,
A parallel operation circuit of an inverter device, characterized in that a relationship between a point of another inverter device operated in parallel and an extinction signal with respect to the arc extinguishing signal has a phase relationship opposite to the above.