JPH09319690A - Firmware control system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily deal with the change of a device, which is to be controlled by a firmware, at the time of changing the device. SOLUTION: A ROM 21 stores plural graphic firmwares. A select value for selecting any firmware corresponding to a graphic device to be connected is inputted to a select value input means 6. When a processor 1 performs access to an area allocated to the graphic firmware inside a memory address space, an address corresponding to the select value inputted by the select value input means 6 is generated by a decoder 7 and a selector 8 and the desired graphic firmware is called from the ROM 21.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a firmware control system for an information processing device.

[0002]

2. Description of the Related Art In an information processing apparatus, particularly a PCAT specification apparatus, since firmware for a device such as a display is determined to be stored in a specific address space of a memory, it corresponds to a display to be connected. Only the firmware is stored in ROM.

Further, since such firmware is supplied from the manufacturer of the display controller that it controls, it is generally impossible for the user to customize it except for some parameters. further,
Since this firmware is stored in the ROM and incorporated in the device, it is necessary to replace parts in order to support different displays.

[0004]

When it is attempted to provide an information processing apparatus capable of easily connecting a plurality of types of displays having different parameters and the like, a ROM storing firmware corresponding to each display is prepared and the display is provided. It is necessary to select a suitable ROM at the time of connection and mount it again.

There is also a method in which a rewritable ROM is prepared and rewriting is performed at the time of operation on the device. However, when the firmware of the display is changed on the way, the display that has been displayed up to that point is displayed. It may not be displayed and the change end message cannot be displayed, which may hinder the work. There is a problem of more easily and cheaply responding to these problems.

Most of the devices use only a general-purpose display, so that existing ROMs are used as much as possible.
However, there is a problem that cost can be reduced by using the above and making only necessary devices expandable. further,
To prevent the operation from stopping because a substitute cannot be obtained and the device cannot be used if the display fails while using a special display in a situation where it can support multiple types of special displays. To
There is a problem that a general-purpose display can be easily connected.

[0007]

In order to solve the above-mentioned problems, the present invention reads firmware for controlling a device having a processor from a storage means and stores it in a predetermined address space of a memory. In the firmware control method capable of controlling the device, the storage means stores basic firmware for controlling a certain basic device and a plurality of application firmware for controlling application devices different from the basic device. At the same time, a selection value input means for inputting a selection value for selecting desired firmware from the storage means according to a connected device, an address from a processor, and a selection value from the selection value input means. Select means for selecting the address of the processor. If address a specific address space assigned to scan, in which so as to produce a single address in the basic firmware or application firmware based on the selected value from the selected value input means.

[0008]

FIG. 1 is a block diagram showing a first embodiment of a firmware control system of the present invention. In the figure, 1 is a processor, and 21 is a ROM for storing firmware. Here, the capacity of the ROM 21 is 512 KB.

Reference numeral 4 is a data signal from the ROM 21 to the processor 1, and 5 is a control signal for the processor 1 to control the ROM 21. 6 is a selection value input means, which is the ROM
The selection value for selecting the firmware corresponding to the connected graphic device is stored from the plurality of types of graphic firmware stored in 21. The selected value is 4-bit information here.

The selection value input means 6 is, for example, a short plug, a register, an external signal, or a ROM. 302 is an output signal of the selection value input means 6. A decoder 7 decodes the graphic firmware area in the address space using the address signal 301 from the processor 1 and notifies it by a signal 303.

A selector 8 selects the address signal 302 from the selection value input means 6 and the address signal 301 from the processor 1 by a signal 303 from the decoder 7. Reference numeral 304 denotes an output signal from the selector 8. The output signal 304 and a part of the address signal 301 from the processor 1 are connected to the ROM 21 as an address.

FIG. 2 is an explanatory diagram showing the relationship between the memory address space and the ROM. In the memory address space (not shown), address spaces C0000H to FFFFFH
From the address 00000H of ROM21 to 7FFFF
Corresponds to H. An area 101 is allocated to the graphic firmware in the memory address space, and is one space of 32 KB from C0000H to C7FFFH.

An area 103 is allocated to other firmware in the memory address space and is C8000H.
To FFFFFH space. 120-128 is RO
Of the nine graphic firmware stored in M21, for example, the graphic firmware 120 is RO
In the area from M address 00000H to 07FFFH, the graphic firmware 121 is 08000H to 0.
Graphic firmware 12 in the FFFFH area
8 is stored in the area of 40,000H to 47FFFH.

Reference numeral 141 denotes an area in the ROM 21 for storing firmware other than graphics, which is 48000.
The area from H to 7FFFFH is allocated. less than,
The operation of the first embodiment will be described. When a memory address space that is not graphic firmware is accessed, the address signal 301 from the processor 1 is not decoded by the decoder 7, so the selector 8 selects the address signal 301 and notifies the ROM 21 of it.

For example, when the address C8000H is accessed, the ROM 21 stores 480 lower 19 bits.
00H is notified and that address in ROM is accessed. When the graphic firmware space is accessed, the address signal 301 from the processor 1 is decoded by the decoder 7, and the address signal 302 on the side of the selection value input means 6 is selected by the selector 8 by the signal 303. The ROM 21 is notified together with the lower 15 bits of the address signal 301.

For example, when 0H is set as the selection value by the selection value input means 6, the address C0000H
Is accessed, 0H (4 bits) from selector 8
Is output, which becomes the upper 4 bits of the address of the ROM 21 and becomes 00000H together with the lower 15 bits of the address signal 301 from the processor 1, and the start address of the graphic firmware 120 allocated to the area of 0000H to 7FFFH in the ROM 21. Will be accessed.

The selected value input means 6 receives 1 as the selected value.
If H is set, ROM 21 is notified of 08000H, and ROM 21 reads 08000H to 0FFF.
The head address of the graphic firmware 121 assigned to the FH area is accessed. In this way, when the graphic firmware area of the memory address space is accessed, one of the graphic firmware on the ROM 21 is selected according to the selection value set in the selection value input means 6, and that area is accessed. By making it possible to switch the selected value according to the connected graphics device, the graphics firmware corresponding to the connected graphics device will be selected, and the processor side will not be aware of the corresponding firmware. Can be used.

If there is a free area in the other firmware area 141 of the ROM 21, this free area can be used as a graphic firmware area because it can be selected according to the selection value, and the number of options can be increased. is there. As described above, in the first embodiment of the present invention, the processor only accesses the graphic firmware area of the memory address space as in the conventional case, and the processor selects a desired one from the plurality of graphic firmware according to the selected value. It is possible to call one of the graphics graphics, and the program does not need to be specially changed to call the desired graphics firmware from among multiple graphics firmware, so the processor does not have to be aware of the connected graphics. You can use the graphic firmware corresponding to the device.

Further, the number of options can be increased or decreased according to the ROM capacity, and the cost can be optimized. Furthermore, when changing the graphic device, it is not necessary to disassemble the device to replace the ROM, and it is possible to easily cope with the change of the selected value. Further, it does not affect the PCAT specifications or the specifications of the information processing apparatus.

Furthermore, it is possible to add graphic firmware with almost no increase in the ROM mounting area. Further, since the graphic firmware can be switched at high speed, the display can be switched smoothly when the graphic device is switched. FIG. 3 is a block diagram showing a second embodiment of the firmware control system of the present invention.

In the figure, 1 is a processor, and 22 and 23.
Is a ROM that stores firmware. Here, the basic graphic firmware of the basic graphic device that is normally used is stored in the ROM 23 together with the firmware other than the graphic, and the applied graphic firmware of other applied graphic devices is stored in the ROM 22.

Reference numeral 4 is a ROM 22, a data signal from the ROM 23 to the processor 1;
This is a control signal for controlling the ROM 23. A selection value input means 6 stores selection values for selecting the graphic firmware corresponding to the connected graphic device from the plurality of types of graphic firmware stored in the ROMs 22 and 23. . The selected value is 4-bit information here.

The selection value input means 6 is, for example, a short plug, a register, an external signal, or a ROM. 302 is an output signal of the selection value input means 6. A decoder 7 decodes the graphic firmware area in the address space using the address signal 301 from the processor 1 and notifies it by a signal 310.

A selector 81 selects the address signal 302 from the selection value input means 6 and the address signal 301 from the processor 1 by a signal 310 from the decoder 7. The signal 311 is the signal selected by the selector 81. Reference numeral 91 is a logical product gate of the negative logic of the output signal 311 of the selector 81 and the control signal 5 from the processor 1, and the output signal 312 which is the result of the logical product is RO
Control M22.

Reference numeral 92 is a logical product gate of the positive logic of the signal 311 and the control signal 5, and the resulting output signal 313 is RO.
Control M23. Figure 4 shows the memory address space and ROM
It is explanatory drawing which shows the relationship. Here, in the memory address space, from address space C0000H to FFFFF
H is assigned to the ROM 22 and the ROM 23.

Reference numeral 101 denotes an area assigned to the graphic firmware in the memory address space,
It is one space of 32 KB from C0000H to C7FFFH. Reference numeral 103 is an area allocated to other firmware in the memory address space, from C8000H to FF.
It is the space of FFFH. 120 to 127 are eight graphic firmware stored in the ROM 22. For example, the graphic firmware 120 is in the area of the ROM 22 from address 00000H to 07FFFH, and the graphic firmware 121 is 08000H to 0F.
In the area of FFFH, graphic firmware 127
Is stored in the area from 38000H to 3FFFFH.

Reference numeral 128 is graphic firmware stored in the ROM 23, which is from 00000H to 07FFFH.
Area is allocated. An area 141 stores firmware other than graphics in the ROM 23, and areas 08000H to 3FFFFH are allocated. The operation of the second embodiment will be described below.

A memory address space that is not graphic firmware, for example, C8000H to FFFFFH
Is accessed, the address signal 301 from the processor 1 has all address bits 17 to 15 0.
That is not the case, so that it is not decoded by the decoder 7. Therefore, the selector 81 causes the address signal 301
The address bit 18 is selected and the signal 311 is notified to the gates 91 and 92.

Since the address bit 18 of the address signal 301 has a logical value of 1 in the ROM space, it passes through the gate 92 and is notified to the ROM 23. For example,
ROM 23 when address C8000H is accessed
Is notified of the lower 18 bits of 08000H.
The first address of is accessed.

When the graphic memory address space, here C0000H to C7FFFH, is accessed, the address signal 301 from the processor 1 is decoded by the decoder 7 because the address bits 17 to 15 are all 0s. . Therefore, in the selector 81, the signal 302 from the decoder 7 selects the signal 302 on the side of the selection value input means 6 and notifies the gates 91 and 92 as the signal 311.

Since the logical value of the most significant bit from the selection value input means 6 is 0, it passes through the gate 91 and R
Control the OM22. As a result, the lower 15 bits of the address signal 301 from the processor 1 and the 3-bit signal from the selection value input means 6 address the ROM 22. For example, when the selected value is set to 0H by the selected value input means 6 and the address C0000H is accessed, 0H (3 bits) is output from the selector 81, which becomes the upper 3 bits of the address of the ROM 22. , 0000H is set together with the lower 15 bits of the address from the processor 1, and the head of the area 120 of the ROM 22 is accessed. When the selected value is set to 1H by the selected value input means 6, the ROM 22 has 0.
8000H is notified, and the head of the area 121 of the ROM 22 is accessed.

When the graphic firmware area 128 on the ROM 23 side is accessed, the logical value of the signal 302 selected by the selector 81 becomes 1 by setting the setting value at the setting value input means 6 to 8H. Therefore, the ROM 23 can be controlled and accessed. In this way, when the graphic firmware area of the memory address space is accessed, the ROM 22 or the RO is selected according to the selection value set in the selection value input means 6.
One of the graphic firmwares on M23 is selected and that area is accessed. By making it possible to switch the selected value according to the connected graphics device, the graphics firmware corresponding to the connected graphics device will be selected, and the processor side will not be aware of the corresponding firmware. Can be used.

If there is a free area in the other firmware area of the ROM 23, this free area can be used as a graphic firmware area because it can be selected according to the set value, and the choices can be increased. . As described above, in the second embodiment of the present invention, it is not necessary to specifically change the program for calling the firmware in the processor, so that the processor can handle the connected device without being aware of it. Graphic firmware can be used.

Further, since the conventional ROM can be used as it is and the ROM storing the graphic firmware can be added only when the selection on the graphic side is necessary, flexibility can be provided in the system configuration. Further, the options can be increased or decreased according to the capacity of the ROM, and the cost can be optimized.

When changing the graphic device,
It is not necessary to disassemble the device to replace the ROM, and it is possible to easily cope with it only by changing the selected value. Further, it does not affect the PCAT specifications or the specifications of the information processing device. FIG. 5 shows a third firmware control method of the present invention.
It is a block diagram showing an embodiment.

In the figure, 1 is a processor, and 21 is a ROM for storing firmware. Where this RO
The capacity of M21 is 512 KB. 4 is a data signal from the ROM 21 to the processor 1;
This is a control signal for controlling M21. Reference numeral 6 denotes a selection value input means, which stores selection values for selecting the graphic firmware corresponding to the connected graphic device from a plurality of types of graphic firmware stored in the ROM 21. The selected value is 4-bit information here.

The selected value input means 6 may be, for example, a short plug, a register, an external signal, or a ROM. 302 is an output signal of the selection value input means 6. A decoder 7 decodes the graphic firmware area in the address space using the address signal 301 from the processor 1 and notifies it by a signal 322.

Reference numeral 93 is a logic gate composed of a 2-input AND gate, which takes the logical product of the output signal 322 from the decoder 7 and the signal 321 from the outside, and the output 323 becomes the selector signal of the selector 8. The selector 8 selects the signal 302 from the selection value input means 6 and the signal 301 from the processor 1 by the selector signal 323 from the logic gate 92.

Reference numeral 304 denotes an output signal from the selector 8. The output signal 304 and a part of the signal 301 from the processor 1 are connected to the ROM 21 as an address. The operation of the third embodiment will be described below. In the third embodiment, the memory address space and the ROM
Since the relation of is the same as that described in FIG.
2 will be referred to in explaining the operation of the embodiment.

When a signal 321 from the outside has a logical value of 1 and a memory address space which is not graphic firmware is accessed, the address signal 301 from the processor is not decoded by the decoder 7 and the logic gate 93 of the logic gate 93 is accessed. Since the output has a logical value of 0, the selector 8 selects the address signal 301 and notifies the ROM.

For example, when the memory address C8000H is accessed, the ROM 21 is notified of the lower 19 bits 48000H, and the address in the ROM 21 is accessed. When the graphic firmware space is accessed when the signal 321 from the outside has the logical value 1, the address signal 301 from the processor
Is decoded by the decoder 7 and the output of the logic gate 93 also becomes a logic value 1. Therefore, the selector signal 322 selects the signal 302 on the selection value input means 6 side by the selector 8 and the lower 1 of the address signal 301 from the processor.
The ROM 21 is notified together with 5 bits.

For example, when 0H is set by the selection value input means 6, when the memory address C0000H is accessed, the selector 8 outputs 0H (4 bits), which is the upper 4 bits of the address of the ROM 21. Becomes 00000H together with the lower 15 bits of the address from processor 1 and 0000H in ROM 21
To 8000H, the head address of the graphic firmware 120 allocated to the area from 8000 to 8000H is accessed.

Thus, when the graphic firmware space is accessed when the signal 321 from the outside has the logical value 1, the ROM 21 on the ROM 21 is selected according to the selected value set in the selected value input means 6. One of the graphic firmware is selected and its area is accessed.
In this way, by selecting the graphic firmware corresponding to the connected graphic device, the corresponding firmware can be used without the processor's awareness.

When a signal 321 from the outside has a logic value of 0 and a memory address space which is not graphic firmware is accessed, the address signal 301 from the processor 1 is not decoded by the decoder 7 and the logic gate 93 is used. Since the output of is also a logical value 0, the selector 8
Selects the address signal 301 and notifies it to the ROM 21.

For example, when the memory address C8000H is accessed, the ROM 21 is notified of the lower 19 bits of 48000H, and the address of the ROM 21 is accessed. When the graphic firmware space is accessed when the signal 321 from the outside has the logical value 0, the address signal 301 from the processor
Is decoded by the decoder 7, but its output becomes a logical value 0 because it is gated by the logic gate 93, and the selector 8
Selects the address signal 301, and the address from the processor 1 is directly notified to the ROM 21.

Therefore, the memory address space C000 allocated to the graphic firmware is used.
The access from 0H to C7FFFH is the access to the area 128 of 40000H to 47FFFH of the ROM 21 in the lower 19 bits. By setting this area as the area of the conventional basic graphic firmware, when the memory address space allocated to the graphic firmware is accessed when the signal 321 from the outside has the logical value 0. Is a ROM regardless of the selection value set in the selection value input means 6.
The basic graphic firmware on 21 was selected,
The area is accessed.

As described above, in the third embodiment, the mode in which the graphic firmware can be selected according to the selection value by the signal from the outside and the mode in which only the area which is conventionally covered by the ROM is accessed are provided. You can choose. As a result, by installing general-purpose graphic firmware in the conventional graphic firmware area of the ROM and setting the logical value of the signal from the outside to 0, only the conventional area of the ROM can be set. The logical value of the signal from the outside can be accessed, or the logical value of the signal from the outside can be set to 1 so that the special graphic device can be used in an environment where the special graphic device fails By switching to
A general-purpose graphic device can be easily connected.

By changing the logic gate 93, it is possible to change the polarity of the signal from the outside.
Here, the third embodiment can also be applied to the configuration of the second embodiment. That is, in FIG. 3, the output signal 310 of the decoder 7 and the signal from the outside are logically ANDed by a logic gate, and the output thereof is used as a selector signal of the selector 81, so that when the logical value of the signal from the outside is 1. When the memory address space allocated to the graphic firmware is accessed, one of the graphic firmware on the ROM 22 is selected according to the selection value set in the selection value input means 6, and the external When the memory address space of the graphic firmware area is accessed when the logical value of the signal is 0, the graphic firmware on the ROM 23 can be selected regardless of the selection value set in the selection value input means 6. .

As described above, in the third embodiment of the present invention, it is not necessary to specifically change the program for calling the firmware in the processor. You can use the graphic firmware corresponding to. Further, the options can be increased or decreased according to the capacity of the ROM, and the cost can be optimized.

Furthermore, when changing the graphic device, it is not necessary to disassemble the device to replace the ROM, and it is possible to easily cope with the change of the selected value. Further, it does not affect the PCAT specifications or the specifications of the information processing apparatus. Furthermore, graphic firmware can be added without increasing the ROM mounting area.

Further, since access to the expanded firmware area and the existing firmware area can be switched by switching the external signal, if firmware of a general-purpose graphic device is allocated to the existing firmware area. The connection of a general-purpose graphic device and the connection of a special graphic device can be easily switched without changing the selection value.

In the first to third embodiments described above, the example applied to the graphic firmware has been described. However, by changing the decoder unit and the selector unit, another firmware unit such as SCSI can be used. It is also applicable to firmware and the like. In addition, the firmware area expanded in each embodiment is 256 kB.
Although the number of selectable firmware stored in the selectable value input means and the selector unit are expanded to widen the address width to the ROM, the number of selectable firmware can be arbitrarily expanded.

[0053]

As described above, according to the present invention, when the memory address space allocated to the firmware of a certain device is accessed, it is stored in the ROM according to the selected value set according to the connected device. Since one of the firmware is selected, the processor only accesses a predetermined area of the memory address space as usual, and the desired one of the firmware is selected according to the connected device. It is possible to call the firmware, and it is not necessary to change the program specially to call the desired firmware from multiple firmware. Can be used.

Further, since the choice can be increased or decreased by changing the selection value, the choice can be easily increased or decreased according to the capacity of the ROM, and the existing ROM can be utilized to optimize the cost. Furthermore, when changing the device, RO
There is no need to disassemble the device to replace M,
This can be easily handled by simply changing the selected value according to the device.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of a firmware control system of the present invention.

FIG. 2 is an explanatory diagram showing a relationship between a memory address space and a ROM.

FIG. 3 is a block diagram showing a second embodiment of the firmware control system of the present invention.

FIG. 4 is an explanatory diagram showing a relationship between a memory address space and a ROM.

FIG. 5 is a block diagram showing a third embodiment of the firmware control system of the present invention.

[Explanation of symbols]

 1 Processor 6 Selection Value Input Means 7 Decoder 8 Selector 21 ROM

Claims (3)

[Claims] 1. A firmware control method for allowing a processor to read firmware for controlling a device from a storage means and store the firmware in a predetermined address space of a memory to control a desired device. In addition to storing basic firmware for controlling a certain basic device and a plurality of application firmware for controlling application devices different from this basic device, the desired firmware is stored according to the connected device from the storage means. Selection value input means for inputting a selection value for selecting the firmware, and selection means for selecting an address from the processor and an address of the selection value from the selection value input means, the selection means: Address of a specific address space where the processor is assigned to the base device If specified, the firmware control system and generating a single address in the basic firmware or application firmware based on the selected value from the selected value input means. 2. The firmware control method according to claim 1, wherein the storage means is a storage means for storing basic firmware and a storage means for storing application firmware, which are independent of each other. control method. 3. The firmware control method according to claim 1, wherein when the processor designates an address in a specific address space, the basic firmware address is generated regardless of the selected value, or according to the selected value. A firmware control method characterized by comprising switching means for generating a different address.