JPH0990958A - Musical sound generating device capable of scratch operation - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain scratch effect by digital equipment with a natural feeling of operation by sequentially reading waveform data out of readout addresses determined according to coordinate values detected by a coordinate detection operator. SOLUTION: The detected value of a ribbon controller 106 is taken in; when operation is started, a note-ON event is written in the sound source register of the channel for the ribbon controller and the velocity VEL of the operation of the ribbon controller 106 is written in a sound source register. Further, waveform generating processing by a CPU 101 is altered. In this waveform generation routine, the generation of waveform samples of two sounds by pad-ON operation is performed with normal 2 similar to a normal mode, and waveform samples in a scratch area are read out of the address found by accumulating the F number corresponding to the velocity VEL to the address by a scratch to perform channel accumulation to a reproduction buffer PBr bar. Consequently, the two sounds by the pad-ON operation are added and scratch reproduction using specified waveform data is actualized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tone generating apparatus for reading out waveform data stored in a digital memory and reproducing it, or outputting waveform data inputted in real time as it is and reproducing it, and more particularly to a pseudo-scratch device. The present invention relates to a musical sound generator capable of achieving the effect.

[0002]

2. Description of the Related Art Scratch is a technique for generating a special sound effect by forcibly moving a record while manually reproducing it on a turntable to extremely change the reproduction speed. Scratch is a special technique using an analog record, and hitherto, there has been no technique for realizing a scratch effect in a digital musical sound device.

On the other hand, there is a sound source that stores waveform data in a waveform memory, uses the output of a manipulator operated by a user as it is as a read address of the waveform memory, and outputs the read waveform data.

[0004]

However, in the method in which the output value of the manipulator is directly used as the read address of the waveform memory, the controllability of the generated musical tone is not good, and therefore, the same as in the scratch performed using the analog record. I couldn't get the effect. In addition, due to the limitation of hardware, reverse reproduction from an arbitrary position cannot be performed, and in some cases, discontinuity occurs in reproduced sound when moving in the reverse direction.

According to the present invention, a pseudo-scratch effect can be realized in a musical tone generating system in which waveform data stored in a digital memory is read and reproduced, or waveform data input in real time is directly output and reproduced. The purpose is to be able to.

[0006]

In order to achieve this object, a tone generating apparatus according to claim 1 of the present invention comprises a memory means for storing waveform data representing a waveform amplitude value for each predetermined sampling period, a finger, A coordinate detection operator of finite length that outputs the coordinate value of the contact position touched by a rod or other member; operator output fetching means that sequentially fetches the coordinate value output from the coordinate detection operator every predetermined period; When the operation of the coordinate detection operator is started, the reading of the waveform data of the storage means is started from a specific address predetermined as a read start position, and the operation is performed while the coordinate detection operator is operated. The waveform data in the storage means is sequentially read and read at the read address determined based on the coordinate values fetched by the child output fetch means. Characterized by comprising a processing means for outputting the shape data.

According to a second aspect of the present invention, the musical sound generating device outputs a coordinate value of a contact position touched by a finger, a rod or other member with a storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period. A long coordinate detection manipulator, and manipulator output fetching means for sequentially fetching coordinate values output from the coordinate sensing manipulator at predetermined intervals and obtaining and outputting the moving speed of the contact position from the fetched coordinate values; A new read address is calculated by accumulating the F number determined according to the moving speed output from the manipulator output fetching means into a read address, and the waveform data is stored from the storage means by the read address for each accumulation. And a processing unit for reading and outputting. The F number is the change amount of the read address corresponding to the pitch.

A musical sound generating apparatus according to a third aspect of the present invention outputs a coordinate value of a contact position touched by a finger, a rod or other member and a storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period. A long coordinate detection manipulator, and manipulator output fetching means for sequentially fetching coordinate values output from the coordinate sensing manipulator at predetermined intervals and obtaining and outputting the moving speed of the contact position from the fetched coordinate values; When the operation of the coordinate detection operator is started, the waveform data of the storage means is started to be read from a specific read address that is predetermined as a read start position, and the coordinate detection operator is operated. During the period, a new read address is created by accumulating the F number determined according to the moving speed output from the manipulator output fetching means in the read address. It is calculated and is characterized in that a processing unit that reads and outputs waveform data from said memory means by the read address.

A musical sound generating apparatus according to a fourth aspect of the present invention is a storage means for storing waveform data input in real time from the outside, an output means for outputting waveform data input in real time from the outside, a finger, a stick, etc. A coordinate detection operator having a finite length for outputting the coordinate value of the contact position touched by the member, and an operator output capturing means for sequentially capturing the coordinate value output from the coordinate detection operator every predetermined period,
When the operation of the coordinate detection operator is started, the output of the waveform data by the output means and the storage of the waveform data in the storage means are stopped, and the determination is made based on the coordinate value captured by the operator output capture means. And a processing unit for sequentially reading the waveform data of the storage unit by the read address and outputting the read waveform data.

According to a fifth aspect of the present invention, in the musical sound generating apparatus, the input means for inputting the waveform data representing the waveform amplitude value for each predetermined sampling period from the outside in real time, and the waveform data input by the input means in real time are directly used as they are. Of the waveform data input in real time by the inputting means
From the storage means that always stores the latest waveform data of a predetermined capacity, a finite length coordinate detection operator that outputs the coordinate value of the contact position touched by a finger, a rod, or other member, and the coordinate detection operator Coordinate values to be output are sequentially taken in every predetermined cycle, and a manipulator output take-in means for obtaining and outputting the moving speed of the contact position from the taken coordinate values, and a point in time when the operation of the coordinate detecting manipulator is started, The real-time reproduction of the waveform data by the reproducing means and the storage of the new waveform data in the storage means are stopped, and the waveform data of the storage means is read from a specific read address which is predetermined as a read start position. While the coordinate detection operation element is being operated, it is determined according to the moving speed output from the operation element output fetching means. By accumulating the read address F number calculating a new read address, and further comprising a processing means reads and outputs waveform data from said memory means by the read address.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a sampler which is a musical tone generating apparatus according to the present invention. This sampler includes a central processing unit (CPU) 101, a read only memory (ROM) 102, a flash memory 103, a random access memory (RAM) 104, a timer 105,
Ribbon controller 106, pad 107, display 108, panel switch 109, sampling clock (Fs) generator 110, sound I / O 112, DM
A (direct memory access) controller 113,
And a bus line 115.

The CPU 101 controls the overall operation of this sampler. The ROM 102 stores the control program executed by the CPU 101. The RAM 104 is provided with work areas such as various registers and buffers. The flash memory 103 is a memory for storing waveform data recorded by this sampler.
The recorded waveform data is temporarily stored in the recording buffer on the RAM 104. When the recording buffer is full, the waveform data on the recording buffer is transferred to the flash memory 103. Even when the power of this sampler is turned off, the data on the flash memory 103 is retained.

The timer 105 generates a timer clock signal for generating a timer interrupt to the CPU 101 at a predetermined interval. CPU1 by timer interrupt
01 is the ribbon controller 106 at predetermined time intervals.
The process of fetching the detected value of is performed.

The ribbon controller 106 is an operator for a user to perform a scratch operation and other operations. The ribbon controller 106 is a coordinate detection manipulator made of a linear member having a finite length and outputting the coordinates of the touched position when touched by a member such as a finger or a rod. As a feature of the ribbon controller 106, the operation can be started from any position. Ribbon controller 106
Outputs a predetermined value when it is not touched with a finger or a stick, and outputs the position of the touched coordinate when it is touched, so whether or not the ribbon controller 106 is operated (that is, touched with a finger or a stick) It can be determined from the detected value.

The pad 107 is a manipulator for the user to support the pronunciation. Specifically, ten pads are provided, and one pad can be designated for recording during recording (sampling). By hitting (turning on) the pad during reproduction, the waveform data recorded corresponding to the pad is read and reproduced.
Note that instead of turning on the pads, MIDI (Musical
Instrument Digital Interface) signal note-on may be received and reproduced.

The display 108 is for displaying various setting information. Panel switch (SW) 1
A switch group 09 is provided on the panel for the user to perform various setting operations. Panel SW109
Includes switches such as a mode switch.

The Fs generator 110 is a sound I / O 11
2 to generate a sampling clock having a frequency Fs. The sound I / O 112 is a codec (CODE
C). Sound I / O112
Has an analog-digital (A / D) conversion function and a digital-analog (D / A) conversion function.
An analog musical tone signal from the external input 111 is input to the D input terminal, and a sound system 114 is input to the D / A output terminal.
Is connected. The sound I / O 112 uses the ADPCM (adaptive differential pulse code modulation) method to convert the waveform data (waveform data obtained by converting the analog tone signal of the external input 111 into digital data by the A / D conversion function) taken in from the A / D input terminal. Function to compress and waveform data output to D / A output terminal (D / A converted and sound system 11
ADPC for digital waveform data output to 4)
It has a function to perform M extension. In the embodiment of the present invention described here, the sound I / O 112 is A
Only DPCM compression is performed, and ADPCM decompression is performed by the CPU 101 executing predetermined software.

The sound I / O 112 has two F's inside.
It has an IFO (First In First Out) stack area. One is an input FIFO for holding digital waveform data input via an A / D input terminal, and the other is an output FIFO for holding digital waveform data output via a D / A output terminal.

The input / output operation of the sound I / O 112 using the input FIFO and the output FIFO will be briefly described below.

External input 111 to sound I / O 112
The analog tone signal input to the A / D input terminal of A is D / A converted according to the sampling clock of the frequency Fs, and is written to the input FIFO (ADPCM compressed as necessary, or as it is). If the input FIFO contains waveform data, the sound I / O 112 will
A request for processing the input waveform data is issued to the MA controller 113. The DMA controller 113 transfers the data of the input FIFO to the RAM 1 in response to the processing request.
04 to a predetermined area (recording buffer area secured in advance). This DMA controller 11
The data transfer by 3 is performed by the DMA controller 113 interrupting the CPU 101 at every sampling clock Fs to secure the bus line 115. CPU1
01 is the bus line 1 by the DMA controller 113
There is no awareness of securing 15. The waveform data transfer process during recording by the DMA controller 113 will be described in detail with reference to FIG.

On the other hand, the output FI in the sound I / O 112
When waveform data exists in the FO, the waveform data in the output FIFO is D / D for each sampling clock Fs.
A-converted, sound system 1 via D / A output terminal
It is sent to 14 and sound is emitted. When the waveform data of the output FIFO is output, there is a space in the output FIFO, and the sound I / O 112 issues a waveform data acquisition request to the DMA controller 113. The CPU 101 previously generates waveform data to be output and places it in a reproduction buffer on the RAM 104, and issues a reproduction request for the waveform to the DMA controller 113. The DMA controller 113 uses the CPU 1 for each sampling clock Fs.
01 is interrupted to secure the bus line 115 and R
The sound data from the waveform data in the playback buffer on the AM104
/ O 112 to the output FIFO. The transfer of the waveform data by the DMA controller 113 is performed by the CPU 10
1 does not notice. The waveform data written to the output FIFO is the sampling clock F as described above.
Every s, the sound is sent to the sound system 114 and emitted. The transfer processing of the waveform data at the time of reproduction by the DMA controller 113 will be described in detail with reference to FIG.

Further, the sound I / O 112 is an A / D
It has a function of passing the waveform data input to the input terminal as it is to the D / A output terminal, and allowing the sound system 114 to output the musical sound signal from the external input 111 as it is. The connection between A / D input and D / A output is CP
It is performed based on the instruction from U101. Also CPU
101 can also disconnect the A / D input and the D / A output.

Next, the outline of the function of the sampler of FIG. 1 will be described. This sampler has seven modes: normal mode, sampling mode, filter playback mode, pitch playback mode, scratch playback mode, external input (EX) filter mode, and external input (EX) scratch mode.
It has two operation modes. These modes are
It can be switched by the mode selector switch on W109. Hereinafter, each mode will be described.

The normal mode is a mode for reproducing recorded musical tones. The initial state of this sampler is normal mode. 10 users in normal mode
Hit one of the pads 107 (pad on)
Then, the waveform data recorded corresponding to the pad is reproduced. Up to 4 sounds can be played in normal mode. That is, up to the four pads, the waveform data recorded corresponding to each pad is played every time the pad is turned on, and when the fifth pad is turned on, the playback sound corresponding to the first pad turned on stops, Newly turned on 5
The waveform data corresponding to the th pad is reproduced.

The sampling mode is a mode for recording. When the sampling mode is designated by the mode selector switch, the user designates a pad for recording at the same time. As a result, a musical sound input from the outside can be recorded corresponding to the pad.

In the filter reproduction mode, only two sounds are reproduced according to the pad-on as in the normal mode.
Further, the reproduced sound is subjected to digital filter processing, specifically, low-pass filter processing. By operating the ribbon controller 106, the user can change and control the cutoff frequency in the low-pass filter processing.

The playback mode with pitch is a mode in which the recorded musical sound is played back with pitch. (In operation modes other than the pitched playback mode, playback is performed at the same pitch as when recorded.) When the pitched playback mode is specified by the mode selector switch, the user specifies one of the pads at the same time. Specify the waveform data to be played in the pitched playback mode. After that,
When any one of the ten pads is turned on, the waveform data previously specified is reproduced at a pitch corresponding to the pad. Only two notes can be played in this mode. Although a pad for designating a waveform to be reproduced is also used as a pitch designating operator here, a pitch designating operator may be provided separately from the pad.

The scratch reproduction mode is a mode for realizing a scratch operation by the user. When scratch playback mode is specified by the mode switch,
The user specifies any one pad at the same time. The waveform data corresponding to the pad is the waveform data to be scratch-reproduced. After that, when the ribbon controller 106 is touched, the reproduction of the waveform data is started, and by moving the position where the ribbon controller 106 is touched, the reproduced sound is scratch-reproduced. further,
In this mode, apart from scratch reproduction, the same reproduction as the normal mode with 10 pads can be performed for two sounds.

The EX filter mode is a mode in which the external input 111 is filtered (low-pass filter) and output to the sound system 114. The cutoff frequency for filtering is set by the user in the ribbon controller 10.
Change control can be performed at step 6. In the EX filter mode, even if the pad is turned on, the waveform according to the pad is not reproduced.

In the EX scratch mode, the external input 111 is used.
This is a mode for performing a scratch operation using. In the EX scratch mode, the external input 111 is output by the sound system 114 as it is while the ribbon controller 106 is not touched. When the ribbon controller 106 is touched, the direct sound output from the external input is stopped, and the ribbon controller 106 performs scratch reproduction using the external input waveform captured up to that point. In the EX scratch mode, even if the pad is turned on, the waveform corresponding to the pad is not reproduced.

Next, the registers and buffers provided on the RAM 104 will be described.

FIG. 2A shows a tone generator register on the RAM 104. The tone generator register is composed of four channel regions (1 to 4ch) for pad performance and a tone generator register sch for scratch reproduction. Information such as a read address of waveform data to be reproduced and note-on is stored in the register of each channel.

FIG. 2B shows a recording buffer on the RAM 104. Two recording buffers, RB0 and RB1, are prepared, each of which can store 128 samples of waveform data. During recording, waveform samples are stored in one of the recording buffers (that is, the DMA controller 113 converts the waveform data of the external input 111 into the sound I / O1).
12 transfer to the recording buffer via the input FIFO), when the recording buffer is full, CPU1
At 01, the waveform sample of the recording buffer is written in the flash memory 103. At the same time, the waveform sample is continuously stored in the other recording buffer. In this way, recording is performed by alternately using the two recording buffers. RBk (k = 0 or 1)
Indicates the recording buffer that is currently recording (storing waveform data), and the RBk bar indicates the other recording buffer. k-bar represents the inversion of k (k-bar = 1 when k = 0, k-bar = 0 when k = 1), and k is overlined in the drawing to represent k-bar.

FIG. 2C shows a reproduction buffer on the RAM 104. Two reproduction buffers, PB0 and PB1, are prepared, each of which can store 128-sample waveform data. When one reproduction buffer is used for reproduction (that is, the waveform data in the reproduction buffer is transferred to the sound I / O by the DMA controller 113).
Waveform data to be output next by the CPU 101 is prepared in the other reproduction buffer). In this way, reproduction is performed by alternately using the two reproduction buffers. It should be noted that PBr (r = 0 or 1) indicates a reproduction buffer in which the current waveform data is transferred to the sound I / O 112 for reproduction and the PBr bar indicates the other reproduction buffer. The r bar indicates the inversion of r (r bar = 1 when r = 0, r bar = 0 when r = 1), and r is overlined in the drawing to represent the r bar.

FIG. 2D shows the scratch area SR provided on the RAM 104. This scratch area SR
Is an area secured when the scratch reproduction mode is designated. When entering the scratch reproduction mode, the waveform data corresponding to the designated pad is ADPCM expanded (with linear 16 bits) and expanded in a predetermined area on the RAM 104. A predetermined area in the expanded waveform data is set as a scratch area SR. The position in the waveform data where the scratch area SR is set is determined in advance. A predetermined address on the scratch area SR is set in the scratch pointer SP as a scratch start address. The value of the scratch pointer SP can be changed by the user. Scratch reproduction is performed when the user operates the ribbon controller 106 in the scratch reproduction mode. However, regardless of the operation start position of the ribbon controller 106, the scratch pointer S
The scratch reproduction is started from the position pointed to by P.

FIG. 2E shows a scratch area in the EX scratch mode. In the EX scratch mode, the waveform data of the external input 111 is transferred to the recording buffer SRB.
0, SRB1 (FIG. 2 (e)). The recording buffers SRB0 and SRB1 are recording buffers corresponding to the recording buffers RB0 and RB1 described in FIG.
They are used alternately like B0 and RB1. SRB0 and S
RB1 has a capacity sufficient for scratching (for example, if the sampling clock is 40 kHz, 4
(Capacity that can store 0 k samples or more). SR
Of B0 and SRB1, the recording buffer which is not written at the time when the operation of the ribbon controller 106 is started is set as a scratch area. FIG.
In (e), since the recording pointer RP indicating the address to be written is located in the recording buffer SRB0, writing is currently performed in SRB0. Therefore, a predetermined area in the recording buffer SRB1 which is not written is set as the scratch area SR. Also,
A predetermined address on the scratch area SR is set in the scratch pointer SP as a scratch start address.

Next, registers other than those shown in FIG. 2 will be described.

(1) m: An operation mode register. 0
Normal mode, 1 sampling mode, 2 filter playback mode, 3 pitch playback mode, 4 scratch playback mode, 5 EX filter mode, 6 EX
Indicates scratch mode. (2) PN: A register that stores a pad number that identifies the pad. (3) i: A register that stores the channel number of the channel to which the sound is assigned. (4) FNi: F of the i-th channel to which pronunciation is assigned
It is a register that stores a number. (5) TMP: A register that stores the detection value of the ribbon controller 106.

(6) RD: A register for setting the detection value when the detection value from the ribbon controller 106 changes. (7) RS: A flag indicating the state of the ribbon controller 106. It is 1 when the ribbon controller 106 is being operated (when a finger or the like is touching the ribbon controller 106), and is 0 when it is not being operated (when the finger or the like is not touching). (8) VEL: a register for setting the moving speed of the ribbon controller 106 (specifically, the moving speed of a finger or the like touching the ribbon controller 106). (9) OLD: This is a register for holding the previous detection value of the ribbon controller 106. (10) SAD: A register for storing the scratch address.

(11) ADi: i-th channel (i = 1
4) is a register for storing the read address. (12) SFN: This is a register that stores the F number in reading the waveform data of the scratch channel sch. (13) RP: A recording pointer. Indicates the waveform data write position in the recording buffer. (14) PP: A reproducing pointer. The waveform data read position of the reproduction buffer is shown.

The symbols indicating the above registers are as follows:
The storage area itself such as a register is shown, and also the data stored in the storage area is shown. For example, "m" indicates an operation mode register and also data indicating the operation mode stored in the register.

3 to 16 are flowcharts for explaining the operations of the CPU 101 and the DMA controller 113 in the sampler of FIG. In the following, we first explain the hierarchical structure of these software,
Next, the processing procedure of each software module will be described with reference to the flowcharts of FIGS. After that, the timing of implementing those software modules to realize the function of each mode will be described for each mode.

First, the hierarchical structure of software will be described. The programs shown in FIGS. 3 to 16 are classified into levels as follows.

Level 1: DR (m) routine of FIG. 15 which is a processing routine of the DMA controller 113 during recording, and DP routine of FIG. 16 which is a processing routine of the DMA controller 113 during reproduction.

Level 2: The waveform generation routine HS shown in FIGS. 11 and 12 in which the CPU 101 creates a waveform.
(M), and the ribbon value fetch routine RC (m) of FIGS. 9 and 10 for fetching the detection value of the ribbon controller 106 by the CPU 101. It also includes the processing routines of FIGS. 13 and 14, which are subroutines of the waveform generation routine HS (m).

Level 3: The steady routine of FIG. 3 executed by the CPU 101. The subroutines, pad scan, SW scan, and event routines (see FIG. 4 to FIG.
The processing routine of FIG. 8) is also included.

The level 1 processing routine has the highest priority. That is, if an interrupt for execution of the level 1 processing routine is made while the level 2 or level 3 processing is being performed, the level 1 processing routine is executed with the highest priority. Level 1 processing DR (m) and DP
Is a process executed by the DMA controller 113, not a process executed by the CPU 101. Therefore, when the interrupt of the process of level 1 is applied, the operation of the CPU 101 is stopped and the bus line 115 is secured by the DMA controller 113. Level 1 processing is performed with the highest priority. The interrupt of this level 1 processing is the sampling clock F
Follow s. That is, an interrupt occurs every sampling clock Fs, and the DMA controller 113 executes DP for reproduction and DR for recording.
(M) is executed. The sampling clock Fs
Whether to execute DP or DR (m) with each interrupt is determined in advance from the CPU 101 to the DMA controller 1
It is specified for 13.

The level 2 process has a lower priority than the level 1 process, but has a higher priority than the level 3 process. That is, when an interrupt for performing the processing of level 2 is made while the steady routine of level 3 is being executed, the processing routine of level 2 is preferentially executed. DMA above
The DP routine of the controller 113 reproduces the waveform data in the reproduction buffer and interrupts the CPU 101 when the reproduction buffer becomes empty. In response to this interrupt, the CPU 101 causes the waveform creation routine HS
Execute (m) to prepare the waveform sample in the reproduction buffer. The ribbon value fetch routine RC (m) is activated by a timer interrupt. That is, a timer interrupt is applied at every clock output from the timer 105 at a predetermined interval, whereby the CPU 101 executes the ribbon value fetching routine RC (m) to execute the ribbon value controller 10.
The detection value of 6 is fetched.

Level 3 is a processing routine having the lowest priority. The CPU 101 repeatedly executes the steady routine of FIG. 3 to execute the ON event of the pad 107 and the panel SW1.
When there is an operation event of 09, a predetermined subroutine is executed.

Next, the processing procedure of each software module will be described with reference to the flowcharts of FIGS.

FIG. 3 shows a level 3 stationary routine.
When the power of this sampler is turned on, the CPU 101 executes this steady routine. First, in step 301,
Make various initial settings. In particular, the operation mode m is m =
0, that is, the normal mode is set, and note-off is set to all channels of the sound source register in FIG.
All the sample areas of the reproduction buffers PB0 and PB1 in (c) are cleared to 0. Also, the CPU 101 is DM by default.
Instruct the A controller 113 to perform a reproduction process. As a result, the DMA controller 113 interrupts the CPU 101 at each sampling clock Fs from the Fs generator 110, executes the DP routine of FIG. 16 each time, and starts the operation of reproducing the waveform data in the reproduction buffer. become. Further, in the initial setting, the timer 10
Start 5. As a result, the CPU 101 causes the timer 1
The RC fetch routine RC (m) is executed each time a timer interrupt is caused by the clock from 05, and the process of fetching the detection value of the ribbon controller 106 is started.

Next, a pad scan process is performed in step 302, a SW scan process is performed in step 303, and the process returns to step 302 again to repeat the process. The pad scan process of step 302 includes 10 pads 1.
This is processing for detecting whether or not there is a 07 on event, and executing the on event routine shown in FIGS. 7 and 8 when there is an on event. The SW scan process of step 303 is a process of detecting whether or not the panel SW 109 is operated, and executing a processing routine corresponding to the operation when the operation is performed.

FIG. 4 is a mode SW event routine that is called when it is detected that the mode changeover switch has been operated in the SW scan process of step 303 in FIG. In the mode SW event routine, a value indicating the operation mode designated according to the operation of the mode changeover switch in step 401 is set in the register m, and the display 1 corresponding to the mode m designated in step 402 is set.
Display control to 08 is performed. Then, step 403
Then, the start process MS (m) corresponding to the designated mode m
After executing, the process ends.

FIG. 5 shows a case where the user specifies the sampling mode (m = 1) with the mode changeover switch.
14 is a flowchart of a sampling mode start process MS (1) called in step 403 of FIG. MS (1)
In the processing, first, in step 501, it is determined whether or not a pad has been designated. If the pad is not specified, it is determined in step 502 whether or not the sampling mode is specified. If the sampling mode designation process is to be continued, the process returns to step 501 again to prompt the pad designation.

When a pad is designated in step 501, the designated pad number is stored in the register PN in step 503, and recording preparation is performed in step 504. The recording preparation is processing such as securing recording buffers RB0 and RB1, a recording area on the flash memory 103, and other areas. In addition, the DMA controller 1
13 and instructs CP every sampling clock Fs.
U101 is interrupted to stop executing the DP routine. Next, in step 505, it is determined whether or not a recording start condition (trigger) is satisfied. As the condition for starting the recording, for example, a condition for starting the recording when the input level exceeds a certain level is used. If the condition for starting recording is not satisfied, it is determined in step 506 whether or not to stop recording, and if recording is to be continued, step 5
Return to 05.

If the recording start condition is satisfied in step 505, recording is started in step 507. Specifically, the recording start is a process in which the CPU 101 instructs the DMA controller 113 to start recording. As a result, the DMA controller 113 interrupts the CPU 101 at each sampling clock Fs from the Fs generator 110, executes the DR (1) routine of FIG. 15 each time, and outputs the waveform data input from the external input 111 to the sound. The processing for setting the recording buffer RBk via the input FIFO in the I / O 112 is started.

Next, at step 508, it is judged whether or not the recording buffer is full. As will be described in detail with reference to FIG. 15, in the DR (1) routine, the waveform sample of the external input is transferred to the recording buffer RBk, and when RBk is full, k is inverted and an interrupt is generated. In step 508, it is determined whether or not the recording buffer is full by waiting for this interrupt. When this interruption occurs, it means that the waveform buffer RBk bar is filled with the waveform sample. Therefore, in step 509, the waveform sample of the recording buffer RBk bar is written in a predetermined area of the flash memory 103, and the step 508 is performed again. Return to.

When the recording buffer is not full in step 508 (when there is no interrupt from the DR (1) routine), it is determined in step 510 whether or not the recording process is to be ended. The recording process is performed by the ON event of the recording stop switch of the panel SW109 or the flash memory 1
When the recording area secured in 03 is full, it shall end. If the recording process is not completed in step 510, the process returns to step 508 to continue recording. When the recording process is completed in step 510, the recording end process is executed in step 511. This instructs the DMA controller 113 to cause the CPU 1 to operate at every sampling clock Fs.
This is a process of interrupting 01 to stop the execution of the DR (1) routine. Then in step 512,
The register m is set to 0, the process of returning to the normal mode is performed, and the process is terminated. In the process of returning to the normal mode, the DMA controller 113 is instructed to interrupt the CPU 101 at each sampling clock Fs to start executing the DP routine.

If the sampling mode designation process is to be canceled in step 502, the register m is set to 0 in step 513 to perform the process of returning to the normal mode, and then the process is terminated. If the recording process is canceled in step 506, in step 514 the register m
After setting 0 to and performing processing to return to normal mode,
The process ends. The processing of steps 513 and 514 is the same as the processing of step 512.

FIG. 6 shows that when the user specifies the scratch reproduction mode (m = 4) with the mode changeover switch,
5 is a flowchart of a scratch reproduction mode start process MS (4) called in step 403 of FIG. MS
In the process (4), first, in step 601, it is determined whether or not a pad is designated. If the pad is not specified, it is determined in step 602 whether or not the scratch reproduction mode is specified. If the scratch reproduction mode designation process is to be continued, the process returns to step 601 again to prompt the pad designation.

When the pad is designated in step 601, the designated pad number is stored in the register PN in step 603, and the preparation for scratching is performed in step 604. In this process, the waveform data recorded corresponding to the pad number PN is read from the flash memory 103, ADPCM expanded, and expanded in a predetermined area on the RAM 104. Next, in step 605,
A predetermined area of the waveform data expanded on the RAM 104 is set as a scratch area SR (FIG. 2 (d)), and a scratch pointer SP which is an address for starting scratching is set to a predetermined value.

When the scratch reproduction mode designation process is canceled in step 602, the register m is set to 0 in step 606, the process for returning to the normal mode is performed, and the process is terminated.

FIG. 7 shows the step 3 of FIG. 3 when the mode m is m = 0, 2, 4, that is, in the normal mode, the filter regeneration mode or the scratch regeneration mode.
A flow chart of a pad-on-event routine called when an on-event of the pad 107 is detected at 02 is shown. In this on-event routine, first in step 701, the pad number of the pad 107 having the on-event is set in the register PN, and in step 702,
It is determined whether the waveform data corresponding to the pad number PN is recorded on the flash memory 103. If there is no waveform data corresponding to the pad number PN, the processing is ended as it is.

If the waveform data corresponding to the pad number PN is recorded in step 702, step 703.
Then, assign the sound generation channel. This allocation is performed with the number of tones generated according to the mode m. That is, in the normal mode, since four tones can be produced, if any of the first to fourth channels has an empty channel, it is assigned to that empty channel, and all four channels are used for producing sound. At this time, the channel that started sounding the earliest is muted and a new sound is assigned to that channel. In the filter reproduction mode or the scratch reproduction mode, since two sounds can be produced, they are similarly assigned to the first or second channel. The number of the assigned channel is set in the register i. Next, at step 704, various information (such as the start address ADi of the waveform data to be reproduced) for sounding is set in the sound source register ich of the i-th channel, note-on is set, and the process is ended.

FIG. 8 shows step 30 of FIG. 3 when the mode m is m = 3, that is, in the pitched reproduction mode.
2 shows a flowchart of a pad-on-event routine that is called when an on-event of the pad 107 is detected in 2. In the pad-on-event routine in the pitched reproduction mode, first, in step 801, the pad number of the pad 107 having the on-event is set in the register PN, and in step 802, the tone generation channel is assigned. In the pitched reproduction mode, up to two tones can be sounded, so the channels are assigned with the maximum number of tones being two tones. Next, at step 803, the pad number PN is converted into an F number and set in the register FNi. Then, in step 804, the sound source register ich of the i-th channel
Various information for reproducing with a pitch is set (read start address ADi and F number FNi of the waveform data to be reproduced), note-on is set, and the process ends.

FIG. 9 is a flowchart of the RC fetch routine RC (m) for fetching the detection value of the ribbon controller 106 when the mode m is m = 2,5, that is, in the filter regeneration mode or the EX filter mode. is there. This is a process of fetching the detected value in order to control the filter by the ribbon controller 106. FIG. 10 is a flowchart of the RC fetch routine RC (m) for fetching the detection value of the ribbon controller 106 when the mode m is m = 4, 6, that is, in the scratch reproduction mode or the EX scratch mode. . This is a process of fetching the detected value for the scratch control by the ribbon controller 106.

In the initial setting of step 301 in FIG. 3, the timer 105 is started and the CPU 101 is activated at a predetermined time interval.
Executes timer interrupt processing. The RC fetch routine RC (m) of FIG. 9 is a process executed when the mode m is 2 or 5 in the timer interrupt. Also,
The RC fetch routine RC (m) of FIG. 10 is a process executed when the mode m is 4 or 6 in the timer interrupt.

RC import routine RC (m) of FIG.
(M = 2, 5) will be described. First, in step 901,
The detection value of the ribbon controller 106 is set in the register TMP. Next, in step 902, the detected value is compared with the detected value at the time of the previous timer interrupt to determine whether or not there is a change. If there is no change, the process ends.
If there is a change, in step 903 the detected value TMP
Is set in the register RD and the process is terminated. as a result,
This means that the detection value of the ribbon controller 106 is set in the register RD. The ribbon controller 106
When the finger or the like is separated from, the detection values TMP and RD may be returned to predetermined standard values, or the coefficient immediately before the finger or the like may be held.

RC import routine RC (m) of FIG.
(M = 4, 6) will be described. Note that FIG. 10 shows an RC loading routine RC (4) called when the operation mode is the scratch regeneration mode (m = 4) and an RC loading routine RC called when the operation mode is the EX scratch mode (m = 6). It is a flowchart which also explains with (6), and steps 1006 and 100
Since 9,1015 and 1016 are processing only for RC (6), the processing procedure of RC (4) will be described first below.
Then, the processing procedure of RC (6) will be described.

In the ribbon controller detection value fetch routine RC (4), first, in step 1001, the detection value of the ribbon controller 106 is set in the register TMP. Next, in step 1002, the ribbon controller 10
It is determined whether or not operation 6 has been performed. The ribbon controller 106 outputs the coordinate detection value indicating the touched coordinate position when touching with a finger or stick, but outputs a predetermined value and does not touch when the finger or stick does not touch ( It is understood that it is not operated). If the ribbon controller 106 is not operated, the process proceeds to step 1003, and if the operation is performed, the process proceeds to step 1004.

At step 1003, the register RS is set to 0.
Is determined. When the register RS is 0, it means that the ribbon controller 106 has not been operated both at the time of the previous interrupt and the time of the current interrupt, and thus the process is ended. RS at step 1003
Is not 0, it means that RS = 1 at the time of the previous interrupt, that is, the ribbon controller 106 was operated, but that the operation was not performed at the time of the current interrupt (the finger or the stick is released). So step one
The register RS is cleared to 0 by 013, and step 1014 is executed.
Then, note-off is written in the sound source register sch of the scratch channel, and the process is terminated.

At step 1004, the register RS is set to 1
Or not. When the register RS is not 1, RS = 0 at the time of the previous interrupt, that is, the ribbon controller 106 was not operated, but it means that the operation was performed at the time of this interrupt.
In step 1005, 1 is set in the register RS and 0 is set in the speed VEL. Then, in step 1007, the value (predetermined value) of the scratch pointer SP is set as the read address SAD. Next, in step 1008, various information for scratch reproduction (read-out address SAD of waveform data to be scratch reproduced is stored in the sound source register sch of the scratch channel.
And velocity value VEL) are set, and note-on is written. Then in step 1010, register O
The detection value TMP of the ribbon controller 106 of this time is added to the LD.
Is set and the process ends.

When RS is 1 in step 1004, it means that RS = 1 at the time of the previous interrupt and RS = 1 at the time of the current interrupt (the operation of the ribbon controller 106 continues). Therefore, in step 1011, the operation speed of the ribbon controller 106 is detected and set in the register VEL. The speed VEL is calculated by subtracting the detection value OLD at the previous interruption from the detection value TMP at this time. Therefore,
It is possible that the velocity VEL may be a negative number. Further speed V
EL is the sound source register sch of the scratch channel
Shall be set to. Next, in step 1012, the current detection value TMP is set in the register OLD, and the process ends.

What has been described above is the RC fetch routine RC in the mode m = 4, that is, in the scratch reproduction mode.
(4) In the case of mode m = 6, that is, in the EX scratch mode, the RC fetch routine RC (6)
Then, step 1006 is added after step 1005, step 1009 is added after step 1008, and steps 1015 and 101 are added after step 1014.
Add 6. Furthermore, the processing of steps 1008 and 1014 is slightly different. These will be described below.

At the time when the operation of the ribbon controller 106 is started, through steps 1004 to 1005,
Proceed to step 1006. In step 1006, the CP
U101 gives an instruction to the DMA controller 113,
The CPU 101 is interrupted at every sampling clock Fs to stop the execution of the DR (6) routine, and the two recording buffers SRB0 and SRB1 are also executed.
The scratch area SR is set in the recording buffer SRBk bar which is not currently written, as described with reference to FIG. Next, the process proceeds to 1008 via step 1007.

In step 1008, various information for scratch reproduction (read-out address SAD of waveform data to be scratch-reproduced, speed value VEL, etc.) is set in the sound source register sch of the scratch channel, and note-on is written. . Further, in step 1008, the following processing is also performed before the above processing.
That is, first, 128 samples are generated in the reproduction buffer PBr. For this processing, after clearing the reproduction buffer PBr to 0, the EX scratch processing of FIG. 14, which will be described later, may be performed on the reproduction buffer PBr (using PBr in place of the PBr bar in FIG. 14). Further, the CPU 101 instructs the DMA controller 113 to interrupt the CPU 101 at each sampling clock Fs and restart the execution of the DP routine. Further, an interrupt having the same meaning as the interrupt generated in step 1605 of the DP routine of FIG. 16 described later is generated. This interrupt causes HS (6) to be executed, and 128 samples to be scratch-reproduced next are generated in the PBr bar.

Thereafter, in step 1009, the CPU 10
In response to the instruction from 1, the direct connection from the A / D input of the sound I / O 112 to the D / A output is disconnected, and the external input 1
The musical sound signal is directly supplied from 11 to the sound system 114 to stop the sound emission.

At the time when the operation of the ribbon controller 106 is stopped, steps 1002 to 1003 and 1013 are performed, and then the process proceeds to step 1014. In step 1014, note-off is written in the sound source register sch of the scratch channel, but after that processing, the following processing is also performed. That is, the CPU 101 gives an instruction to the DMA controller 113 to interrupt the CPU 101 at every sampling clock Fs to stop executing the DP routine.

In step 1015, the CPU 10
The direct connection from the A / D input of the sound I / O 112 to the D / A output is restarted by the instruction from the external input 11
A musical tone signal is sent from 1 directly to the sound system 114 so as to emit a sound. In step 1016, the CPU 1
From 01, the DMA controller 113 is instructed to interrupt the CPU 101 at each sampling clock Fs and restart the execution of the DR (6) routine.

11A to 11C and FIG.
(A)-(c) is a flowchart of a waveform generation routine HS (m) executed by the CPU 101 to generate a waveform sample on the reproduction buffer in each mode m. The waveform generation routine HS (m) is executed by the CPU 101 in response to the interrupt request of step 1605 of the DP routine of FIG. 16 described later. That is, the DP routine executes the reproduction buffer PB every sampling clock Fs.
The waveform sample in r is transferred to the sound I / O 112 and played back. When all 128 samples in the playback buffer PBr have been played back, the DP routine inverts k and generates an interrupt. This interrupt triggers the CPU
101 is a waveform generation routine HS corresponding to the mode m.
(M) is executed, and 128 samples for one frame are newly generated in the empty playback buffer PBr bar which has just finished playing.

FIG. 11A is a flowchart of a waveform generation routine HS (0) for generating a waveform sample on the reproduction buffer in the normal mode. In HS (0), normal 4 which is a subroutine in step 1101.
To end the process. This subroutine will be described later with reference to FIG.

FIG. 11B is a flowchart of a waveform generation routine HS (2) for generating a waveform sample on the reproduction buffer in the filter reproduction mode. HS
In (2), in step 1111 the subroutine normal 2 is called, and in step 1112 a filter coefficient (cutoff frequency) is generated according to the detection value RD of the ribbon controller 106. And step 1113
The filter process (low-pass filter process) is performed with and the process ends. The normal 2 of step 1111 will be described later with reference to FIG.

FIG. 11C is a flowchart of a waveform generation routine HS (3) for generating a waveform sample on the reproduction buffer in the pitched reproduction mode. HS
In (3), the pitch 2 which is a subroutine is called in step 1121 and the process ends. The pitch 2 will be described later with reference to FIG.

FIG. 12A is a flowchart of a waveform generation routine HS (4) for generating a waveform sample on the reproduction buffer in the scratch reproduction mode. HS
In (4), the normal 2 subroutine is called in step 1201, the scratch processing routine subroutine is called in step 1202, and the process ends. The normal 2 will be described later with reference to FIG. The scratch processing will be described later with reference to FIG.

FIG. 12B is a flow chart of the waveform generation routine HS (5) for generating a waveform sample on the reproduction buffer in the EX filter mode. HS
When (5) is called, 128 samples (linear samples) of the waveform data from the external input 111 are written in the recording buffer RBk bar, and the reproduction buffer PBr bar is empty. Therefore, in the HS (5), first, in step 1211, the ribbon controller 106
A filter coefficient is generated according to the detected value RD of, and in step 1212, EX filter processing is performed. This EX filter processing is performed by filtering the 128 waveform samples of the recording buffer RBk bar using the filter coefficient obtained in step 1211, and the filtering result 128 is obtained.
This is a process of setting individual waveform samples in the reproduction buffer PBr bar. After step 1212, the process ends.

FIG. 12C is a flowchart of a waveform generation routine HS (6) for generating a waveform sample on the reproduction buffer in the EX scratch mode. HS
In (6), it is determined in step 1221 whether the register RS is 1. When the register RS is not 1,
Since the ribbon controller 106 has not been operated, the processing ends. Step 12
If the register RS is 1 at 21, it means that the ribbon controller 106 is being operated. Therefore, at step 1222, the EX scratch process is performed and the process is terminated. The EX scratch process will be described later with reference to FIG.

FIG. 13A shows a flowchart for normal n. n is 4 when normal 4 is called in step 1101 described above, and n is 4 in step 1111 described above.
When normal 2 is called at 1201, n = 2.

First, in step 1301, the work register i for counting channels is set to 1, the work register j for counting the number of samples is set to 0, and reproduction is not currently performed by the DP routine. Playback buffer PBr bar sample area is all 0
clear. Next, at step 1302, the tone generator register ich of the i-th channel is referred to, and it is determined whether or not note-on is written. If note-on has not been written, it is not necessary to generate the waveform of the i-th channel, so the flow directly advances to step 1308. When the note is on for the i-th channel in step 1302, the process proceeds to step 1303.

In step 1303, the read address ADi of the i-th channel (ADi is set in the tone generator register ich of the i-th channel) is incremented, and in step 1304, from the position of the address ADi of the waveform data to be read in the i-th channel. The waveform sample is read, ADPCM expansion is performed to obtain a linear waveform sample, and the linear waveform sample is set in the work register TMP. Next, at step 1305, the value of the register TMP is accumulated (channel accumulation) in the reproduction buffer PBr bar (j).

Next, at step 1306, it is judged whether or not the value of the register j reaches 127, and the register j is still 1
If it has not reached 27, the register j is incremented in step 1307, and then the process returns to step 1303 to repeat the reading, expansion and accumulation of the next waveform sample. When the value of the register j becomes 127 in step 1306, it means that the accumulation of 128 samples of the i-th channel is completed in the area of 128 samples of the reproduction buffer PBr bar, and therefore the process proceeds to step 1308.

In step 1308, it is determined whether the register i has reached n. If the register i has not reached n, step 1 is performed to accumulate the next channel.
In step 309, the register i is incremented, the register j is cleared to 0, the process returns to step 1302, and the process is repeated for the i-th channel. When the register i reaches n in step 1308, it means that the accumulation of the channels to be processed is completed and 128 samples are generated on the reproduction buffer PBr bar, so that the processing is ended.

FIG. 13B is a flow chart of pitch 2 which is a subroutine called in step 1121 of FIG. 11C. In step 1311, the work register i for counting the channels is set to 1, and the work register j for counting the number of samples is set.
Is set to 0, and all the sample areas of the reproduction buffer PBr bar which is not currently reproduced by the DP routine are cleared to 0. Next, at step 1312, the tone generator register ich of the i-th channel is referred to, and it is determined whether or not note-on is written. If note-on has not been written, it is not necessary to generate the waveform with pitch for the i-th channel, so that step 131 is directly executed.
Proceed to 9. If note-on has been made to the i-th channel in step 1312, the process proceeds to step 1313.

At step 1313, the F number FNi is added to the waveform sample read address ADi of the i-th channel to obtain a new address ADi. ADi and F
Ni is set in the sound source register ich of the i-th channel. Next, at step 1314, a waveform sample is read from the position of the address ADi of the waveform data to be read on the i-th channel, ADPCM expansion is performed to obtain a linear waveform sample, and the linear waveform sample is set in the work register TMP. The waveform data to be read is ADPC.
Since it is M-compressed, when the integer part of the address ADi advances by 2 or more, all samples from the previous read position to the current read position ADi are read and used for expansion. Next, at step 1315, interpolation between samples is performed according to the fractional part of the address ADi, and the interpolated waveform sample is set in the register TMP. Then, in step 1316, the calculated waveform sample T is added to the j-th sample area PBr bar (j) of the reproduction buffer PBr bar.
Channel accumulation of MP.

Next, at step 1317, the register j is set to 1
It is determined whether 27 has been reached. When not reached,
In order to process the next sample, the register j is incremented in step 1318, and the process returns to step 1313. When the value of the register j reaches 127 in step 1317, it means that the processing of the i-th channel is completed. Therefore, it is determined in step 1319 whether or not the register i reaches 2. If the register i has not reached 2, the register i is incremented and the register j is cleared to 0 in step 1320 in order to process the next channel, and then the process returns to step 1312. When the value of the register i reaches 2 in step 1319, the process ends.

FIG. 14 shows step 120 of FIG. 12 (a).
Scratch process called in 2, or FIG. 12 (c)
12 is a flowchart of an EX scratch process called in step 1222 of FIG. First, in step 1401, the moving speed VEL of the detected ribbon controller 106 is detected.
(VEL is the sound source register sc of the scratch channel.
(set to h) F number for scratch SF
Convert to N. VEL which is not only a positive number but also a negative number
Since the F number SFN is determined according to the F number, the F number SFN also changes in the positive and negative regions. Next, in step 1402, the register j is cleared to 0, and step 14
Go to 03.

At step 1403, the scratch F number SFN is added to the scratch read address SAD (SAD is set in the sound source register sch of the scratch channel), and at step 1404, the waveform data address SAD to be read is read. The waveform sample is set in the read register TMP. FIG.
In the scratch processing called in step 1202 of 2 (a), the waveform data to be read is previously ADP.
The CM is expanded and expanded in a predetermined area, and the scratch area SR is set in the waveform data (steps 604 and 605 in FIG. 6). In addition, step 1 in FIG.
In the EX scratch processing called in 222, the recording buffer SRB is input from the external input 111 by then.
0 and SRB1 are alternately written with waveform data (linear samples), and the scratch area SR is included in the waveform data of the recording buffer that has not been written at the time when the ribbon controller 106 is operated. Is set (step 100 in FIG. 10).
7). In either case, in step 1404, the number of samples required for interpolation is read.

Next, in step 1405, the address SAD
Interpolation between samples is performed according to the fractional part of, and the interpolated waveform sample is set in the register TMP. Then, in step 1406, j of the playback buffer PBr bar
The waveform sample T is placed in the th sample area PBr bar (j).
Channel accumulation of MP.

Next, at step 1407, the register j is set to 1
It is determined whether 27 has been reached. If the register j has not reached 127, the register j is incremented in step 1408 to process the next sample, and the process returns to step 1403. When the register j reaches 127 in step 1407, the processing ends.

In FIG. 15, the DMA controller 113 is F
sampling clock Fs generated from the s generator 110
It is a flow chart of a DR (m) routine executed for each. Since the recording is performed when the mode m is m = 1, 5, 6, the DR (m) is either m = 1, 5, 6.

First, in step 1501, sound I / O
112 input FIFO (the tone signal input from the external input 111 to the A / D input terminal is A / D converted and input FIFO
Is set to), the waveform sample from the recording buffer R
A sample area RBk pointed to by the recording pointer RP of Bk
(RP). When the mode m is m = 1, that is, the sampling mode, the linear waveform sample A / D converted by the ADPCM compression function of the sound I / O 112 is ADPCM compressed, and the compressed waveform sample is input via the input FIFO. It shall be transferred to the recording buffer RBk (RP). When the mode m is m = 5 or 6, that is, the EX filter mode or the EX scratch mode, the ADPCM compression function of the sound I / O 112 is not used, and the linear waveform sample obtained by A / D conversion is input F
Transfer to recording buffer RBk (RP) via IFO (however, when m = 6, recording buffer RBk (RP))
Recording buffer SRBk (RP) is used instead of
I shall.

Next, in step 1502, the recording pointer R
P is incremented, and it is determined in step 1503 whether the recording buffer RBk (SRBk when m = 6, and so on) is full. If it is not full, the process ends. When the recording buffer RBk is full, k is inverted in step 1504 (1 for 0, 1 for 1).
If so, the value is set to 0), an interrupt is generated in step 1505, and the process ends. The interrupt is an interrupt for requesting the CPU 101 to write the waveform sample of the recording buffer (RBk bar at this time) which is full to the flash memory 103 to empty the recording buffer.

In FIG. 16, the DMA controller 113 has the F
sampling clock Fs generated from the s generator 110
It is a flow chart of a DP routine performed for every.

First, in step 1601, the reproduction buffer P
Waveform sample PB indicated by reproduction pointer PP on Br
r (PP) is transferred to the output FIFO of the sound I / O 112. The waveform samples stored in the output FIFO are
As described with reference to FIG. 1, after D / A conversion, it is sent to the sound system 114 and emitted. Next, step 1
At 602, the reproduction pointer PP is incremented, and at step 1603, it is determined whether or not the reproduction sample in the reproduction buffer PBr has been reproduced to the end.

When reproduction of all the waveform samples in the reproduction buffer PBr is completed in step 1603, r is inverted in step 1604 (0 is 1, 1 is 0),
The other reproduction buffer is the reproduction buffer PBr to be read next. Then, in step 1605, the CPU
An interrupt is generated to request 101 to prepare a waveform sample, and the process ends. Step 16
If there is a waveform sample that has not been reproduced in the reproduction buffer PBr at 03, the processing is ended as it is.

Next, at what timing each of the above-mentioned flowcharts is processed for each mode will be described.

First, the operation in the normal mode (m = 0) will be described. When the user selects the normal mode with the mode changeover switch, 0 is set in the register m in the mode SW event routine shown in FIG. The normal mode start process MS (0) does not perform a process that should be particularly described, and therefore the flowchart is omitted. However, when the operation of executing the DP routine for each sampling clock Fs is stopped due to the EX scratch mode or the like, the reproduction operation is restarted by MS (0).

In the initial setting of step 301 in FIG. 3 or in the resuming process of the reproducing operation by the MS (0), the CPU 101 sets the tone generator registers of all the channels in FIG. 2 (a) to the note-off state, Figure 2
After clearing all the sample areas of the reproduction buffers PB0 and PB1 in (c) to 0 and designating the sound I / O 112 and the DMA controller 113 to perform the reproduction operation, the sampling clock Fs generated by the Fs generator 110 is used.
Start to occur. As a result, the DMA controller 1
13 interrupts the CPU 101 at every sampling clock Fs from the Fs generator 110, executes the DP routine of FIG. 16 each time, and starts the operation of reproducing the waveform data in the reproduction buffer.

Here, the timing of processing during reproduction will be described. FIG. 17A shows a timing chart at the time of reproduction. Each section of S1 to S5 shows a frame for reproducing 128 samples. "Waveform generation by CPU"
Causes the CPU 101 to execute the waveform generation routine HS (0) of FIG.
B1 shows a section in which a process for generating the next 128 samples to be reproduced is performed. Also, "DMAC DP routine"
Indicates a section in which the DP routine is executed to reproduce the waveform data in the reproduction buffer. The DP routine is executed for each interrupt according to the sampling clock Fs, and the interrupt is generated 128 times at equal intervals in one frame. The numbers 0 to 4 attached to the respective sections of "waveform generation by CPU" and "DP routine of DMAC" are numbers conveniently attached to indicate the order of waveform generation and reproduction.

In FIG. 17A, first, in the section S1, the CP
U101 executes HS (0) to generate waveform data (128 waveform samples) in the reproduction buffer PB0. In the next section S2, the DMA controller 113 executes the DP routine at an interrupt for each sampling clock Fs. As a result, the 128 waveform samples of the reproduction buffer PB0 generated in the section S1 are sequentially transferred to the output FIFO of the sound I / O 112 and reproduced in the section S2. When all 128 waveform samples of the reproduction buffer PB0 have been transferred to the output FIFO of the sound I / O 112 (at the end of section S2), an interrupt (step 1
605) occurs. With this interrupt as a trigger, CP
U101 executes the waveform generation routine HS (0) in the section S3, and writes new waveform data (128) to the reproduction buffer PB0.
Waveform samples).

Although the above description has focused on the reproduction buffer PB0, PB1 is also used alternately with PB0 in the same manner. In short, the DP routine is executed by the interrupt for each sampling clock Fs, and the P routine is executed in the section S1.
The waveform sample of B1 is reproduced, the waveform sample of PB0 is reproduced in the section S2, the waveform sample of PB1 is reproduced in the section S3, the waveform sample of PB0 is reproduced in the section S4, ...
In this way, the waveform samples of PB0 and PB1 are reproduced alternately according to the sampling clock Fs.
Then, HS (0) is executed by an interrupt generated when 128 samples are reproduced in each section, and the next 12
Eight samples are generated in PB0 or PB1 (one not being reproduced). Due to the hierarchical structure of the software, the DP routine is level 1 and HS
(0) is level 2. Therefore, if there is an interrupt according to the sampling clock Fs while HS (0) is being executed, the DP routine is executed with priority. Thereby, the reproduction by the DP routine and the waveform generation by the waveform generation routine HS (0) can be executed in parallel.

In the normal mode (m = 0), when the pad is not turned on, all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced at the timing described with reference to FIG. Since it is the reproduction of the sample of all 0, it means that no musical sound is actually emitted. The process when the pad is turned on in this state will be described. It is assumed that the pad is turned on in the section S1, as indicated by the arrow "pad" in FIG. When pad-on is detected in the routine routine,
Note-on of the waveform data corresponding to the pad turned on by the on-event routine of FIG. 7 is written in the tone generator register of FIG. The steady routine and the on-event routine are level 3 processing, and the waveform generation routine H
It can operate in parallel with the S (0) and DP routines. The note-on written in the sound source register is the next HS
It is reflected in the reproduction buffer in the execution of (0).

Next, the operation in the sampling mode (m = 1) will be described. When the sampling mode is specified by the user with the mode changeover switch, the above-mentioned FIG.
In the mode SW event routine of 1, the register m is set to 1. Further, the sampling mode start process MS (1) is executed as shown in FIG. In MS (1), the DP routine is stopped and the sound I / O 112 and the DMA controller 113 are instructed to perform the recording operation. As a result, the DMA controller 113
Is the sampling clock Fs from the Fs generator 110.
The CPU 101 is interrupted each time, and FIG.
The DR (1) routine is executed to start recording an external waveform sample in the recording buffer.

Here, the timing of processing during recording will be described. FIG. 17B shows a timing chart during recording. Each section of S1 to S5 shows a frame for recording 128 samples. "DMAC DR routine"
Executes the DR (1) routine to execute the sound I / O 11
2 input FIFO (external input 111 is A / D converted and AD
A section for performing processing (recording) of writing a waveform sample of a PCM-compressed waveform sample to a recording buffer is shown. The execution of the DR (1) routine is performed for each interrupt according to the sampling clock Fs, and the interrupt is generated 128 times at equal intervals in one frame. “Write to flash memory by CPU” indicates a section in which the CPU 101 writes the waveform sample of the recording buffer RB0 or RB1 to the flash memory 103 in step 509 of FIG. 5 to empty the recording buffer. It should be noted that the numbers 0 to 4 attached to each section are numbers conveniently attached to show the order of recording and writing to the flash memory.

In FIG. 17 (b), first, an interrupt occurs at each sampling clock Fs in the section S1, and the DMA controller 113 executes the DR (1) routine each time. This allows input FI of the sound I / O 112.
Waveform samples of FO are sequentially written in the recording buffer RB0. An interrupt (step 1505) is generated when 128 waveform samples are written in the recording buffer RB0 (at the end of the section S1). In response to this interrupt, the CPU 101 causes the recording buffer RB in the section S2.
The waveform sample of 0 is written in the flash memory 103 (step 509) to make the recording buffer RB0 empty.

Although the above description is focused on the recording buffer RB0, the RB1 is also used alternately with the RB0 in the same manner. In short, the DR (1) routine is executed by interruption every sampling clock Fs, and the section S
Record a waveform sample in RB0 in 1 and RB1 in section S2
, The waveform sample is recorded in RB0 in the section S3, and so on. And 128 in each section
By the interrupt that occurs when the sample is recorded,
The waveform sample of the recording buffer (the one not written) is written in the flash memory 103. Due to the hierarchical structure of software, the DR (1) routine is at level 1 and the MS (1) is at level 3.
Therefore, if there is an interrupt according to the sampling clock Fs while MS (1) is being executed, DR
(1) The routine is executed with priority. This gives D
Recording by the R (1) routine and writing by the MS (1) to the flash memory 103 can be executed in parallel.

Next, the operation in the filter regeneration mode (m = 2) will be described. When the filter regeneration mode is designated by the user with the mode changeover switch, the above-mentioned FIG.
In the mode SW event routine of, 2 is set in the register m. Filter regeneration mode start processing MS
Since (2) does not perform any processing that should be particularly described, the flowchart is omitted. However, due to EX scratch mode, etc.
When the operation for executing the routine is stopped, the reproducing operation is restarted by MS (2) as in the normal mode start processing MS (0).

In the filter reproduction mode, reproduction is carried out in substantially the same procedure as in the normal mode. The DP routine is executed for each sampling clock Fs, all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when pad-on is not performed, and the processing procedure when pad-on is the same. The timing of reproduction is also the same as in FIG. 17 (a). However, in the filter regeneration mode, the RC capture routine RC (2) of FIG. 9 is executed at predetermined time intervals by a timer interrupt to capture the detection value of the ribbon controller 106, and the waveform generation processing of the CPU 101 in FIG. Be HS (2) in FIG. 11 (b) instead of HS (0). In the waveform generation routine HS (2), waveform samples for two sounds due to pad-on are accumulated in the reproduction buffer, and the waveform samples in the reproduction buffer are filtered with a filter coefficient according to the detection value RD of the ribbon controller 106. Is performed (steps 1112 and 1113).
As described above, the filter control of the reproduced sound is performed by the ribbon controller 106.

In the filter reproduction mode, four sounds reproduced in the normal mode are reduced to two sounds, and instead of reducing the number of generated musical sounds, the waveform to be reproduced is filtered. Since it is necessary to generate a predetermined number of samples within one frame time, four sounds can be reproduced in the normal mode. However, when the reproduced sound is filtered, the processing time becomes short. Therefore, the number of generated musical tones is reduced to two, the processing time for waveform generation is shortened, and the filter processing is performed in the remaining time.

Next, the operation in the pitched reproduction mode (m = 3) will be described. When the filter regeneration mode is designated by the user with the mode changeover switch, the register m is registered in the mode SW event routine of FIG.
Is set to 3. Filter regeneration mode start processing MS
Since (3) does not carry out any processing that should be particularly explained, the flow chart is omitted. However, due to EX scratch mode, etc.
When the operation for executing the routine is stopped, the reproducing operation is restarted by MS (3) as in the normal mode start processing MS (0).

In the pitched reproduction mode, reproduction is performed in substantially the same procedure as the normal mode. The DP routine is executed for each sampling clock Fs, all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when pad-on is not performed, and the processing procedure when pad-on is the same. The timing of reproduction is also the same as in FIG. 17 (a). However, in the playback mode with pitch, the pad-on event routine is changed from FIG. 7 to FIG.
Instead of HS (0) in (a), HS in FIG. 11 (c)
(3). In the pad-on-event routine of FIG. 8, the F number FNi corresponding to the pad number PN is generated,
In the waveform generation routine HS (3) of 1 (c), a waveform sample is read and reproduced at an address obtained by accumulating the F number FNi in the address ADi. As a result, reproduction can be performed with a pitch.

In the playback mode with pitch, four tones are reproduced in the normal mode to two, and instead of reducing the number of generated musical tones in this manner, pitch imparting processing is performed on the reproduced waveform. Since it is necessary to generate a predetermined number of samples within one frame time, four sounds can be reproduced in the normal mode. However, when the pitch is added to the reproduced sound, the processing time becomes short. Therefore, the number of generated musical tones is reduced to two, the processing time for waveform generation is shortened, and the pitch assignment processing is performed in the remaining time.

Next, the operation in the scratch reproduction mode (m = 4) will be described. When the scratch reproduction mode is designated by the user with the mode changeover switch, 4 is set in the register m in the mode SW event routine of FIG. 4 described above. In the scratch reproduction mode start processing MS (4) (FIG. 6), the waveform data to be scratch-reproduced is developed in a predetermined area, the scratch area SR and the scratch pointer SP are set, and preparations are made. In addition,
Although not shown in FIG. 6, when the operation of executing the DP routine for each sampling clock Fs is stopped due to the EX scratch mode or the like, MS (4) is set in the same manner as the normal mode start process MS (0). To restart the playback operation.

In the scratch reproduction mode, the reproduction of two tones by pad-on is performed in substantially the same procedure as the normal mode. The DP routine is executed for each sampling clock Fs, all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when pad-on is not performed, and the processing procedure when pad-on is the same. The timing of reproduction is also the same as in FIG. 17 (a). However, in the scratch reproduction mode, the RC fetch routine RC (4) of FIG.
The detection value of 06 is fetched, note-on is written in the sound source register sch of the scratch channel at the start of the operation, and the operation speed V of the ribbon controller 106 is changed.
EL is detected and written in the sound source register sch. Also,
The waveform generation process of the CPU 101 is HS (4) in FIG. 12A instead of HS (0). Waveform generation routine HS
In (4), the waveform normalization for two tones by pad-on is performed in the same way as in the normal mode by the normal 2 subroutine, and the F (F) corresponding to the detected speed VEL is performed by the scratch (FIG. 14) subroutine.
The waveform sample of the scratch area SR is read at the address SAD obtained by accumulating the number SFN in the address SAD, and the channel is accumulated in the reproduction buffer PBr bar. As a result, in addition to the two tones produced by pad-on, scratch reproduction using the designated waveform data is realized.

In the scratch reproduction mode, four sounds reproduced in the normal mode are reduced to two sounds, and a scratch sound is generated instead of reducing the number of generated musical sounds. Since it is necessary to generate a predetermined number of samples within one frame time, four sounds can be reproduced in the normal mode, but in addition to that, when a scratch sound is generated, the processing time becomes short. Therefore, the number of generated musical tones is reduced to two, the processing time for waveform generation is shortened, and the scratch sound is generated in the extra time.

Next, the operation in the EX filter mode (m = 5) will be described. When the EX filter mode is designated by the user with the mode changeover switch, the above-mentioned FIG.
In the mode SW event routine of, the register m is set to 5. EX filter mode start processing MS
Although the flowchart of (5) is omitted, in the MS (5), the activation process of the DR (5) routine is performed. That is, C
The PU 101 issues an instruction to the sound I / O 112 and the DMA controller 113 to interrupt the CPU 101 at each sampling clock Fs from the Fs generator 110, and each time the DR (5) routine of FIG. The operation of writing the waveform sample to the recording buffer RBk is started. At this time, the Fs generator 110
16 interrupts the CPU 101 every sampling clock Fs, and the DP routine shown in FIG. 16 is executed each time the waveform data in the reproduction buffer is not stopped (if the sampling clock Fs is exceeded due to the EX scratch mode or the like). If the operation of executing the DP routine has stopped, the normal mode start processing M
Similar to S (0), the playback operation is restarted by MS (5)). That is, the sampling clock Fs
Each time, DP and DR (5) will be executed. In this case, since the same sampling clock Fs operates, DP and DR (5) operate in synchronization, and DP
The interrupt in step 1605 of the routine and the interrupt in step 1505 of the DR (5) routine are issued at exactly the same timing. The interrupt issued at the same timing triggers the waveform generation routine HS (5) of FIG. 12 (b). In EX filter mode, the external input is not actually recorded, so (D
The external input is taken in the R (5) routine for filtering the taken waveform data), and writing to the flash memory 103 is not performed.

As described above, when the interrupts are generated from DP and DR (5) at the same timing, the waveform data from the external input 111 is 12 in the recording buffer RBk bar.
Eight samples (linear samples) have been written and the playback buffer PBr bar is empty. The waveform generation routine HS (5) uses 128 in the recording buffer RBk bar.
The number of waveform samples is filtered, and 128 waveform samples resulting from the processing are set in the reproduction buffer PBr bar. The filter coefficient of the filtering is the RC fetch routine RC of FIG.
Execute (5) to detect the value R detected by the ribbon controller 106.
D is taken in and determined according to the detected value RD. As described above, the filter can be controlled by the ribbon controller 106 with respect to the external input 111 and output.

Next, the operation in the EX scratch mode (m = 6) will be described. EX with the mode switch
When the scratch mode is designated by the user, 6 is set in the register m in the mode SW event routine of FIG. 4 described above. Although the flowchart of the start processing MS (6) of the EX scratch mode is omitted, MS (6)
Then, the following processing is performed. First, the CPU 101
To Sound I / O 112 and DMA controller 1
13 is instructed to interrupt the CPU 101 at every sampling clock Fs from the Fs generator 110, and the DP routine of FIG.
The operation of reproducing and outputting the Br waveform sample is stopped.
In addition, the CPU 101 instructs the sound I / O 112 to directly connect the A / D input and the D / A output, and the external input 1
A tone signal is sent from 11 directly to the sound system 114 so as to emit a sound. Further, the CPU 101 issues an instruction to the sound I / O 112 and the DMA controller 113, and the sampling clock F from the Fs generator 110 is sent.
Interrupts the CPU 101 every s
The DR (6) routine 5 is executed to start the operation of writing the waveform sample from the outside into the recording buffer SRBk. In the EX scratch mode, the external input is not actually recorded (the external input is captured in the DR (6) routine because the captured waveform data is used for scratch reproduction).
Writing to 03 is not performed. Step 30
Since the timer interrupt is enabled in the initial setting of 1,
The timer interruption by the timer 105 causes the RC fetch routine RC (6) of FIG. 10 to be executed at predetermined time intervals.

While the ribbon controller 106 is not operated, in RC (6) of FIG.
Since the process is ended in the order of 02 → 1003 → end, the process of emitting the sound directly from the external input 111 to the sound system 114 is continued. Further, since the DR (6) routine is executed by the interrupt for each sampling clock Fs,
A linear waveform sample obtained by A / D converting the external input 111 is transferred to the recording buffers SRB0 and SRB via the input FIFO.
Alternately written to 1.

When the operation of the ribbon controller 106 is started (touched by a finger or the like), in RC (6), the process proceeds to steps 1001 → 1002 → 1004 → 1005, and at the next step 1006, the CPU 101 instructs the DMA controller 113. Then, the CPU 101 is interrupted at every sampling clock Fs to stop the execution of the DR (6) routine, and the recording buffer SRBk which is not currently written out of the two recording buffers SRB0, SRB1. Figure 2 on the bar
The scratch area SR is set as described in (e). Next, in step 1007, the read address SAD
The value (predetermined value) of the scratch pointer SP is set as. Furthermore, in step 1008, the reproduction buffer PB
128 samples to be reproduced first in r, CPU
From 101, the DMA controller 113 is instructed to interrupt the CPU 101 at each sampling clock Fs and restart the execution of the DP routine. Further, an interrupt having the same meaning as the interrupt generated in step 1605 of the DP routine of FIG. 16 is generated. This interrupt causes HS (6) to be executed, and 128 samples to be scratch-reproduced next are generated in the PBr bar.
Further, in step 1008, note-on is written in the sound source register sch of the scratch channel. Thereafter, in step 1009, the direct connection from the A / D input to the D / A output of the sound I / O 112 is disconnected according to an instruction from the CPU 101, and a musical tone signal is directly sent from the external input 111 to the sound system 114 to emit a sound. Stop things.

Furthermore, when the ribbon controller 106 is moved while touching it with a finger or the like, the process proceeds from step 1004 to step 1011 and the velocity VEL is detected and set in the tone generator register sch. On the other hand, the sampling clock F
In the DP routine executed by interruption every s, the reproduction buffers PB0 and PB1 are reproduced alternately. Therefore, the scratch sound reproduction is started based on the sound source register sch from the time when the operation of the ribbon controller 106 is started. In particular, FIG. 12 (c), which is activated by the interrupt of step 1605 of the DP routine.
In the waveform generation routine HS (6), since RS = 1 while the ribbon controller 106 is being operated, the routine proceeds from step 1221 to step 1222, and the EX scratch processing of FIG. 14 is performed. EX in FIG.
In the scratch processing, the waveform sample of the scratch area SR is read out at the address SAD obtained by accumulating the F number SFN corresponding to the detected speed VEL in the address SAD, and the reproduction buffer PBr bar is set (step 14).
In 06, it seems that channels are accumulated, but PB
Since the r bar is set to all 0s, the waveform sample TMP for scratch reproduction is set to the PBr bar. As described above, scratch reproduction using waveform data input from the outside is realized.

FIG. 18 shows the scratch F-number SFN from the speed VEL performed in step 1401 of FIG.
An example of conversion to This conversion may be performed by calculation or may be performed using a table. FIG. 18 (a)
Is an example in which the change amount of the F number SFN is increased as the absolute value of the velocity VEL is increased, so that the scratch effect with a large pitch change can be realized even when the length of the ribbon controller 106 is short. .

Since an accurate pitch is not required in hearing in scratch reproduction, the number of bits in the decimal part of the scratch address SAD may be reduced if necessary. That is, the number of bits in the decimal part of the address SAD accumulated in step 1403 of FIG. 14 may be reduced. By doing so, the calculation amount of the interpolation performed in step 1405 can be reduced. Further, when converting from the speed VEL to the scratch F number SFN, a table as shown in FIG. 18B is used, whereby the number of bits of the decimal part in the F number SFN is reduced to similarly perform the calculation amount of interpolation. It is also possible to obtain the effect of reduction.

Further, in the above example, in the EX scratch mode, the waveform data from the external input is alternately stored in the two recording buffers SRB0 and SRB1 and the writing is not performed at the start of the operation of the ribbon controller. Although the scratch area is set in the recording buffer, three or more recording buffers are provided to store the waveform data in order (in a ring shape), and a plurality of unwritten data are not written at the start of the operation of the ribbon controller. A scratch area may be set on the recording buffer. By doing so, the scratch areas are set on the plurality of recording buffers, so that it is possible to set the scratch area having a sufficient capacity for scratching. Also, 1
Since the capacity of one recording buffer can be reduced, the amount of data in the recording buffer that is being written at the start of operation of the ribbon controller is reduced, and the data that is not used for scratch (data to be discarded) can be reduced.

17A, the pad-on detection section, the waveform generation section by the CPU, and the start time of each section of the DP routine execution section of the DMAC are shown to be completely coincident, but they are not necessarily coincident. It is not necessary to do so, and each section may be deviated. The same applies to the recording timing of FIG.

Further, in FIG. 17A, when the DP routine finishes reproducing a sample in one reproduction buffer, CP is executed.
Although the waveform is generated by U, the number of samples not reproduced in the reproduction buffer may be detected, and when the number becomes less than a predetermined number, a new sample may be generated in the empty portion. . Therefore, the number of reproduction buffers may be one or may be three or more as long as the timings of reproduction and generation of samples are adjusted.

[0137]

As described above, according to the present invention, a musical tone generating apparatus for reading out waveform data, which is digital data, from the storage means and reproducing the waveform data is provided with a coordinate detecting operator and is detected by the coordinate detecting operator. Since the waveform data is sequentially read and output according to the read address determined based on the coordinate values, it is possible to perform the scratch effect, which was previously possible only with analog records, with a natural operation feeling on digital devices. it can.

Particularly, in the musical tone generating apparatus of claims 1 and 3,
At the time when the operation of the coordinate detection operator is started, the waveform data is read from a specific address that is predetermined as the read start position, so even if the operation is started from any position of the coordinate detection operator, The waveform data is always reproduced from a specific address. In a scratch using an analog record, the operation is performed such that a specific position on the record board is repeatedly reproduced in accordance with the rhythm, but according to the present invention, the same effect as that can be easily obtained.

Further, in the tone generating device of the second, third, and fifth aspects, the velocity is obtained from the coordinates detected by the coordinate detecting operator,
The F number determined according to the speed is accumulated in the address to create the read address of the waveform data. Therefore, it is possible to set a wide F-number change region with the coordinate operator having a finite length, and it is possible to control a wide range of scratch effects.

Further, in the tone generating device of the fourth and fifth aspects, the scratch effect can be applied to the tone waveform input in real time. The performer can scratch at the favorite position of the music being played.

[Brief description of drawings]

FIG. 1 is a block diagram of a sampler which is a musical sound generating device according to the present invention.

FIG. 2 is a diagram showing various work areas in the sampler of FIG.

FIG. 3 is a flowchart of a routine routine

FIG. 4 is a flowchart of a mode SW event routine.

FIG. 5 is a flowchart of a sampling mode start process MS (1).

FIG. 6 is a flowchart of scratch reproduction mode start processing MS (4).

FIG. 7 is a pad-on event routine (mode m = 0,
2, 4) Flowchart diagram

FIG. 8 is a pad-on event routine (mode m = 3).
Flow chart diagram

FIG. 9: Ribbon controller detection value fetch routine R
Flow chart of C (m) (m = 2,5)

FIG. 10 is a flowchart of a ribbon controller detection value fetch routine RC (m) (m = 4, 6).

FIG. 11 is a waveform generation routine HS (m) (mode m =
0, 2, 3) flow chart

FIG. 12 is a waveform generation routine HS (m) (mode m =
4, 5, 6) flow chart

FIG. 13 is a flowchart of subroutine normal n and pitch 2.

FIG. 14 is a flowchart of scratch processing and EX scratch processing.

FIG. 15 is a DR (m) routine (modes m = 1, 5,
6) Flow chart diagram

FIG. 16 is a flowchart of a DP routine.

FIG. 17 is a diagram showing timings during playback and recording.

FIG. 18: Speed VEL to scratch F number SFN
Figure showing conversion example

[Explanation of symbols]

101 ... Central processing unit (CPU), 102 ... Read only memory (ROM), 103 ... Flash memory, 1
04 ... Random access memory (RAM), 105 ... Timer, 106 ... Ribbon controller, 107 ... Pad,
108 ... Display, 109 ... Panel switch, 11
0 ... Sampling clock (Fs) generator, 111 ... External input, 112 ... Sound I / O, 113 ... DMA (Direct Memory Access) controller, 114 ... Sound system, 115 ... Bus line.

Claims (5)

[Claims] 1. A storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period, and a finite length coordinate detection operator for outputting coordinate values of a contact position touched by a finger, a rod or other member. A manipulator output fetching means for sequentially fetching coordinate values output from the coordinate detection manipulator at predetermined intervals, and a specific address predetermined as a reading start position at the time when the operation of the coordinate sensing manipulator is started. To start reading the waveform data from the storage means,
A processing unit that sequentially reads the waveform data of the storage unit and outputs the read waveform data by a read address determined based on the coordinate value captured by the operator output capturing unit while the coordinate detection operator is operated. And a musical tone generating device. 2. A storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period, and a coordinate detection operator of finite length for outputting coordinate values of a contact position touched by a finger, a rod or other member. Coordinate values output from the coordinate detection manipulator are sequentially fetched at predetermined intervals, and manipulator output fetching means for obtaining and outputting the moving speed of the contact position from the fetched coordinate values, and output from the manipulator output fetching means The F number determined according to the moving speed is accumulated in the read address to calculate a new read address, and the processing means for reading and outputting the waveform data from the storage means by the read address for each accumulation. A musical tone generating device characterized by being provided. 3. Storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period, and a coordinate detection operator of finite length for outputting coordinate values of a contact position touched by a finger, a rod or other member. The coordinate value output from the coordinate detection manipulator is sequentially taken in every predetermined cycle, and the manipulator output fetching means for obtaining and outputting the moving speed of the contact position from the fetched coordinate value, and the operation of the coordinate detection manipulator At the time of starting, the reading of the waveform data of the storage means is started from a specific read address which is predetermined as a read start position, and while the coordinate detection operator is operated,
A new read address is calculated by accumulating the F number determined according to the moving speed output from the manipulator output fetching means into a read address, and the waveform data is read out from the storage means and output based on the read address. A musical tone generating apparatus comprising: a processing means. 4. Storage means for storing waveform data input in real time from the outside, output means for outputting waveform data input in real time from the outside, and contact positions touched by a finger, a stick or other member. A coordinate detection operator having a finite length for outputting coordinate values, an operator output fetching means for sequentially fetching coordinate values output from the coordinate detection operator at predetermined intervals, and an operation of the coordinate detection operator is started. At this point, the output of the waveform data by the output means and the storage of the waveform data in the storage means are stopped, and the waveform data of the storage means is determined by the read address determined based on the coordinate value captured by the manipulator output capturing means. And a processing means for outputting the read waveform data. 5. Input means for externally inputting in real time waveform data representing a waveform amplitude value for each predetermined sampling period, and reproducing means for outputting the waveform data input by the input means in real time as it is in real time for reproduction. And a storage means for always storing the latest waveform data of a predetermined capacity out of the waveform data input in real time by the input means, and a coordinate value of a contact position touched by a finger, a rod or other member. A coordinate detection operator having a finite length, and operator output fetching means for sequentially fetching coordinate values output from the coordinate sensing operator at predetermined intervals and obtaining and outputting the moving speed of the contact position from the fetched coordinate values; , When the operation of the coordinate detection operator is started, the waveform data is reproduced by the reproducing means in real time and before. The storage of the new waveform data in the storage means is stopped, the reading of the waveform data of the storage means is started from a specific read address predetermined as a read start position, and the coordinate detection operator is operated. During this period, a new read address is calculated by accumulating the F number determined according to the moving speed output from the manipulator output fetching means into the read address, and the waveform data is stored from the storage means by the read address. A musical tone generating apparatus comprising a processing unit for reading and outputting.