KR100487501B1 - Image sensor device - Google Patents

Abstract

In the solid-state imaging device composed of a plurality of unit pixels according to the present invention, each unit pixel is arranged in a vertical direction, and at least two photodiodes for converting incident light into a charge and storing the converted charge; ; Charge transfer elements formed on one side of the corresponding photodiode in a horizontal direction and formed on opposite sides to transfer charges stored in the corresponding photodiode; And vertical shift registers, each extending in a vertical direction along both sides of the photodiodes, for vertically transferring charges transferred through respective corresponding charge transfer elements in response to the first and second driving signals.

Description

Solid State Imaging Device {IMAGE SENSOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid state imaging device, and more particularly, to a charge coupled device (CCD) type solid state imaging device.

A charge coupled device type image sensor device is an array of photodiodes that photoelectrically convert incident light and vertical and horizontal signal transmission stages (VBCCD) that receive and transmit signal charges from each photodiode. buried channel CCD) and (HBCCD: horizontal buried channel CCD), which are largely divided into an output unit for amplifying the output signal and converting it into a voltage signal. The photoelectrically converted signal charges in the photodiode are transmitted to the vertical signal transmission terminal (VBCCD) during the vertical branching period and are transferred to the horizontal signal transmission terminal (HBCCD) step by step during the horizontal blanking period. This signal charge is transmitted to a floating diffusion amplifier at the end of the horizontal signal transmission end, amplified and output.

The signal charge is most often used in the former in consideration of the transmission speed. The signal transmission end structure of the CCD-type solid-state imaging device usually has a structure in which the gate electrode is overlapped, and the gate electrode is mainly formed of doped polycrystalline silicon. The signal transmission of the signal transmission stage is carried out by the electric field caused by the change of the electron potential in the silicon, i.e., the lower part of the gate electrode by the clock pulse applied to the gate electrode, and the signal transmission stage maximizes the transmission efficiency. For this purpose, a buried channel whose surface is doped with N-type impurities is applied.

The resolution of the charge coupled device (CCD) is determined by the number of unit pixels, but in order to process a large number of pixels, many memories corresponding thereto are required. In some cases, the use of a solid-state imaging device used in high resolution at low resolution unnecessarily consumes a lot of power while being used at low resolution.

Accordingly, an object of the present invention is to provide a CCD-type solid-state imaging device that can be consumed at a low resolution when using a high resolution.

(Configuration)

According to one aspect of the present invention for achieving the above object, in a solid-state imaging device composed of a plurality of unit pixels: each unit pixel is arranged in a vertical direction, converts incident light into charge and At least two photodiodes for storing the converted charges; Charge transfer elements formed on one side of the corresponding photodiode in a horizontal direction and formed on opposite sides to transfer charges stored in the corresponding photodiode; Extending vertically along both sides of the photodiodes, respectively, and including vertical shift registers for vertically transferring charge transferred through respective corresponding charge transfer elements in response to first and second drive signals. It features.

In this embodiment, it is characterized in that it further comprises at least two horizontal shift registers connected to the output side of the vertical shift registers, respectively corresponding to the vertical shift registers.

In this embodiment, the vertical shift registers are simultaneously driven by the first and second drive signals when the solid state imaging device is to be operated in the high resolution mode, and the solid state imaging device is to be operated in the low resolution mode. And selectively driven by one of the drive signals.

By such a device, the vertical shift register can be separated and operated according to the resolution.

Reference drawings according to embodiments of the present invention will be described in detail with reference to FIGS.

Referring to FIG. 1, a cross-sectional view illustrating a unit pixel structure of a typical charge coupled device (CCD) is illustrated. The unit pixel is formed in the N-type semiconductor substrate 10, and two N-type impurity regions 12 and 13 are formed and they are separated by a P-type impurity region 14 heavily doped. The mold well 11 is formed in the semiconductor substrate 10. The N-type impurity region 12 is provided to the photodiode PD together with the P-type well 11, and the N-type impurity region 13 is a signal transmission terminal of a vertical shift register (or a vertical charge coupling device). acts as a transferring stage). The heavily doped P-type impurity regions 15 are each provided as channel stoppers with adjacent photodiodes. The upper surface of the semiconductor substrate 10 is covered with an insulating film 16 made of silicon oxide, and a transfer electrode 17 is formed in the insulating film 16.

Referring again to FIG. 2, there is shown a block diagram showing the configuration of a solid-state imaging device according to a preferred embodiment of the present invention. The solid-state imaging device according to the present invention includes a photo diode array having a plurality of photo diodes arranged in rows and columns, and vertical charge coupling elements each having a pair arranged on both sides of each column of the photo diodes ( Or a pair of horizontal charge coupling elements (or horizontal shift registers) connected to each output side of the vertical shift registers (VBCCDn) and (VBCCDn '), the vertical charge coupling elements (VBCCDn) and (VBCCDn'). (HBCCD1) and (HBCCD2), and outputs (OUT1) and (OUT2) connected to respective output sides of the horizontal charge coupling elements (HBCCD1) and (HBCCD2).

Each unit pixel of the solid-state imaging device, as shown in FIG. 2, is arranged in a vertical direction and has two photodiodes PDt and PDb for converting incident light into charge and storing the converted charge. Include. The unit pixels are formed on one side of the corresponding photodiode PDt and PDb in the row direction so as to transfer charges stored in the corresponding photodiodes PDt and PDb, on the opposite sides, for example. 1 includes charge transfer elements consisting of a P-type impurity region 14 and a gate electrode 17 formed on the right side of the photodiode arranged above and on the left side of the photodiode arranged below.

Furthermore, the unit pixel according to the present invention extends in the vertical direction along both sides of the photodiodes PDt and PDb, respectively, and responds in response to the first and second driving signals HRM and LRM. It consists of a pair of vertical shift registers (VBCCDn) and (VBCCDn ') for transferring the charge transferred through each charge transfer element in the vertical direction.

Vertical shift registers VBCCDn and VBCCDn 'are simultaneously driven by the first and second drive signals HRM and LRM when the solid-state imaging device is intended to operate in a high resolution mode, and as a result unit The charges converted by the photodiodes PDt and PDb constituting the pixel are transferred to the corresponding vertical shift registers in the direction of the arrow, as shown in FIG. 2.

In contrast, the vertical shift registers VBCCDn and VBCCDn 'are selective by one of the drive signals HRM and LRM (e.g., LRM) when the solid-state imaging device is to be operated in low resolution mode. Is driven, the signal HRM remains inactive so that unselected vertical shift registers (eg, VBCCDn) are not operated. As a result, in the solid-state imaging device according to the present invention, both the paired vertical shift registers VBCCDn and VBCCDn 'operate in the high resolution mode, and only one (eg, VBCCDn') operates in the low resolution mode. The power consumed in low resolution mode can be reduced.

As described above, the vertical shift register may be separated and operated according to the resolution, thereby reducing power consumed when operating at a low resolution.

1 is a cross-sectional view showing a structure of a unit pixel;

2 is a block diagram showing the configuration of a solid-state imaging device according to a preferred embodiment of the present invention;

* Explanation of symbols on the main parts of the drawings

10 semiconductor substrate 11 P-well

12, 13: N-type impurity region 14, 15: P-type impurity region

16: insulating film VBCCD: vertical charge coupled device

HBCCD: Horizontal Charge Coupled Device

Claims (3)

In a solid-state imaging device composed of a plurality of unit pixels: Each unit pixel, At least two photodiodes arranged in a vertical direction for converting incident light into charges and for storing the converted charges; Charge transfer elements formed on one side of the corresponding photodiode in a horizontal direction and formed on opposite sides to transfer charges stored in the corresponding photodiode; Vertical shift registers each extending in a vertical direction along both sides of the photodiodes and transferring vertically charges transferred through corresponding charge transfer elements in response to first and second driving signals; And Connected to an output side of the vertical shift registers, the at least two horizontal shift registers respectively corresponding to the vertical shift registers; And wherein only one selected of the vertical shift registers is driven during the low resolution mode. The method of claim 1, And wherein the vertical shift registers are all driven during the high resolution mode. The method of claim 1, And the vertical shift registers are driven by first and second drive signals, respectively.

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