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KR920001518A - 반도체 집적회로 - Google Patents
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KR920001518A - 반도체 집적회로 - Google Patents

반도체 집적회로 Download PDF

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Publication number
KR920001518A
KR920001518A KR1019910008276A KR910008276A KR920001518A KR 920001518 A KR920001518 A KR 920001518A KR 1019910008276 A KR1019910008276 A KR 1019910008276A KR 910008276 A KR910008276 A KR 910008276A KR 920001518 A KR920001518 A KR 920001518A
Authority
KR
South Korea
Prior art keywords
input signal
internal
signal
operation mode
internal input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019910008276A
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English (en)
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KR950012023B1 (ko
Inventor
도오루 시오미
모쥬 오바야시
아쓰이 오니와
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR920001518A publication Critical patent/KR920001518A/ko
Application granted granted Critical
Publication of KR950012023B1 publication Critical patent/KR950012023B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)

Abstract

내용 없음

Description

반도체 집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 1실시예인 반도체집적회로에 사용되는 입력데이터 유지회로의 구체적 구성의 1예를 표시하는 도면,
제2도는 이 발명의 1실시예인 반도체집적회로에 있어 사용되는 출력데이터 유지회로의 구체적구성의 1예를 표시하는 도면,
제3도는 이 발명에 의한 반도체 집적회로에 있어 스루신호의 발생회로의 1예를 표시하는 도면.

Claims (1)

  1. 통상동작모드 및 이것과 다른 동작모드를 가지는 반도체 집적회로에 있어서, 클럭신호를 발생하는 수단과, 외부에서 제공되는 입력신호를 상기 클럭신호에 응답하고 래치하는 동시에 출력하여 내부입력신호를 발생하는 내부 입력 신호 발생수단과, 상기 내부입력 신호발생수단에서의 내부 입력신호에 응답하고 소정의 기능을 실행하는 내부기능회로수단과, 상기 내부기능회로 수단에서의 출력신호를 상기 클럭신호에 응답하고 래치하는 동시에 출력하는 출력회로수단과, 상기 통상동작 모드와 다른 동작모드를 지정하는 신호에 응답하고, 상기 내부입력신호 발생수단 및 상기 출력회로수단의 래치기능을 불능동화하고, 상기 내부입력신호발생 수단 및 상기 출력회로수단이 제공된 신호를 그대로 통과하게 하는 스루상태로 설정하는 수단을 비치한 반도체집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910008276A 1990-06-19 1991-05-22 동기 및 비동기동작을 할 수 있는 반도체집적회로 및 그 동작방법 Expired - Fee Related KR950012023B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2160847A JP2519580B2 (ja) 1990-06-19 1990-06-19 半導体集積回路
JP2-160847 1990-06-19

Publications (2)

Publication Number Publication Date
KR920001518A true KR920001518A (ko) 1992-01-30
KR950012023B1 KR950012023B1 (ko) 1995-10-13

Family

ID=15723691

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910008276A Expired - Fee Related KR950012023B1 (ko) 1990-06-19 1991-05-22 동기 및 비동기동작을 할 수 있는 반도체집적회로 및 그 동작방법

Country Status (4)

Country Link
US (1) US5124589A (ko)
JP (1) JP2519580B2 (ko)
KR (1) KR950012023B1 (ko)
DE (1) DE4115127C2 (ko)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0469894A (ja) * 1990-07-09 1992-03-05 Fujitsu Ltd 半導体記憶装置
US5287016A (en) * 1992-04-01 1994-02-15 International Business Machines Corporation High-speed bipolar-field effect transistor (BI-FET) circuit
US5361228A (en) * 1992-04-30 1994-11-01 Fuji Photo Film Co., Ltd. IC memory card system having a common data and address bus
JP2947494B2 (ja) * 1992-05-13 1999-09-13 三菱電機株式会社 Ｅｃｌ回路
US5394403A (en) * 1992-06-12 1995-02-28 Sun Microsystems, Inc. Fully testable chip having self-timed memory arrays
JP3247937B2 (ja) * 1992-09-24 2002-01-21 株式会社日立製作所 論理集積回路
US5394450A (en) * 1993-04-13 1995-02-28 Waferscale Integration, Inc. Circuit for performing arithmetic operations
JP3304577B2 (ja) * 1993-12-24 2002-07-22 三菱電機株式会社 半導体記憶装置とその動作方法
JP3490131B2 (ja) * 1994-01-21 2004-01-26 株式会社ルネサステクノロジ データ転送制御方法、データプロセッサ及びデータ処理システム
US5485110A (en) * 1994-02-01 1996-01-16 Motorola Inc. ECL differential multiplexing circuit
US5402389A (en) * 1994-03-08 1995-03-28 Motorola, Inc. Synchronous memory having parallel output data paths
US5440515A (en) * 1994-03-08 1995-08-08 Motorola Inc. Delay locked loop for detecting the phase difference of two signals having different frequencies
US5440514A (en) * 1994-03-08 1995-08-08 Motorola Inc. Write control for a memory using a delay locked loop
US5384737A (en) * 1994-03-08 1995-01-24 Motorola Inc. Pipelined memory having synchronous and asynchronous operating modes
US5416744A (en) * 1994-03-08 1995-05-16 Motorola Inc. Memory having bit line load with automatic bit line precharge and equalization
GB2288255B (en) * 1994-04-07 1998-03-11 Advanced Risc Mach Ltd Write request interlock
US5548560A (en) * 1995-04-19 1996-08-20 Alliance Semiconductor Corporation Synchronous static random access memory having asynchronous test mode
US5565816A (en) * 1995-08-18 1996-10-15 International Business Machines Corporation Clock distribution network
US6470405B2 (en) 1995-10-19 2002-10-22 Rambus Inc. Protocol for communication with dynamic memory
US6035369A (en) 1995-10-19 2000-03-07 Rambus Inc. Method and apparatus for providing a memory with write enable information
US6810449B1 (en) 1995-10-19 2004-10-26 Rambus, Inc. Protocol for communication with dynamic memory
JPH09148907A (ja) * 1995-11-22 1997-06-06 Nec Corp 同期式半導体論理装置
US6209071B1 (en) * 1996-05-07 2001-03-27 Rambus Inc. Asynchronous request/synchronous data dynamic random access memory
US6266379B1 (en) 1997-06-20 2001-07-24 Massachusetts Institute Of Technology Digital transmitter with equalization
US6216240B1 (en) * 1997-06-26 2001-04-10 Samsung Electronics Co., Ltd. Merged memory and logic (MML) integrated circuits including memory test controlling circuits and methods
AU9604698A (en) * 1997-10-10 1999-05-03 Rambus Incorporated Method and apparatus for two step memory write operations
US6263448B1 (en) 1997-10-10 2001-07-17 Rambus Inc. Power control system for synchronous memory device
US6401167B1 (en) * 1997-10-10 2002-06-04 Rambus Incorporated High performance cost optimized memory
US6295618B1 (en) * 1998-08-25 2001-09-25 Micron Technology, Inc. Method and apparatus for data compression in memory devices
DE10052210B4 (de) * 2000-10-20 2004-12-23 Infineon Technologies Ag Integrierte Schaltung mit einer synchronen und asynchronen Schaltung sowie Verfahren zum Betrieb einer solchen integrierten Schaltung
DE10115817B4 (de) 2001-03-30 2008-02-28 Infineon Technologies Ag Integrierter Speicherchip mit einem dynamischen Speicher
US8391039B2 (en) 2001-04-24 2013-03-05 Rambus Inc. Memory module with termination component
US6675272B2 (en) 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
EP1324346B1 (en) * 2001-12-20 2008-02-27 STMicroelectronics S.r.l. Memory device
US6920524B2 (en) * 2003-02-03 2005-07-19 Micron Technology, Inc. Detection circuit for mixed asynchronous and synchronous memory operation
DE102004026808B4 (de) * 2004-06-02 2007-06-06 Infineon Technologies Ag Abwärtskompatibler Speicherbaustein
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
DE102004057819B4 (de) * 2004-12-01 2010-07-22 Qimonda Ag Eingangsschaltung für eine integrierte Schaltung
US7441949B2 (en) * 2005-12-16 2008-10-28 Micron Technology, Inc. System and method for providing temperature data from a memory device having a temperature sensor
US7368955B2 (en) * 2006-03-28 2008-05-06 Intel Corporation Current-balanced logic circuit
US8836394B2 (en) * 2012-03-26 2014-09-16 Rambus Inc. Method and apparatus for source-synchronous signaling
CN103065672B (zh) * 2012-12-24 2016-03-23 西安紫光国芯半导体有限公司 一种基于同步静态随机存储器ip的异步静态随机存储器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4608669A (en) * 1984-05-18 1986-08-26 International Business Machines Corporation Self contained array timing
US4766572A (en) * 1984-12-27 1988-08-23 Nec Corporation Semiconductor memory having a bypassable data output latch
US4763020B1 (en) * 1985-09-06 1997-07-08 Ricoh Kk Programmable logic device having plural programmable function cells
US4694197A (en) * 1986-01-06 1987-09-15 Rca Corporation Control signal generator
US4756006A (en) * 1986-02-26 1988-07-05 International Business Machines Corporation Bus transceiver
JPS62220879A (ja) * 1986-03-22 1987-09-29 Hitachi Ltd 半導体装置
FR2608863B1 (fr) * 1986-12-19 1994-04-29 Nec Corp Circuit integre logique comportant des bascules electroniques d'entree et de sortie pour stabiliser les durees des impulsions
US4761567A (en) * 1987-05-20 1988-08-02 Advanced Micro Devices, Inc. Clock scheme for VLSI systems
JP2659095B2 (ja) * 1987-06-30 1997-09-30 富士通株式会社 ゲートアレイ及びメモリを有する半導体集積回路装置
EP0310377B1 (en) * 1987-10-02 1992-06-10 Kawasaki Steel Corporation Programmable input/output circuit
JP2580224B2 (ja) * 1988-01-20 1997-02-12 株式会社日立製作所 半導体記憶装置
US5003204A (en) * 1989-12-19 1991-03-26 Bull Hn Information Systems Inc. Edge triggered D-type flip-flop scan latch cell with recirculation capability
US5017813A (en) * 1990-05-11 1991-05-21 Actel Corporation Input/output module with latches

Also Published As

Publication number Publication date
JP2519580B2 (ja) 1996-07-31
JPH0453093A (ja) 1992-02-20
KR950012023B1 (ko) 1995-10-13
US5124589A (en) 1992-06-23
DE4115127C2 (de) 1995-07-13
DE4115127A1 (de) 1992-01-09

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