Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
Wang et al., 2013 - Google Patents
[go: Go Back, main page]

Wang et al., 2013 - Google Patents

A configurable fault-tolerant glitch-free clock switching circuit

Wang et al., 2013

Document ID
520685242824449088
Author
Wang H
Zhang Y
Li X
Chen L
Wen Z
Zhang K
Wang M
Publication year
Publication venue
2013 IEEE 56th international midwest symposium on circuits and systems (MWSCAS)

External Links

Snippet

This paper has analyzed the conventional glitch-free clock multiplexers. An improved glitch- free clock switching circuit is proposed, which introduces fault-tolerant function that is able to switch away from a failed clock, and adds configurable bit that controls the switching clock …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions

Similar Documents

Publication Publication Date Title
US6975145B1 (en) Glitchless dynamic multiplexer with synchronous and asynchronous controls
US8476947B2 (en) Duty cycle distortion correction circuitry
EP2932345B1 (en) Automatic selection of on-chip clock in synchronous digital systems
EP3923472B1 (en) Timing error detection and correction circuit
US4855616A (en) Apparatus for synchronously switching frequency source
US8837639B2 (en) Parallel synchronizing cell with improved mean time between failures
CN101355350A (en) Phase Shift Circuit with Low Intrinsic Delay
CN103546125A (en) A Multiple Choice-One Glitch Free Clock Switching Circuit
CN106452394A (en) Clock switching structure having automatic resetting function
US6710637B1 (en) Non-overlap clock circuit
US10205454B2 (en) Glitch free asynchronous clock multiplexer
Wang et al. A configurable fault-tolerant glitch-free clock switching circuit
US6873183B1 (en) Method and circuit for glitchless clock control
US7003683B2 (en) Glitchless clock selection circuit
US20120306585A1 (en) Oscillators with low power mode of operation
US20160077544A1 (en) Clock gating circuits and circuit arrangements including clock gating circuits
US7164296B2 (en) Runt-pulse-eliminating multiplexer circuit
US8301943B2 (en) Pulse flop with enhanced scan implementation
US9729153B1 (en) Multimode multiplexer-based circuit
CN117639749A (en) Low-power-consumption multi-clock domain clock reset system and chip
US11545987B1 (en) Traversing a variable delay line in a deterministic number of clock cycles
US8890594B1 (en) System for functional reset across multiple clock domains
Shan et al. A low-overhead timing monitoring technique for variation-tolerant near-threshold digital integrated circuits
CN112054784B (en) Robust soft-fault tolerant multi-bit D flip-flop circuit
US11437080B2 (en) Systems and methods for transmitting clock signals asynchronously to dual-port memory cells