JP2500355B2 - Josephson logic integrated circuit device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvements in Josephson logic integrated circuit devices, and more particularly to improvements in impedance matching between a group of logic gates and a high frequency power supply circuit for the group of logic gates.

[0002]

2. Description of the Related Art A Josephson integrated circuit composed of a group of Josephson logic gates is naturally incorporated as a device into a Josephson computer system or the like, and when it is put into operation, naturally, like other electronic active circuits, it goes without saying. It is necessary to receive power supply. However, characteristically, since the Josephson logic gate normally operates in the latching mode, the power supply current waveform is generally a unipolar pulsating current waveform, which also impairs the intrinsic high-speed operability of the gate. In order not to exist, it has a pulsating flow waveform of a considerably high frequency. Further, in principle, a single-phase pulsating current power supply may be used in the combinational circuit, but in the sequential circuit, the power supply current corresponds to the clock signal in the semiconductor circuit. Therefore, in order to perform signal transmission between clocks, the actual integrated circuit Then, a so-called multi-phase pulsating current power source of at least two phases different in phase from each other is used.

FIG. 2 shows a typical conventional configuration example of a portion related to high frequency power supply in such a Josephson integrated circuit device. In the case of using a two-phase pulsating current power supply, the power supply power from the high frequency power source 11 is impedance-converted by the impedance conversion transformer 12, and one or a plurality of Josephson logics are output from the secondary winding of the transformer 12. Group of gate sets 21, ・ ・ ・ ・ ・ ； 22, ・ ・ ・ ・ ・
Is supplied to. Each Josephson logic gate set 21, 22 is itself an aggregate of at least one or more Josephson logic gates, all of which together form a Josephson logic integrated circuit or integrated circuit chip. are doing. In the case shown, the groups 21, ..... of the Josephson logic gate set 21, which are shown side by side in the upper row, are driven by the first-phase pulsating power supply current P1 and are shown side by side in the lower row. A group of 22 Josephson logic gate sets
22, ... Are driven by the second phase pulsating current P2.

For the sake of explanation, FIG. 2 also shows the voltage waveform of each part, although it is schematic. As shown in the figure, the output current waveform given from the high frequency power source 11 to the primary winding of the impedance conversion transformer 12 generally touches positive and negative with a ground potential (usually zero potential in the ground plane) as the center. It is an AC waveform.

On the other hand, the impedance conversion transformer
The 12 secondary windings are grounded substantially at the midpoint by connecting the connection points of voltage regulators 14 and 15 described below, which are inserted between both ends of the secondary winding, and the secondary windings are also grounded. since current bias I _B of a predetermined size from the DC bias source 13 is flowed in, the second phase supply current P2 from the current waveform and the other end of the first phase supply currents P1 from one end current waveform of phase 180 ° from each other, and by the amount of bias current I _B to each ground potential, a positive direction to the level shifted unipolar alternating current waveform (ie pulsating voltage).

Further, the level-shifted AC current waveform is converted into a constant voltage by the voltage regulators 14 and 15. That is, the voltage regulators 14 and 15 are configured by connecting a plurality of n Josephson junctions in series, and thereby the voltage across the Josephson junctions is set to the gap voltage Vg of one Josephson junction.
Since it is fixed to a voltage n · Vg which is n times as high as that of the first-phase and second-phase power supply currents P1 supplied to the Josephson logic gate set groups 21 ,. , P2 are two-phase pulsating currents that are 180 ° out of phase with each other, and each is a voltage regulator 1 as shown in the figure.
With 4,15, the maximum positive voltage is a current with a constant nVg.

However, the illustrated high-frequency power supply circuit 10 including the above-mentioned components has a function of converting the current value by the transformer 12 and a function of stabilizing the voltage value by the voltage regulators 14 and 15, but is necessary. The most basic function is that the output impedance of the high-frequency power source 11 is compared with the power source input impedance of the logic gate set group 21 ,. Matching the power supply currents P1 and P2 of each phase. Therefore, conventionally, in order to achieve this purpose, the impedance conversion transformer 12 may not be used, but a filter circuit or a time constant circuit similar thereto may be used.
Of course, the same applies to the supply of each phase power supply current when a single-phase pulsating current power supply may be used or when a three-phase or more multi-phase pulsating current power supply is used.

[0008]

Whether the filter type or the transformer type shown in FIG. 2 is used, the power source output impedance of the high frequency power supply circuit 10 and the Joseph driven by this are conventionally used. It was designed to match the power supply input impedance of the Son logic gate set group one-to-one. This is certainly a very general design method adopted in various electronic circuits. However, as long as this conventional method is followed, the high frequency power supply circuit 10 has no flexibility. That is, the power supply input impedance of the Josephson logic gate set group depends on the number of actual logic gates included in the logic gate set group. Therefore, since the power supply input impedances also differ between integrated circuits having different numbers of logic gates, the same high frequency power supply circuit is provided between them.
10 could not be shared, and each integrated circuit required a dedicated design.

This is a major drawback in practice. For example, in the high-frequency power supply circuit 10, even if the high-frequency power source 11 is externally mounted, another part that substantially constitutes the impedance conversion circuit is provided with another dedicated chip or a Josephson logic integrated circuit chip. Such inflexibility is extremely uneconomical when provided in a chip carrier that is designed to be used. Redesigning a dedicated chip or chip carrier for each Josephson logic integrated circuit to be used is not only labor-intensive but also very costly.

Further, in the case of a Josephson logic integrated circuit driven by a multi-phase pulsating current power source as represented by the above-mentioned two-phase pulsating current power source, the number of Josephson logic gates to be driven for each phase. Are not always equal, but are often different. In other words, the power supply input impedances of the Josephson logic gate set groups to be driven are different for each phase. for that reason,
In the past, it was difficult to design a power supply with an appropriate output impedance for each phase, and the circuit configuration could easily become complicated. To avoid this, however, the number of logic gates for each phase should be changed. Designing the same was also extremely difficult.

[0011]

SUMMARY OF THE INVENTION In order to solve or alleviate the above drawbacks of the prior art, the present invention provides a high frequency power supply circuit with respect to the power supply input impedance of a group of Josephson logic gates which operates by receiving supply of power supply current. Intentionally lower the power supply output impedance. That is, the high frequency power supply circuit is manufactured so that the power supply power can be supplied also to the circuit having the power supply input impedance lower than that of the Josephson logic gate set group to be actually driven. Then, a dummy resistor for bypassing the power supply current is provided in parallel to the Josephson logic gate set group, and the apparent (or effective) power source of the Josephson logic gate set group viewed from the power supply side is provided. The input impedance is lowered to match the power output impedance of the high frequency power supply circuit.

Furthermore, in the present invention, in addition to the above basic configuration, as a more desirable configuration, the above dummy resistors are configured by a plurality of parallel resistance groups, and the plurality of resistances are arranged in a Josephson logic integrated circuit chip. It is also proposed to disperse them geometrically.

The above-mentioned configuration according to the present invention has a structure in which a plurality of Josephson logic gate set groups, that is, as described with reference to FIG. In the case where there is a Josephson logic gate set group driven by the first-phase pulsating current power source and a Josephson logic gate set group driven by the second-phase pulsating current power source, a predetermined number is set for each group. It can be applied when supplying a high frequency power source current of a phase. That is, one or more dummy resistors are provided in the first logic gate set group so as to match the power supply input impedance of the first Josephson logic gate set group to the power supply output impedance of the first phase pulsating current power supply. In parallel, in the same way, to match the power source input impedance of the second Josephson logic gate group to the power source output impedance of the second phase pulsating current power source, one or more in the second logic gate group Attach multiple dummy resistors in parallel.
Even when using a multi-phase pulsating power supply of three or more phases, the present invention can be applied to each phase in exactly the same manner, and is not limited to the phase relationship of the power supplies, and independent high-frequency power supplies can be used in one Josephson logic integrated circuit. If there are Josephson logic gate sets to be driven by, then it can be applied to each of them. Even in the case shown in FIG. 2, the high-frequency power supply circuit 10 is the same circuit as the power supply circuit for both the first phase and the second phase, but in principle it is independent of each other. There is a circuit part for generating the first-phase power supply current and a circuit part for generating the second-phase power supply current, and it can be considered that these are realized by the same circuit by a rational circuit configuration method. . The terms in the gist of the present invention are also defined according to such a standard.

[0014]

1 shows one embodiment of a Josephson logic integrated circuit constructed according to the present invention. In order to clarify the comparison with the conventional example, the original circuit which is the object of the improvement by the present invention is the same as the circuit shown in FIG.
The same or identical constituent elements are designated by the same reference numerals as in FIG. Therefore, the description of the components denoted by the same reference numerals can be applied to the description of the conventional example.

In the embodiment of the present invention shown in FIG. 1, the high frequency power supply circuit 10 is shown to use the impedance conversion transformer 12, and the voltage regulators 14 and 15 respectively provide predetermined voltage values from both ends of the secondary winding. Each of the pulsating current source currents P of the first phase and the second phase whose maximum voltage value is constant
1, P2 is output. Although not directly related to the present invention, the number of series Josephson junctions forming the voltage regulators 14 and 15 may be different, that is, the constant voltage values may be different, if necessary.

Driven by the first phase power supply current P1 is a plurality 2 of the Josephson logic gate set 21 shown in plural.
1, ..., and each Josephson logic gate set 21
As such, may include multiple Josephson logic gates. Similarly, the plurality of second Josephson logic gate set groups 22, ..., Which are shown in plural, are driven by the second-phase power supply current P2.

However, although the circuit diagram is similar to that in FIG. 2 described above and so far, when the present invention is applied, the first phase power supply current of the high frequency power supply circuit 10 is applied.
The power supply output impedance related to P1 is designed to be intentionally lower than the power supply input impedance of the first group Josephson logic gate set group 21, ..., Driven by the first phase power supply current P1. Similarly, the power supply output impedance related to the second phase power supply current P2 of the high frequency power supply circuit 10 is the second group Josephson logic gate set group 22 driven by the second phase power supply current P2. It is designed to be intentionally lower than the power input impedance of.
Therefore, impedance matching is not performed as it is.

As described above, in the present invention, first, the power supply output impedance of the high frequency power supply circuit 10 is intentionally designed to be low so that an impedance mismatch state is intentionally generated. Then, next, at least one dummy resistor R _X , R _Y for bypassing the power supply current is provided in parallel with each of the Josephson logic gate set groups 21 ,. , Each Josephson logic gate set as seen from the power supply side 21, ・ ・ ・ ・ ・ ； 2
High frequency power supply circuit by reducing the apparent or effective power input impedance
Match the power supply output impedance of 10.

In the illustrated case, in particular, each Josephson logic gate set belonging to each of the first and second groups.
Dummy resistors R _X and R _Y are provided in parallel with each of 21 and 22, and therefore, the dummy resistor groups are provided to the high frequency power supply circuit 10.
R _X , ...; R _Y , ... are all connected in parallel for each phase as a power supply load. However, according to the principle of the present invention, which will be described again below, such a dummy resistor R _X , R _Y may be one for each phase, and even if there are multiple, instead of putting them in parallel for each of the Josephson logic gate sets, they may be put in parallel for some You may enter.

In any case, according to the idea of the present invention, as long as it is equal to or higher than the power output impedance of the high-frequency power supply circuit 10, the Josephson logic gate set group 21, driven by the high-frequency power supply circuit 10, ·····;twenty two,·
Even if the power supply input impedances of ... Are different, the same high frequency power supply circuit 10 can be applied to any of them by changing the values of the dummy resistors R _X and R _Y. There is no need to change the high frequency power supply circuit itself, so even if the high frequency power source 11 is externally mounted and other parts are mounted on the carrier of the dedicated chip or the Josephson logic integrated circuit chip, the logic on the Josephson logic integrated circuit side Even if the number of gates has changed, there is no need to redesign the dedicated chip or chip carrier, and it can be reused, which is extremely economical and rational.

As described above, for example, the number of logic gates included in the Josephson logic gate set group 21, ..., Which should be driven by the first-phase power supply current P1, and the second-phase power supply Even if the number of logic gates included in the Josephson logic gate set group 22, ..., Which should be driven by the current P2 is different, the values of the dummy resistors R _X and R _{Y to} be added in parallel are changed. Only, the effective power input impedance for each phase can be adjusted and changed independently and easily, and the high frequency power supply circuit 10 having substantially the same power output impedance for each of the first phase and the second phase can be used. At any given time, you can escape the complex design of having to match the number of logic gates.

Further, as shown in FIG. 1, when the dummy resistors R _X and R _Y are composed of a plurality of parallel resistors, a desired effect can be obtained in another sense. That is, such dummy resistors R _X , ...; R _Y , ... are, in fact, generally also a plurality of Josephson logic gate sets 21 ,.
2, since it is formed on the same chip as the Josephson logic integrated circuit chip ----- is mounted, the their resistance R _X on a chip, as every single R _Y away from each other, as far as possible the geometric , The dummy resistors R _X and R _Y
Even though each consumes power supply power, it is possible to avoid concentration of heat generation on the chip. Therefore, in this sense, the larger the number of dummy resistors R _X , ...; R _Y , ... in parallel, the better, but there are of course restrictions on the occupied area and pattern layout. Conceivable.

As one preferable guideline regarding this, when the standard cell type automatic placement and routing method in this kind of field is followed, a plurality of rows of Josephson logic gates are geometrically arranged in rows in the same chip. Since they are arranged side by side, each column is set to each Josephson logic gate set 21, ...; 22, .., and one dummy resistor R _X , for each column. It is better to add R _Y in parallel.

Of course, in the case of forming a plurality of dummy resistors, it is preferable that at least each phase has the same resistance value because the design including the geometrical area and the arrangement relationship is easy. Therefore, each Josephson logic gate set 2
It is desirable that the number of gates in 1, ...; 22, ... be the same, but it is not limited. Conversely, the Josephson logic gate set 21, ...; 22, be different in number of gates in ..., mere dummy resistor R _X According to the present invention, ... ;
There is a great effect that impedance matching with the power source can be performed while achieving uniform dispersion of heat generation only depending on the value of R _Y.

According to the idea of the present invention, in principle, the lower the power supply output impedance of the high frequency power supply circuit 10 is designed, the more it can be used for various kinds of gate number of Josephson logic integrated circuits. The range will expand.
However, making a high-frequency power supply circuit with an ultra-low output impedance means making a power supply with an extremely high load drive capability, so it must be kept to a considerable extent.
When it is viewed as a circuit device, it causes an increase in size and waste.

Considering these points, a specific numerical example will be given. In the Josephson logic integrated circuit using the Nb / AlO _X / Nb junction, the voltage regulators 14 and 15 are used.
The power supply voltage defined by
11.2 mV, which is four times 2.8 mV (4 Nb / AlO _X / N
b Josephson junctions connected in series for voltage regulator 1
4 and 15), the maximum current per logic gate
If it is set to 200 μA and they are used with a current bias of 75%, the impedance per logic gate is 74.7Ω. Since the impedance of the entire Josephson logic integrated circuit is the value obtained by dividing the impedance per logic gate by the total number of gates, for example, the Josephson logic gate set group driven by the first-phase pulsating current power supply.
When the total number of gates for 21, ... Is 1500, the power supply input impedance of the Josephson logic integrated circuit for the first phase is 74.7Ω / 1500 gates = 0.0498Ω.

In such a case, a high frequency power supply circuit having a power output impedance corresponding to the 1500 gates has been conventionally manufactured as described above, but the present invention can support a larger number of gates. A high frequency power supply circuit 10 is produced. For example, in consideration of double the margin, the output impedance of the first phase power supply is 74.7Ω / 3000 gates = 0.0249Ω so that it can be applied to the Josephson logic integrated circuit with 3000 gates.

On the other hand, according to the present invention, a dummy resistor R _X to be provided in parallel with the Josephson logic integrated circuit is connected to the above-mentioned impedance 0.04 of the Josephson logic integrated circuit.
Decrease 98 Ω to half the power output impedance 0.
In order to match with 0249Ω, if it is set to one, the value is formed to be 0.0498Ω.

However, in practice, as described above, it is better to configure the dummy resistor from a plurality of parallel resistor groups R _X , ... In the case of a Josephson logic integrated circuit with 16 columns of Josephson logic gate set groups 21, ... Designed by, one for each column, a total of 16 parallel dummy resistor R _X, and the subjecting the ......, those values of the resistors R _X, is 16 times the respective values in the case of resistive one, the 0.7968Omu.

Further, in order to equalize not only the resistance portion but also the heat generation for each area portion including each Josephson logic gate set 21 in which the resistance is geometrically close to each other, the respective Josephson If the number of gates in the Son logic gate set is different, the resistance that should be added in parallel for each Josephson logic gate set so that the parallel combined resistance values of each gate and the dummy resistances connected in parallel with each other are all the same. You can change the value of.

The details of the embodiment of the present invention have been described above.
Modifications based on the gist of the present invention are free. Also for the high frequency power supply circuit 10, the one using the impedance conversion transformer 12 is illustrated in the case shown, but the present invention is not limited to the filter type adopting the passive time constant circuit as described above. Applicable.

[0032]

According to the present invention, as long as the Josephson logic integrated circuit has a power source input impedance higher than the power source output impedance of the high frequency power source circuit, the high frequency power source circuit having the same configuration even if the number of included logic gates is different. Can be shared. In other words, the flexibility of the high frequency power supply circuit is increased, which is rational and economical. Moreover, even in a Josephson logic integrated circuit driven by a multi-phase pulsating current power supply, it is not necessary to design the number of logic gates for each phase to be the same, and only the functions required for each phase are focused on. All reasonable and easy circuit design can be accepted.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of an embodiment of a Josephson logic integrated circuit device constructed according to the present invention.

FIG. 2 is a schematic configuration diagram of an example of a conventional Josephson logic integrated circuit device.

[Explanation of symbols]

10 high frequency power supply circuit, 11 high frequency power source, 12 impedance conversion transformer, 13 DC bias source, 14 voltage regulator, 15 voltage regulator, 21 Josephson logic gate set, 22 Josephson logic gate set, P1 first phase pulsating current , P2 Second-phase pulsating current, R _X dummy resistance, R _Y dummy resistance.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Susumu Takada 1-1-4 Umezono, Tsukuba-shi, Ibaraki Electronic Technology Research Institute, Industrial Technology Institute (56) Reference JP-A-63-304677 (JP, A) JP Flat 2-268474 (JP, A) JP 58-43652 (JP, A) JP 61-174815 (JP, A)

Claims (4)

(57) [Claims] 1. A Josephson logic integrated circuit including a group of Josephson logic gates which operates by receiving supply of a power supply current; and a power output impedance lower than a power input impedance of the Josephson logic gate group. A high frequency power supply circuit for supplying the power supply current to the Josephson logic gate set group; effectively reducing the power supply input impedance of the Josephson logic gate set group, and the power supply output impedance of the high frequency power supply circuit Josephson logic integrated circuit device comprising: at least one dummy resistor provided in parallel with the group of Josephson logic gate groups for bypassing the power supply current. 2. The Josephson logic integrated circuit device according to claim 1, wherein the dummy resistors are composed of a plurality of parallel dummy resistors, and the plurality of dummy resistors are geometrically arranged in the Josephson logic integrated circuit. A distributed Josephson logic integrated circuit device. 3. The Josephson logic integrated circuit device according to claim 2, wherein the Josephson logic gate set group is a group of a plurality of Josephson logic gate sets including a plurality of Josephson logic gates; Each set of Josephson logic gates is geometrically arranged in a column in the Josephson logic integrated circuit and in a juxtaposed relationship with each other; and the plurality of dummy resistors are connected to the plurality of Josephson logics. One for each gate set,
A Josephson logic integrated circuit device characterized by being provided in parallel. 4. The Josephson logic integrated circuit device according to claim 1, 2 or 3, wherein the high frequency power supply circuit is interposed between an external high frequency power source and the Josephson logic integrated circuit. A high-frequency power supply circuit and the Josephson logic integrated circuit are mounted on the same chip carrier except the external high-frequency power source; and a Josephson logic integrated circuit device.