JP2551143B2 - ATM switch communication path failure detection system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a communication path device of a digital electronic switching system, and more particularly to an ATM switch communication path capable of detecting a communication path failure between an active system and a standby system. Fault detection system.

[Conventional technology]

Conventionally, in a packet switching system, storage control is performed by a processor. For this reason, a parity check method and a check method of presence / absence of cell discard by software control are generally used for detecting a channel failure.

However, such a conventional method for detecting a communication path failure cannot achieve processing of high-density information such as an image. Therefore, in the ATM (Asynchronous Transfer Mode) cell (packet) switching system, high-speed cell switching is performed by hardware, and troublesome error control is carried out at the end of the network between end-to-end terminals. I'm going to do it.

[Problems to be Solved by the Invention]

In this way, the conventional ATM cell switching system does not detect or process errors on the communication path or transmission path on the network side. Therefore, as in the case where an intermittent bit error occurs, it is possible to perform error control such as retransmission for those that can detect errors between end-to-end terminals. There was a problem that fixed failures could not be dealt with.
Further, the conventional failure detection method has a problem that it is not possible to confirm the normal method of the standby system in the system having the standby system in order to cope with the hardware failure.

SUMMARY OF THE INVENTION An object of the present invention is to provide a detection system for detecting a fault in the active system and the standby system of an ATM switch communication path.

[Means for solving the problem]

According to the present invention, (i) a distribution circuit that distributes an input cell of an incoming line to both a working system and a standby system, (ii) an insertion circuit that inserts a test cell for detecting a failure into the incoming line, and (iii) a working circuit A first extraction circuit arranged on the output side of both the system and the standby system to extract a test cell; (iv) a switching circuit for selecting one of the outputs of both systems as the active system; and (v) this switching circuit. A second extraction circuit arranged between the outgoing lines, and (vi) a detection circuit for detecting a fault in the active communication channel depending on whether a test cell is detected within a predetermined time by the second extraction circuit. And (vii) a comparison circuit that compares the test cells of both systems extracted by the first extraction circuit and detects the failure of the standby system by taking the logic of the detection result of the detection circuit and the ATM switch communication path failure detection Prepare for the system.

That is, in the present invention, a test cell is inserted before the ATM switch communication path by the insertion circuit, and it is checked whether or not this test cell is detected at a stage after the switching circuit to check whether there is a failure in the active system. To do. In addition, the test circuit inserted by the insertion circuit is distributed to the active system and the standby system by the distribution circuit, and the test cells after passing through these ATM switch communication paths are compared by the comparison circuit to check the failure of the standby system. Check for existence.

〔Example〕

 Hereinafter, the present invention will be described in detail with reference to Examples.

FIG. 1 shows the structure of an ATM switch communication path in an embodiment of the present invention.

The cells “A”, “B”, “C”, ..., Which have been transmitted through the incoming line 11 through this ATM switch communication path, are input to the input cell distribution circuit 12. The input cell distribution circuit 12 uses this as two ATM switch communication paths 1 for "0 system" and "1 system".
Distribute into 3 and 14. Test cell extraction circuits (first extraction circuits) 15 and 16 are arranged on the output sides of these ATM switch communication paths 13 and 14, respectively. These circuits 15 and 16 are circuits for extracting the test cell “T” or its copy “T1” inserted into the incoming line 11 through the test cell inserting circuit 17. A switching circuit 18 is arranged at the subsequent stage of the test cell extraction circuits 15 and 16, and only the active cell passes through this and passes through the test cell extraction circuit (second extraction circuit) 19 to the outgoing line 21.
Sent to

Here, the test cell extraction circuit 19 is a test cell extraction circuit.
This is a circuit that extracts the test cell “T2” or “T3” that has passed 15 and 16. Extracted test cell “T2” or “T
3 "is input to the test cell detection circuit 22, and the detection result is sent to the communication path control circuit 25 as a fault display 24 of the active system.
This speech path control circuit 25 includes both test cell extraction circuits 15,
The spare system fault display 27 as a comparison result obtained by comparing the 16 extracted test cells "T" and "T1" by the test cell comparison circuit 26 is also input. The speech path control circuit 25 controls the test cell insertion circuit 17 and also performs necessary control of the speech path in accordance with both the failure indications 24 and 27.

Now, the operation of the ATM switch communication path failure detection system of this embodiment will be described by taking as an example the case where the "0" ATM switch communication path 14 is in use.

The cells "A", "B", and "C" that have entered from the incoming line 11 are input to the input cell distribution circuit 12 and are sent to the active ATM switch communication path 14 as they are. Copies "A1", "B1", and "C1" of each cell are sent to the ATM switch communication path 13 of the standby system.

By the way, the speech path control circuit 25 sends a test cell "T" for detecting a failure from the test cell insertion circuit 17 to the incoming line 11. In this embodiment, the test cell "T" is inserted between the cell "A" and the next cell "B". As a result, each cell "A", "T", "B", "C" is sent to the input cell distribution circuit 12 in this order. Therefore, the input cell distribution circuit 12
The cells "A", "T", "B", and "C" are transmitted in this order to the active ATM switch communication path 14. In the standby ATM switch communication path 13, the Cobyed cells are "A1", "T1", "B1",
It will be sent in the order of "C1".

As a result, the test cell “T” is extracted from the test cell extraction circuit 16 and the test cell “T1” is extracted from the other test cell extraction circuits 15 and input to the test cell comparison circuit 26. If they do not match in the test cell comparison circuit 26, the standby circuit AT is assumed to be normal by the detection circuit described later on the assumption that the active ATM switch communication path 14 is normal.
A failure of the M switch communication path 13 is detected and a failure display 27 is displayed.

On the other hand, the test cell extraction circuit 16 creates a copy "T2" of the extracted test cell "T", and incorporates this copy in place of each of the cells "A", "T2", "B", "C". As switching circuit 18
To send to. In the other test cell extraction circuit 15 as well, a copy "T3" of the test cell "T1" is made in the same manner, and this is incorporated as a test cell instead of each cell "A1", "T3", "B".
1 "and" C1 "are sent to the switching circuit 18.

Since the switching circuit 18 selects the ATM switch communication path 14 side of the active system, each cell “A1”, “T3”, “B1”, “C1” sent from the extraction circuit 15 is discarded here. To be done. Then, the cells “A”, “T2”, “B”, and “C” sent from the test cell extraction circuit 16 are output, and the test cell extraction circuit
Entered in 19. The test cell extraction circuit 19 extracts the test cell “T2” and supplies it to the test cell detection circuit 22. The remaining cells “A”, “B”, and “C” are sent to the outgoing line 21.

Now, the test cell extraction circuit 19 includes a detection logic circuit 28 for inputting the extracted test cell "T2". The detection logic circuit 28 has a timing signal from the detection timing circuit 29.
31 is also being supplied. The detection logic circuit 28 is
At the timing when the timing signal 31 is input, it is determined whether or not the test cell "T2" is detected, and if not detected, the fault display 24 of the active system is performed.

It is known from the detection result of the detection logic circuit 28 whether a failure has occurred in the active system. Therefore, when the comparison result of the comparison circuit 26 indicates that the test cells of both systems match, it is understood that the standby system is normal. On the contrary, when the comparison result shows the disagreement between the two systems, it means that the active system is normal and therefore the standby system has a failure. In this way, the failure of the standby system is detected.

〔The invention's effect〕

As described above, according to the present invention, it is possible to detect a fault in the active communication path by checking whether the test cell is detected within the predetermined time by the second extraction circuit. Further, since the failure of the standby system can be detected by comparing the test cells of both systems extracted by the first extraction circuit, there is an effect that the latent failure of the standby system can be prevented.

[Brief description of drawings]

FIG. 1 is a system configuration diagram showing the configuration of an ATM switch communication path failure detection system according to an embodiment of the present invention. 11 …… Incoming line, 12 …… Input cell distribution circuit, 13,14 …… ATM switch communication path, 15,16 …… Test cell extraction circuit (first extraction circuit), 17 …… Test cell insertion circuit, 18 ...... Switching circuit, 19 …… Test cell extraction circuit (second extraction circuit), 21 …… Outgoing line, 22 …… Test cell detection circuit, 26 …… Test cell comparison circuit.

Claims (1)

(57) [Claims] 1. A distribution circuit for distributing an input cell of an incoming line to both a working system and a standby system, an insertion circuit for inserting a test cell for detecting a fault into the incoming line, and outputs of both the working system and the standby system. A first extraction circuit arranged on the side for extracting a test cell, a switching circuit for selecting one of the outputs of both systems as an active system, and a second extraction circuit arranged between this switching circuit and the outgoing line. A detection circuit for detecting a fault in the active communication path depending on whether or not a test cell is detected within a predetermined time by the second extraction circuit, and test cells for both systems extracted by the first extraction circuit An ATM switch call characterized by including a comparison circuit for comparing the above and a standby system fault detection circuit for detecting a fault in the standby system by taking the logic of the comparison result by the comparison circuit and the detection result of the detection circuit. Road obstacle detection system