JP2553687B2 - Remote control receiver circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a remote control (hereinafter abbreviated as remote controller) reception circuit, and more specifically, in a remote control reception circuit,
It is equipped with a remote controller signal leader detection circuit, a "1" and "0" data discrimination circuit, and a trailer detection circuit. By connecting the output signals of these circuits to the CPU section of the microcomputer as an interrupt signal, software for remote control signal discrimination The present invention relates to a remote control receiving circuit capable of significantly reducing wear processing.

2. Description of the Related Art In recent years, there has been remarkable adoption of remote controls in various home appliances, and most home appliances such as TVs, VTRs, audio products, and air conditioners are equipped with a remote control, which turns on / off the power. Many controls such as channel selection are performed. Microcomputers have also been incorporated into many electronic devices to realize high added value. Recently, the above remote control receiving circuit is mounted on a microcomputer, and by processing the complicated remote control signal discrimination by software, it realizes a more complicated function, and the added value of electronic equipment and the number of parts are reduced. We are making reductions and cost reductions possible.

FIG. 2 shows an example of a remote control signal, which is a reader section consisting of a head pulse indicating that the remote control signal follows, a data section encoding a function to be controlled by "1" and "0" of data, It consists of an end low level trailer section that indicates when the remote control signal has ended.
"1" and "0" of the data are distinguished by the duty of the high level and the low level period of the pulse. In the case of FIG. 2,
Duty 1: 1 is a code of “0” and duty 1: 2 is a code of “1”
It corresponds to the code of. Also, this remote control signal is 5
Since it consists of bit pulses, it is possible to generate ²⁵ = 32 different codes and control 32 different functions.

FIG. 3 shows an example of the configuration of a conventional remote control receiving circuit mounted in a microcomputer, which is composed of a remote control signal edge detection circuit 1, a programmable counter 2, an overflow detection circuit 4, and a CPU section 3. The operation of this remote control receiving circuit will be described below. When the remote control signal is input to the microcomputer, the edge detection circuit 1
Thus, the rising edge of the remote control pulse is detected, an interrupt signal is generated in the CPU unit 3, and thereafter the CPU is controlled to perform remote control signal processing. The CPU must first detect the reader part of the remote control signal and determine that the pulse that follows is not a noise, but a true remote control pulse. Therefore, in order to count the pulses corresponding to the reader section, the frequency division ratio for counting the pulse value corresponding to the reader section is set in the programmable counter 2. The programmable counter is supplied with a constant sampling clock from the outside, and counts the width of the pulse input at each time step of the clock. When the programmable counter overflows, the signal is input to the overflow detection circuit 4 and tells the CPU whether or not a predetermined head pulse has come depending on whether or not the overflow has occurred.
When it determines that a regular head pulse has arrived, the CPU
Moves to remote controller data discrimination. Similar to the reader detection, the CPU sets the frequency division ratio for distinguishing "1" or "0" of the remote controller in the programmable counter. This programmable counter is designed to be reset at the rising edge of the remote control signal. Therefore, set the division ratio corresponding to the remote control signal "0", and set "1" if an overflow occurs, and not if an overflow occurs. Indicates that the remote control signal is "0". In this way, the 5-bit data is sequentially discriminated, and the CPU stores the contents in the internal register or the like, and moves to the next trailer detection. The trailer detection is performed in the same manner by setting a frequency division ratio in the programmable counter for detecting that the rising edge of the remote control signal does not come for a certain period or longer.

By the above operation, the microcomputer receives and discriminates the remote control signal, discriminates the code of the 5-bit data stored in the internal register of the CPU and the like, and outputs the control signal according to the received remote control signal to the output terminal of the microcomputer or the like Then, a series of remote control reception processing ends.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention In the above conventional remote controller reception circuit for a microcomputer, as described above, a very complicated software such as leader detection, data “1” “0” determination, and trailer detection is performed for remote control signal discrimination. The processing becomes necessary, the number of program steps increases, and the increase in the ROM capacity of the microcomputer leads to a cost increase.

The present invention has been made for the purpose of making it possible to easily execute the software processing of the complicated remote control signal discrimination and reducing the number of steps of the program.

Means for Solving the Problems In order to solve the above problems, the present invention replaces a programmable counter of a conventional remote control receiving circuit with a normal counter and replaces it with an overflow detecting circuit, and a reader detecting circuit, a data discriminating circuit, and a trailer. The configuration is such that a detection circuit is added and each output is connected as an interrupt signal to the CPU.

Action The action of the above means to solve the above problems will be described below. Similar to the conventional example, the counter is reset at the rising edge of the remote control signal and operates free-running by the sampling clock from the outside, and its output is directly connected to the reader detection circuit, the data discrimination circuit, and the trailer detection circuit. The reader detection circuit generates an interrupt signal when a regular head pulse arrives. The data discriminating circuit is constituted by a register for discriminating "1" or "0" of the remote control signal and sequentially storing the discriminated signal. For example, the 5-bit remote control signal is received to discriminate the data, and the data is stored in the register. If you store everything,
Generate an interrupt signal. The trailer detection circuit generates an interrupt signal by detecting the end roll level of the remote control signal. CPU is the above-mentioned reader detection circuit,
A series of remote control signals can be decoded by sequentially processing each interrupt signal from the data discrimination circuit and trailer detection circuit, and as in the past, programmable according to the reader section, data section, and trailer section. It is not necessary to set the frequency division ratio of the counter to perform complicated software processing, and the number of program steps can be greatly reduced.

Embodiment An embodiment of the above means will be described below with reference to the drawings.
FIG. 1 shows an embodiment of the present invention, which shows a microcomputer remote control receiving circuit provided with a free-run counter 5, a reader detecting circuit 6, a data discriminating circuit 7 and a trailer detecting circuit 8. In FIG. 1, when a remote control signal is input to the microcomputer, a remote control reception interrupt signal is generated from the edge detection circuit 1, and the CPU 3 shifts to a remote control signal decoding processing routine. When the remote control reception interrupt signal is input to the CPU3 from the edge detection circuit 1 and the CPU3 shifts to the signal decoding processing routine, the CPU3 waits for the reader detection interrupt signal output from the reader detection circuit 6 to be input, that is, , Waiting for an interrupt from the reader detection circuit 6 to occur.

After that, when the free run counter 5 counts the number of bits corresponding to the reader section, the leader detection circuit 6 outputs CP.
The reader detection interrupt signal is output to U3, and the CPU 3 goes from a state of waiting for an interrupt from the reader detection circuit 6 to a state of waiting for an interrupt from the data discrimination circuit 7.

Further, the data discriminating circuit 7 discriminates between "1" and "0" in the data portion of the remote control signal and sequentially stores the discriminated signal in the internal register. When the free-run counter 5 counts the number of bits corresponding to the data portion of the remote control signal, the data discriminating circuit 7 causes the CPU 3
The data discrimination interrupt signal is output to the CPU 3, and the CPU 3 goes from waiting for the interruption from the data discrimination circuit 7 to waiting for the interruption from the trailer detection circuit 8.

Furthermore, when the end low level is detected from the count value of the free-run counter 5, the trailer detection circuit 8
A trailer detection interrupt signal is output to CPU3.

Then, when the trailer detection interrupt signal is output, the CPU 3 recognizes that the reader detection circuit 6, the data determination circuit 7, and the trailer detection circuit 8 have completed the reception processing of the series of remote control signals. Then, the data portion of the remote control signal stored in the data discriminating circuit 7 is read from the reader detecting circuit 6 to the CPU 3, the CPU 3 discriminates the code, and the CPU 3 performs the processing according to the code. Thus, the decoding process of the remote control signal is completed. As described above, the remote control signal decoding process only needs to wait for the interrupt signal from each block of the remote control receiving circuit and process the sequence sequentially. As in the conventional case, the frequency division ratio setting of the programmable counter and the data “1” There is no need for complicated software processing such as storing data judged as 0 ". Further, while waiting for the interrupt signal, the CPU 3 can perform other processing, and it becomes possible to increase the processing capability of the microcomputer in addition to reducing the program steps of software.

EFFECTS OF THE INVENTION As is apparent from the above description, according to the remote control receiving circuit of the present invention, remote control signal decoding processing, which conventionally required complicated software processing, can be easily performed. Also,
By reducing the ROM size by reducing the number of program steps, the cost of the microcomputer can be reduced and the price of various electronic devices can be reduced. In addition, by adding dedicated hardware such as a data discriminating circuit to the remote control receiving circuit, the software processing can be reduced, and the microcomputer can perform other processing correspondingly to improve the processing capacity.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a remote control receiving circuit according to an embodiment of the present invention, and FIG. 2 is a diagram showing the configuration of a remote control signal. The data signal includes a reader section, a 5-bit data section, and a trailer section. An example (pulse train), FIG. 3 is a configuration diagram showing a conventional microcomputer remote control receiving circuit. 1 ... Remote control signal edge detection circuit, 2 ... Programmable counter, 3 ... CPU, 4 ... Overflow detection circuit, 5 ... Free run counter, 6 ... Remote control signal reader detection circuit, 7 ... Remote control signal data discrimination Circuit, 8 ... Remote control signal trailer detection circuit.

Claims (1)

(57) [Claims] 1. A remote control reception circuit for receiving a remote control signal composed of a reader section, a data section, and a trailer section. When a rising edge of the remote control signal is detected and the remote control signal is input, a remote control reception interrupt signal. An edge detection circuit for outputting to the CUP, a free-run counter for counting the remote control signal, a reader detection circuit for outputting a reader detection interrupt signal to the CPU when a reader unit is detected from the count result of the free-run counter, and When a data section is detected from the count result of the free-run counter, a data discrimination interrupt signal is output to the CPU, and a "1" or "0" in the data section is discriminated and the discrimination result is stored in the internal register section. When the trailer part is detected from the count result of the free run counter, A trailer detection circuit that outputs a trailer detection interrupt signal to the CPU, and when the remote control reception interrupt signal is output from the edge detection circuit to the CPU, the CPU is in a state of waiting for an interrupt from the reader detection circuit, When the reader detection interrupt signal is output from the reader detection circuit to the CPU, the CPU waits for an interrupt from the data determination circuit, and when the data determination circuit outputs a data determination interrupt signal to the CPU. When the CPU is in an interrupt waiting state of the trailer detection circuit and the trailer detection interrupt signal is output from the trailer detection circuit, the determination result stored in the data determination circuit is output to the CPU and the determination result is output from the CPU. A remote control receiving circuit, wherein the CPU decodes a remote control signal.