JP2554043B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a semiconductor device and a method for manufacturing the same. In particular, the present invention relates to a semiconductor device capable of reducing contact resistance and a method for manufacturing the same.

[Conventional technology]

When a contact hole is formed in a semiconductor substrate and a conductive material is attached to the contact hole for connection, the resistance may increase depending on the size of the contact hole and the conductive material used.

For example, FIG. 7 shows that the width 1 of the contact hole 1 is 1.
The thickness is 0 μm (or less), and it is an example configured by sputtering Al (aluminum) 2.
Due to the poor step coverage of the system, it is inevitable that the contact hole 1 has a high resistance. In other words, since the thickness of Al2 that is sputtered differs at each position, as shown in Fig. 7, the inner wall of the contact hole where Al2 is deposited the thinnest (A
The thickness of l2 is shown by w), and the resistance is determined. In this way, the resistance of the contact hole 2 is determined by the place where the thickness of Al2 is the thinnest, so the resistance is inevitably increased. With a contact hole as small as this, it is no longer possible to cope with the high resistance due to the shape of the hole (such as formation of a step). In addition, 3 in the figure is the base Si (silicon)
Layers 4 are SiO ₂ interlayer films. Although the drawing is a cross-sectional view, some hatching is omitted for clarity of illustration (the same applies to other drawings).

FIG. 8 shows another conventional example. In this, W (tungsten) 5 is selectively deposited on the bottom of the contact hole 1. According to the selective deposition of W, the contact hole 1 has the 1.0 μm rule or less (that is, the width l
Is 1.0 μm or less), W is satisfactorily embedded in the contact hole 1, which is advantageous. Further, Al2 can be deposited on the formed W as shown by the broken line. According to this, the depth of the contact hole 1 becomes shallow, and the step difference in appearance becomes small. Thus, W formed by selective deposition is preferable, but W5 inevitably diffuses laterally according to the selective deposition. This is an unavoidable diffusion when W is selectively deposited on a workpiece processed by etching, and is an abnormal diffusion that is considered to be in line with damage caused by etching. Diffusion
It is called "spike". In the present specification, such anomalous diffusion will be appropriately referred to as “spike” hereinafter. In FIG. 8, this spike portion is indicated by reference numeral s. The degree of this spike is not uniform and therefore is not uniform, so that the resistance value varies and the reliability is lowered. In addition, the selective deposition does not adhere well to SiO ₂ 4 on the side wall of the contact hole, resulting in poor reliability. (A case where Al is deposited is shown by a broken line.) FIG. 9 shows still another conventional example. This has a barrier metal 6 attached to the contact hole 1 and Al2 on top of this.
Is attached. As the barrier metal 6, other than Al, for example, Ti, W or alloys thereof, nitride (titanium nitride TiN), etc. are used, and such a metal having a higher melting point than Al is deposited or CVD in the contact hole 1. Deposited by. However, with this structure, Al2 and barrier metal 6
The resistance value becomes high due to the resistance R _BA between the base metal 3 and the resistance R _SB between the base 3 (n ⁺ , p ⁺ , Al, etc.) and the barrier metal 6. (In the figure, each resistance R _BA , R _SB
Indicates. As shown in the figure, the resistance R
_BA , R _SB have the greatest impact). Although this structure has a high-speed circuit, it has a problem that vapor deposition or the like is required twice, the reliability is low, and the yield is very low.

[Object of the Invention]

An object of the present invention is to provide a semiconductor device and a method of manufacturing the same in which the contact hole can be effectively reduced in resistance and a problem such as a lateral spike does not occur.

[Structure and Action of Invention]

The semiconductor device of the present invention is formed on a silicon substrate.
Tungsten silicide is formed by deposition in a contact hole of 1.0 to 0.25 μm rule, and the tungsten silicide is anisotropically etched to form a sidewall shape on the inner wall of the contact hole. A tungsten layer is formed by selective deposition in contact with the bottom portion, and the tungsten silicide has conductivity imparted by diffusion (spike) along the damage caused by the anisotropic etching of the tungsten. In addition, a tungsten diffusion region is formed on the silicon substrate by diffusion (spike) along the damage to the substrate caused by the anisotropic etching of tungsten, and a wiring is formed in contact with the entire surface of the tungsten layer. A layer is formed and the wiring is Jo the interlayer film is formed, a semiconductor device characterized by being further contact hole is formed in the interlayer film.

Such a semiconductor device has a silicon substrate of 1.0 to 0.25.
A step of forming a conductor hole of μm rule and forming a tungsten silicide layer on at least the inner wall of the contact hole by deposition, and anisotropically etching the tungsten silicide to form a sidewall shape on the inner wall of the contact hole. And the contact between the tungsten silicide layer inside the contact hole and the bottom of the contact hole to impart conductivity to the tungsten silicide layer by diffusion (spike) along the damage caused by the anisotropic etching. A step of forming a tungsten layer by selective deposition, a wiring layer in contact with the entire upper surface of the tungsten layer is formed on the tungsten layer, an interlayer film is further formed on the wiring layer, and a contact hole is further formed in the interlayer film. And a step of forming a semiconductor device. , It can be produced.

In the present invention, the contact hole has a rule of 1.0 to 0.25 μm (that is, the width 1 of the contact hole is 1.0 to 0.25 μm), which has the following meaning. That is, if the contact hole width is 1.0 μm or more, Al can be embedded, so that it is not necessary to form a tungsten layer by selective deposition. When the contact hole width is 0.25 μm or less, it becomes difficult for the tungsten layer to contact the substrate at the bottom of the contact hole, and the spike region cannot be formed on the substrate.

Further, in the present invention, the wiring layer is formed in contact with the entire surface of the tungsten layer formed in the contact hole by the selective deposition, but in the present invention, as described above, the contact hole is 1.0 to 0.25. Since the μm rule is extremely fine, the wiring layer is formed in contact with the entire surface of the tungsten layer formed in the contact hole, so that a reliable contact is obtained for the first time.

Further, in the present invention, an interlayer film is formed on the wiring layer and a contact hole is further formed in the interlayer film. It is designed to take.

In the present invention, a spike region is formed on the substrate due to a spike (abnormal diffusion) from the tungsten layer, and this spike region can reduce the effective contact resistance.

Further, in the present invention, the tungsten silicide is
Electrical conductivity is imparted by spikes (abnormal diffusion) from the tungsten layer.

Since the work functions of tungsten and tungsten silicide are close to each other, in the present invention, the tungsten silicide formed on the inner wall of the contact hole and the tungsten ohmic contact formed in contact with the tungsten silicide are easily formed.

Further, in the present invention, since the tungsten silicide is formed by deposition, the step coverage is good and the film thickness can be controlled well.

When tungsten is grown by selective deposition, a tungsten spike is inevitable. However, in the present invention, even if a lateral spike (abnormal diffusion) occurs in the substrate, the tungsten silicide is formed on the side wall of the contact hole. Since the layer is formed, the spikes are generated under the tungsten silicide layer, and the adverse effect is suppressed.

Example of Invention

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

1 to 6 are sectional views sequentially showing the manufacturing of the semiconductor device according to the present embodiment.

First, as shown in FIG. 1, a contact hole 1 is formed in the interlayer film 4 on the underlayer 3. The base 3 is, for example, Si. Since the number of layers is increasing, other Si-based materials may be used, or Si-Al or the like may be used. The interlayer film 2 is SiO ₂ or the like. The materials of the base 3 and the interlayer film 4 are not particularly limited.
The contact hole 1 was formed according to the rule of 1.0 to 0.25 μm.

Next, as shown in FIG. 2, a tungsten silicide layer 21 which is a material layer capable of imparting conductivity is formed on the inner wall of the contact hole 1. The layer 21 may be formed at least on the inner wall of the contact hole 1, and may be formed over the outside of the contact hole 1 as shown in FIG.

 The layer 21 may be multi-layered with an appropriate layer interposed.

Next, in this embodiment, as shown in FIG. 3, a step of leaving this layer 21 inside the contact hole 1 is performed. This step can be achieved by using dry etching such as RIE to leave the layer 21 only on the inner wall portion of the contact hole 1. Since dry etching is anisotropic etching, it can be preferably used in this step. At the time of etching, it is more advantageous for the selective etching that the substance forming the layer 21 and the substance forming the underlayer 3 are different, and the larger the selection ratio, the better the control can be left inside. Layer 21
Since consisting of tungsten silicide, a base 3 SiO ₂
In that case, since the selection ratio between Si and silicide is large, it is preferable. The upper edge of the remaining layer 21, the reference numeral in FIG.
It is preferable to taper the portion indicated by 21a as shown in the drawing when a wiring layer (Al layer) described later with reference to FIG. 5 is placed.

In the step of leaving the layer 21, it is sufficient to leave the layer 21 at least only inside the contact hole 1. If there is no problem, it may be extended to the outside of the contact hole 1. In the previous step (step of forming the layer 21),
Unlike the case of FIG. 2, when the layer 21 is already formed only inside the contact hole 1 as shown in FIG. 3, the previous step and the step of leaving this layer 21 can be combined, and the present invention is as follows. It also includes cases.

Next, as shown in FIG. 4, the tungsten silicide layer 21 on the inner side of the contact hole 1 (in this example, the layer 21 existing as the layer left on the inner side of the contact hole 1 in the previous step). And a W (tungsten) layer 22, which is a heavy metal layer, is formed on the contact hole bottom portion 11. W layer
22 can be formed by selective deposition containing a silane gas as a source gas. LP as a means of selective deposition
-Can use CVD. As described in the description of the prior art, the selective deposition of W has a problem of lateral spikes, but in this structure, W spikes toward the silicide layer 21. Being a silicide, this spike imparts conductivity. For example, a good device can be obtained by penetrating the spike up to the broken line 22a in FIG. Base 3
The portion through which the spike s passes is the extent shown by the reference numeral 22b by applying fine dots in FIG. 4, and the spike s does not spread in the lateral direction. Even if it spreads, it only fits under the sidewall-shaped tungsten silicide layer 21. As described above, the problem of the spike can be solved in this configuration, and rather, the spike is used to reduce the resistance of the tungsten silicide layer 21.

Next, as shown in FIG. 5, a wiring layer 23 is formed on the W layer 22 which is a heavy metal layer. In this case, the W layer 22 as shown in FIG.
The wiring layer 23 is formed in contact with the entire surface of the. Thus, the W layer
By forming the wiring layer 23 in contact with the entire surface of 22
It becomes possible to make good contact even with an extremely fine contact hole of ˜0.25 μm rule.
The wiring layer 23 can be formed of, for example, Al.

After that, the interlayer film made of SiO ₂ or the like is continuously formed on the wiring layer 23.
4a is formed, the contact hole 1a is opened, and after that, the device is similarly formed (see FIG. 6).

According to the configuration of this example as shown in FIG. 5, the resistance is not increased by the thin wiring layer 23 and the resistance is not increased by the poor degree of mutual adhesion of the forming layers, and the mutual relationship is stable. Therefore, the resistance value is stable, and a highly reliable product can be obtained with high yield. Moreover, the problem of spikes due to the selective deposition of W can be solved. The second
In FIG. 3, the tungsten silicide layer 21 capable of imparting conductivity is replaced with the tungsten silicide layer 21 in FIG.
The spikes in the figure result in a conductive material, i.e., a conductive (given) tungsten silicide 21.

Since the operating speed of the device is almost determined by the contact resistance of the groove, if the resistance value is lowered as in this example, the device can be speeded up. Conventionally, the delay time is several 100 ns
The high-speed device of several tens of nanoseconds can be obtained with the structure of this example, which was at the ec position. Although the conventional example shown in FIG. 9 is also a high-speed device, its reliability is low and its yield is low as described above.

As described above, according to this embodiment, the contact holes 1 are
Even if it is as small as 0.25 μm rule, the effective contact resistance can be reduced, the device can be speeded up, and the problem of lateral spikes when W selective deposition is adopted can be solved. Is effectively used.

In this embodiment, as the tungsten silicide of the layer 21,
By using LP-CVD WSix, a material with high step coverage, and by using LP-CVD W selective deposition using RIE technology with a high selection ratio, the practical effect can be further enhanced. it can.

〔The invention's effect〕

As described above, the semiconductor device and the method for manufacturing the same according to the present invention can effectively reduce the resistance of the contact hole and can solve the problem of lateral spikes.

[Brief description of drawings]

1 to 6 are sectional views showing an embodiment of the present invention in the order of manufacturing steps thereof. 7 to 9 each show a conventional technique. 1 ... Contact hole, 21 ... Tungsten silicide layer (conductive material) capable of imparting conductivity, 22 ... Tungsten layer, 23 ... Wiring layer.

Claims (2)

(57) [Claims] 1. A 1.0 to 0.25 μm layer formed on a silicon substrate.
Tungsten silicide is formed in the m-rule contact hole by deposition, and the tungsten silicide is anisotropically etched to form a sidewall shape on the inner wall of the contact hole. A tungsten layer is formed in contact with the tungsten layer by selective deposition, the tungsten silicide is one in which conductivity is imparted to the tungsten by diffusion along the damage caused by the anisotropic etching, and the silicon substrate has A tungsten diffusion region is formed by diffusion along the damage to the substrate caused by the anisotropic etching of tungsten, and a wiring layer is formed in contact with the entire surface of the tungsten layer, and on the wiring layer. An interlayer film is formed on the Wherein a being further contact hole is formed. 2. A step of forming a contact hole having a rule of 1.0 to 0.25 μm on a silicon substrate, forming a tungsten silicide layer on at least the inner wall of the contact hole by deposition, and anisotropically etching the tungsten silicide. A step of forming a sidewall shape on the inner wall of the contact hole, and a step of contacting the tungsten silicide layer inside the contact hole and the bottom portion of the contact hole along the damage caused by the anisotropic etching to the tungsten silicide layer A step of forming a tungsten layer that imparts conductivity by diffusion, by selective deposition, forming a wiring layer in contact with the entire upper surface of the tungsten layer on the tungsten layer, and further forming an interlayer film on the wiring layer And a step of further forming a contact hole in the interlayer film. Method of manufacturing a body apparatus.