JP2567766B2 - Playback control circuit of disk playback device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention writes a digital signal read from a disc on which information data is recorded by a digital signal into a memory circuit and reads the signal written in the memory circuit to perform a reproducing operation. The present invention relates to a disc reproducing apparatus configured as described above.

[0002]

2. Description of the Related Art Disc reproducing apparatuses are widely used which perform a reproducing operation by reading a signal from a disc on which information data such as music is recorded by a digital signal with a pickup. Such a disc reproducing apparatus is generally configured to reproduce the information data at a constant speed by once writing a digital signal read from the disc into a memory circuit and then reading it with a read clock signal. A CD player is known as a typical example of such a disc reproducing apparatus.

By the way, as is well known, in the CD type disc, in addition to the main data signal such as music information, sub-data called sub-coding signal in which one block is completed in a cycle of 1/75 second accompanying reproduction. The signal is recorded.
Such a sub-coding signal is a P. It is composed of eight channels Q to W, of which the P channel contains position index information indicating the position of the beginning of the song, and the Q channel has the absolute elapsed time from the start point of the signal track, The position index information indicating the elapsed time and the song number is included. Therefore, the CD player can perform a search operation by using the position index information, and can perform a reproduction operation of a designated music piece, a repeat reproduction operation of a designated section, and the like.

In addition, a CIRC disc has a CIRC.
Since a digital signal to which an error correction code referred to as is added is recorded and an error detection code referred to as CRC is added to the Q channel of the sub-coding signal, such a signal is used in a CD player. The error correction operation and the error detection operation of the reproduced information data can be performed.

[0005]

Among the above-mentioned CD players, there is a portable type player configured to listen to a reproduced sound by using headphones or the like. Since such a portable CD player is used while being carried, it is often subject to external impact. When such an impact is received, it becomes impossible to perform tracking control for correctly tracking the light beam of the pickup on the signal track in order to read the signal recorded on the disc, and focusing control for correctly focusing on the signal surface. However, there is a problem that the reproduced sound is interrupted. The present invention is intended to provide a reproduction control circuit that improves such points.

[0006]

According to the present invention, there is provided a reproduction control circuit, wherein a digital signal from the disc is read at a speed higher than the reading speed of the digital signal stored in the memory circuit in which the digital signal read from the disc is written. Reading means, a memory control circuit for controlling a signal writing operation to the memory circuit and a reading operation from the memory circuit, and a digital signal read by the reading means is subjected to signal processing to demodulate information data. A digital signal processing circuit for performing error detection and error correction of the information data, and outputting an uncorrectable signal when the error correction cannot be performed, a vibration detection circuit for detecting vibration applied to the apparatus body, and the memory The capacitance of the digital signal in the memory circuit detected by the control circuit and the vibration Are more configuration and system control circuit for controlling the operation of said reading means based on the vibration detection signal output from the circuit output.

[0007]

According to the present invention, when the memory control circuit detects that the capacity of the digital signal in the memory circuit has reached a predetermined amount and when the digital signal processing circuit outputs the uncorrectable signal, the reading means reads the data on the disk. After returning the reading position to the rear and temporarily stopping the writing operation of the digital signal to the memory circuit, after the vibration detection signal from the vibration detection circuit is read out from all the signals stored in the memory circuit. Is also output, the signal stored in the memory circuit is repeatedly read and reproduced.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a CD incorporating the reproduction control circuit of the present invention.
It is a block circuit diagram which shows one Example of a player. In the present embodiment, the disc is configured to rotate at a higher speed (for example, twice) than the rated linear velocity of the CD type disc, so that signals can be read from the disc at a higher speed than a normal CD player. Has been done.

In FIG. 1, reference numeral 1 is a pickup having a photodetector for projecting a light beam onto a CD type disc (not shown) and receiving the light beam reflected by the signal surface of the disc, and 2 is the pickup 1 An RF amplifier circuit 3 for amplifying an RF signal obtained from the photodetector and shaping the waveform, focuses the light beam of the pickup 1 on the signal surface of the disk based on the signal obtained through the RF amplifier circuit 2. A servo signal processing circuit for performing focusing control and tracking control operation for causing the light beam to follow a signal track on the signal surface, and controlling for sending the light beam of the pickup 1 in the radial direction of the disk.

An error detection / correction unit 4 performs a signal processing operation of an output signal (serial digital signal) output from the RF amplifier circuit 2 to detect an error of the information data (audio data) and the information data. It is a digital signal processing circuit for demodulating various data other than the data for use, and is provided with an error detection / correction means 5 for performing error detection and error correction of the demodulated information data, and a signal when the error correction cannot be performed. Level is from L (low) to H (high)
And an uncorrectable signal output terminal 5a for outputting an uncorrectable signal indicating that error correction could not be performed. Further, the digital signal processing circuit 4 is provided with an interpolating means 6 for delaying the information data and interpolating the information data which is missing due to the error correction by the error detecting and correcting means 5 by the information data before and after the information data. Therefore, when the erroneous information data continues such that interpolation cannot be performed, the interpolation means enters the hold state in which it outputs the last valid information data until new correct information data is obtained. Is configured.

Reference numeral 7 is a first memory circuit for temporarily storing the digital signals for rearranging the digital signals when the digital signal processing circuit 4 demodulates various data. The digital signal write operation and the digital signal read operation are controlled. The write operation speed and the read operation speed are the same as those of a general CD, depending on the rotation speed of the disk, that is, the speed at which signals are read from the disk.
It is faster than the player.

Reference numeral 8 denotes a system control circuit for controlling the operation of the CD player, which is provided with programs such as a disc reproducing method, various searching methods, and a focusing introducing method for the pickup 1, and is constituted by a microcomputer. There is. The system control circuit 8
Is provided with Q code detecting means 9 for detecting Q channel data (Q code) from the sub-coding signal output from the digital signal processing circuit 4, and the reading position by the pickup 1 is set to the servo signal processing circuit 3. A track jump control means 10 for supplying a track jump signal for displacing the disk in the radial direction is provided.

Reference numeral 11 is a serial / parallel conversion circuit for converting the information data of the serial digital signal demodulated by the digital signal processing circuit 4 into a parallel digital signal, and 12 is a digital signal output from the serial / parallel conversion circuit 11. A second memory circuit in which is written,
Reference numeral 13 is a memory control circuit for controlling a signal writing operation to the second memory circuit 12 and a signal reading operation stored in the second memory circuit 12. The writing speed of the signal to the second memory circuit 12 by the memory control circuit 13 is determined by the digital signal processing circuit 4
The digital signal is output from the second memory circuit 12, and the speed of reading the signal from the second memory circuit 12 is adjusted to the speed at which the information data of the disk is reproduced at a constant speed. That is, the signal writing speed to the second memory circuit 12 is set to be higher than the reading speed.

Reference numeral 14 monitors the write address and the read address of the second memory circuit 12 by the control operation of the memory control circuit 13, thereby monitoring the overflow of the second memory circuit 12 and outputting from the error detection / correction means 5. The timing for stopping and resuming the write operation of the information data to the second memory circuit 12 is detected according to the uncorrectable signal and the control state by the system control circuit 8, and the memory control is performed according to the detection output. A write stop / restart detection circuit that controls the operation of the circuit 13. Specifically, when an overflow of the second memory circuit 12 is detected, when an uncorrectable signal is output from the error detection / correction means 5, and when a CD player is used. Before playback starts or during a track jump,
It is set to stop the write operation to the second memory circuit 12. Further, the write suspension reproduction detection circuit 14 is configured to output an overflow signal indicating the overflow to the system control circuit 8 when the overflow of the second memory circuit 12 is detected. When such an overflow signal is input to the system control circuit 8, the track jump control means 10 is configured to output a track jump signal for moving the reading position (trace position) of the disc by the pickup 1 backward by one track. There is. Further, when the write operation of the information data to the second memory circuit 12 is restarted by the control operation of the write stop / restart detecting circuit 14, the final information written before the write operation of the information data is stopped. The control operation of the memory control circuit 13 is performed so that the write operation is performed subsequent to the data.

Reference numeral 15 denotes a shift register (not shown) in which the information data output from the serial / parallel conversion circuit 11 is written in synchronization with the timing of writing a signal to the second memory circuit 12, and the second memory circuit. 12 is a data coincidence determination circuit including a latch circuit (not shown) that latches the information data written in the shift register when an overflow is detected, and is written in the shift register. It has a function of determining whether or not the information data and the information data latched in the latch circuit match, and setting a timing for restarting the operation of writing the information data to the second memory circuit 12. There is. When the error detection / correction means 5 outputs an uncorrectable signal, the data coincidence determination circuit 15 compares the information data written in the shift register with the information data latched in the latch circuit. Is set not to do. In addition, such information data comparison operation is performed based on the storage capacity of the shift register and the latch circuit. It is configured to only use.

Reference numeral 16 is a parallel-serial conversion circuit for converting information data, which is a parallel digital signal read from the second memory circuit 12, into a serial digital signal, and 17 is a serial output from the parallel-serial conversion circuit 16. Is a D / A converter for inputting the digital signal of and converting the signal into an analog signal.

Reference numeral 18 is provided with an acceleration detecting element (not shown) for detecting an acceleration applied to the CD player main body, and the CD player main body is vibrated by detecting an acceleration more than a predetermined value by the acceleration detecting element. This is a vibration detection circuit for detecting that, and is configured to output an H level detection signal when vibration is detected. Reference numeral 19 denotes a track jump signal for moving the disc reading position backward by one track from the track jump control means 10 based on the detection signal output from the vibration detection circuit 18 and the uncorrectable signal output from the error detection / correction means 5. A prohibition signal generation circuit that outputs a prohibition signal that prohibits output.

The prohibition signal generating circuit 19 is, for example, as shown in FIG.
As shown in FIG. 4, a 4-bit shift register 20 in which the output signal output from the uncorrectable signal output terminal 5a of the digital signal processing circuit 4 is sequentially written according to the demodulation timing of information data, and each of the shift registers 20 A first AND circuit 21 that receives signals of all bits and a first AN circuit
A second AN that receives the output signal of the D circuit 21 and the detection signal from the vibration detection circuit 18 via the inverter 22.
And a D circuit 23. Therefore, the prohibition signal generation circuit 19 outputs the uncorrectable signal output terminal 5a.
Therefore, the H level signal is output four times in succession, and the H level signal is output when the vibration detection circuit 18 outputs the L level signal. That is, the state where the H level signal for inhibiting the track jump is output from the inhibition signal generation circuit 19 is the vibration detection circuit 1
This is a case where the error detection and correction means 5 cannot correct the error in the information data four times in a row in the state where the vibration is not detected by the step 8.

The reproduction control circuit of the present invention is constructed as described above. Next, the operation will be described. When the track of the disc is traced by the light beam projected from the pickup 1, the signal recorded on the disc is read by the pickup 1 and is supplied to the RF amplification circuit 2 as an RF signal (high frequency signal).
The RF signal is amplified by the RF amplification circuit 2 and waveform-shaped and applied to the digital signal processing circuit 4 as a digital signal. The digital signal processing circuit 4
Demodulates the digital signal output from the RF amplifier circuit 2 and extracts various data signals included in the digital signal. The information data is extracted by the signal processing operation of the digital signal processing circuit 4, and the error correction processing operation is performed on the information data based on the error correction data included in the digital signal. The error correction processing operation is performed by a data rearrangement operation using the first memory circuit 7. However, since the disc is rotated at a speed higher than the rated linear velocity of a normal CD player, Since the amount of digital signals input to the signal processing circuit 4 per unit time is large, the writing speed and the reading speed to the first memory circuit 7 are made high in accordance with the input speed of the digital signals.

When the information data (audio data) is extracted by signal processing by the digital signal processing circuit 4, the information data is subjected to error detection and error correction processing by the error detection / correction means 5 and is interpolated by the interpolation means 6. Interpolation of the missing information data is performed. The information data output from the digital signal processing circuit 4 is
After being converted from a serial digital signal to a parallel digital signal by the serial / parallel conversion circuit 11, the write address is controlled by the memory control circuit 13 to be written in the second memory circuit 12. The information data written in the second memory circuit 12 is read according to the read address control operation by the memory control circuit 13, and then serialized from the parallel digital signal by the parallel / serial conversion circuit 16. Is converted to a digital signal. Then, the information data output from the parallel / serial conversion circuit 16 is converted into an analog signal by the D / A converter 17 and then separated into stereo left and right channel signals, respectively, and audio signals at the subsequent stages (not shown). Supplied). Therefore, it is possible to reproduce and listen to signals such as music recorded on the disc.

The operation of writing the information data into the second memory circuit 12 is performed at high speed in accordance with the operation of outputting the information data from the digital signal processing circuit 4. Since the information data is read at a sampling frequency for recording the information data on the disc, the information data read operation is performed at a lower speed than the writing speed. Therefore, as the reproduction operation described above progresses, the information data stored in the second memory circuit 12 gradually increases and eventually overflows, but it does not overflow because the operation described later is performed.

The overflow of the second memory circuit 12 is detected by the write suspension restart detection circuit 14 by monitoring the write address and the read address of the memory control circuit 13, and the overflow is detected by the write suspension restart detection circuit 14. The overflow detection signal shown is output to the system control circuit 8. The state in which the overflow detection signal is output from the write suspension / restart detection circuit 14 is a state in which information data is written in the second memory circuit 12, and the error detection / correction means 5 cannot correct the error in the information data. is not. That is, since the uncorrectable signal is not output from the uncorrectable signal output terminal 5a, the prohibited signal is not output from the prohibited signal generation circuit 19. As a result, when an overflow detection signal is output from the write suspension / restart detection circuit 14, the track jump control means 10 outputs a track jump signal for moving the reading position of the disc by the pickup 1 backward by one track. When a track jump signal is output from the track jump control means 10, the trace position of the disc by the pickup 1 is moved backward by one track, and the same portion on the disc is traced repeatedly. While such an operation is being performed, the information data written so far is sequentially read from the second memory circuit 12, so that the information data is continuously reproduced without interruption.

When the overflow of the second memory circuit 12 is detected, the write stop / restart detection circuit 14 outputs a stop signal for stopping the write operation to the second memory circuit 12 from that point. As a result, the operation of writing the information data to the second memory circuit 12 is stopped, and only the operation of reading the information data stored in the second memory circuit 12 is performed, so that the information data stored in the second memory circuit 12 is stored. The amount of information data stored is decreasing.

On the other hand, the Q code at the time when the second memory circuit 12 overflows is stored in a memory circuit (not shown) in the system control circuit 8, and the trace position of the disc by the pickup 1 is set back by one track. Then, the Q code stored in the memory circuit is searched. Then, when it is detected from the position index information of the Q code being searched that the trace position by the pickup 1 has approached the block portion of the digital signal including the Q code at the time of overflow, the data coincidence determination circuit 15 serially detects The information data output from the parallel conversion circuit 11 is taken in. The data coincidence determination circuit 15 includes a second memory circuit 12
Since the information data at the time of overflow is written, when the information data output from the serial-parallel conversion circuit 11 is taken in, the information data is compared with the information data at the time of overflow. And
When the coincidence of the two pieces of information data is detected, a coincidence signal indicating the coincidence is applied to the write suspension restart detection circuit 14, and as a result, the operation of writing the information data to the second memory circuit 12 is restarted.

When the uncorrectable signal is output from the uncorrectable signal output terminal 5a of the digital signal processing circuit 4,
The data coincidence determination circuit 15 is prevented from taking in the information data so that the comparison with erroneous information data is not performed.

The writing operation of the information data to the second memory circuit 12 is restarted as described above, but the writing operation is the final operation at the time when the writing operation is stopped due to the overflow in the second memory circuit 12. It is performed from the address next to the address where the information data is written. Therefore, the information data for which the writing operation to the second memory circuit 12 has been restarted becomes the information data that is continuous with the final information data on the disc, so that the correct reproducing operation is continuously performed.

On the other hand, when the coincidence signal is not obtained from the data coincidence determination circuit 15 for some reason, the write suspension / restart detection circuit 14 is stored in the second memory circuit 12 by the control operation of the memory control circuit 13. By detecting that all of the information data has been read, the writing operation of the information data to the second memory circuit 12 is restarted. In this case, the information data read from the second memory circuit 12 is not correctly connected, but the information data is written continuously to the final information data in the second memory circuit 12 so that the reproduction signal is not interrupted. The newly written information data is read out in succession to the above information data.

If the signal reading operation from the disc by the pickup 1 cannot be performed correctly due to an external impact on the device body or the disc is scratched or soiled, an error in the information data by the error detection / correction means will occur. Since the correction operation is not performed, the uncorrectable signal output terminal 5a
An uncorrectable signal is output to. As a result, the write suspension / restart detection circuit 14 controls the memory control circuit 13 to suspend the write operation of the information data to the second memory circuit 12.

When the uncorrectable signal is output to the uncorrectable signal output terminal 5a, as described above, the second memory circuit 1
The writing operation of the information data to 2 is stopped and the signal is applied to the prohibition signal generating circuit 19. In the prohibition signal generation circuit 19, the uncorrectable signal is continuously output from the uncorrectable signal output terminal 5a four times because the error correction operation by the error detection / correction unit 5 cannot be performed four times in succession. When the vibration is output and the vibration is not detected by the vibration detection circuit 18, the prohibition signal is output. Therefore, if the error correction operation of the information data by the error detection / correction means 5 cannot be performed within three consecutive times, the track jump control means 10 outputs a track jump signal for returning the trace position of the disk. It As a result, the trace position of the disc by the pickup 1 is moved backward so as to retrieve the Q code of the digital signal block read immediately before the reading of the digital signal block including the information data that cannot be error-corrected. Therefore, in this case, as described above, the information data read next from the disk is the second memory circuit 12
Since the last information data is written after that, correct information data can be continuously reproduced without interruption.

Even if the error correction operation of the information data by the error detecting / correcting means 5 cannot be performed continuously, if the number of times is 3 or less, the operation is performed as described above. The operation will be described.

The reason why the error correction operation of the information data by the detection / correction means 5 cannot be performed four times in succession is that the disk is scratched or soiled and that the apparatus main body has a long impact time. There is.

First, a case will be described in which the state in which the error correction operation of information data cannot be performed due to scratches or stains on the disk continues four times in succession. In such a case, since the detection signal is not output from the vibration detection circuit 18, when the uncorrectable signal is output from the uncorrectable signal output terminal 5a four times in a row, the prohibited signal generation circuit 19 outputs the prohibited signal. As a result, the track jump control means 10 does not output the track jump signal output for retracting the tracing position of the disc by the pickup 1, and the pickup 1 is in a state of tracing the next portion. Then, when such an operation is performed, a start signal is output from the write suspension restart detection circuit 14, and the operation of writing information data to the second memory circuit 12 is restarted.

In this way, the writing operation of the information data to the second memory circuit 12 is restarted, but the information data output from the serial / parallel conversion circuit 11 is the second data.
Since the last information data in the memory circuit 12 is sequentially written from the address next to the written address,
The information data read from the memory circuit 12 is reproduced without interruption. However, in such a case, since there is a portion where the reproduction operation of the information data is not performed due to scratches or stains on the disc, the signal such as music cannot be reproduced correctly and continuously.

The operation in the case where the error correction operation of the information data cannot be continuously performed four times continuously due to the scratch or dirt on the disk is performed as described above. Will be described. In such a case, the vibration detection operation is performed by the vibration detection circuit 18, and the detection signal is output to the output terminal thereof.
As a result, even if the uncorrectable signal is output from the uncorrectable signal output terminal 5a four times in a row, the inhibit signal is not output from the inhibit signal generation circuit 19 and the track jump control unit 10 outputs the track jump. The trace position of the disc by the pickup 1 is retracted based on the signal.

When the error correction operation of the information data cannot be performed due to the error of the read data due to the vibration applied to the main body of the apparatus, the correct information data can be read without fail by returning to the state where the vibration is not applied. become.
Therefore, by tracing the same portion of the disc again by the pickup 1, incorrect information data can be read again and correct information data can be obtained. Therefore, since the same information data as the information data immediately before the error is input to the data coincidence determination circuit 15, the coincidence signal is output from the data coincidence determination circuit 15. as a result,
From the write stop / restart detection circuit 14 to the second memory circuit 12
A start signal for restarting the write operation to the memory is output, and correct information data that is sequentially read again is written to the address next to the address where the information data immediately before the incorrect information data was written. Become.

When the vibration applied to the main body of the apparatus disappears in this way, the correct information data which is continuously read again is written in the second memory circuit 12 just before the error.
The time from the time when the correct information data cannot be written to the time when the read operation of the correct information data is started (unreadable time) is a predetermined time, that is, the information stored in the second memory circuit 12. The case where the time is shorter and longer than the time required to read all the data will be described.

If the unreadable time is shorter than the predetermined time, the correct read operation of the correct information data is performed until all the information data stored in the second memory circuit 12 is read out. , The signals read from the second memory circuit 12 are correctly continuous. That is, in such a case, the signals such as music recorded on the disc are correctly and continuously reproduced.

Next, a case where the unreadable time is longer than the predetermined time will be described. In such a case, the read operation of the information data stored in the second memory circuit 12 is completed by the time the write operation of the re-read correct information data to the second memory circuit 12 is started. However, in the present invention, the information data stored in the second memory circuit 12 is repeatedly read. If the correct information data is read again while the information data stored in the second memory circuit 12 is being repeatedly read, the information data immediately before the incorrect information data is changed as described above. It will be written continuously to the address next to the written address. Therefore, since the correct information data is read after the signal that is read repeatedly, the reproduction signal is not interrupted, and the reread information data is continuously reproduced with the previous information data. Therefore, the listener does not feel unnatural.

When the error detection / correction means 5 cannot perform the error correction operation on the information data, the digital signal processing circuit 4 outputs the information data interpolated by the interpolation means 6. The interpolation operation by 5 can be performed until the error detection and correction means 5 continuously corrects the error of the information data for 4 samples or more. A 4-bit shift register 20 is used as the shift register 20 that constitutes the prohibition signal generation circuit 19 in accordance with the interpolation capability of the interpolation means 6.

[0040]

According to the reproduction control circuit of the present invention, even after all the information data stored in the memory circuit for storing the information data is read out, vibration is applied to the main body of the apparatus and a digital signal is output from the disc. When the state where the sound cannot be read accurately continues, the signal stored in the memory circuit is repeatedly read and reproduced, so that the reproduced sound is not interrupted and the listener does not feel unnatural. Have advantages.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of a reproduction control circuit of the present invention.

FIG. 2 is a circuit diagram showing a prohibition signal generation circuit that constitutes an embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 pickup 4 digital signal processing circuit 5 error detection / correction means 6 interpolation means 7 first memory circuit 8 system control circuit 9 Q code detection means 10 track jump control means 12 second memory circuit 13 memory control circuit 14 write abort restart detection circuit 15 Data coincidence determination circuit 18 Vibration detection circuit 19 Inhibition signal generation circuit

Claims (1)

(57) [Claims] 1. A digital signal read from a disc on which information data is recorded by a digital signal is written into a memory circuit, and a signal written in the memory circuit is read out to perform a reproducing operation, and the digital signal is converted into the digital signal. In a disc reproducing device configured to be able to detect an error in information data using the included error detection data, the disc reproducing device is faster than a reading speed of a digital signal stored in the memory circuit. Reading means for reading a digital signal, a memory control circuit for controlling a signal writing operation to the memory circuit and a reading operation from the memory circuit, and information processing by signal-processing the digital signal read by the reading means. Performs demodulation and error detection and error correction of the information data And a digital signal processing circuit that outputs an uncorrectable signal when error correction cannot be performed, a vibration detection circuit that detects vibration applied to the device body, and a digital signal in the memory circuit that is detected by the memory control circuit. It comprises a system control circuit for controlling the operation of the reading means on the basis of the capacity of the signal and the vibration detection signal output from the vibration detection circuit, and the capacity of the digital signal in the memory circuit is a predetermined amount by the memory control circuit. When it is detected and when an uncorrectable signal is output from the digital signal processing circuit, the reading position on the disk by the reading means is returned backward and the writing operation of the digital signal to the memory circuit is temporarily performed. The vibration detection signal from the vibration detection circuit is recorded in the memory circuit. Reproduction control circuit of the disk reproducing apparatus is characterized in that the repeatedly reproducing a signal stored in said memory circuit when in the state is also outputted after being read out signals all being.