JP2569724B2 - Inverter pulse width modulation controller - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a pulse width modulation control device for an inverter,
In particular, the present invention relates to an improvement of a device for performing precise waveform control by increasing a carrier frequency.

(Prior art) In recent years, devices such as MOSFETs (metal oxide film field effect transistors) have emerged as high-speed switching devices, and if they are used for pulse width modulation control of inverters, precise waveform control becomes possible. Thus, it has become possible to obtain effects such as a reduction in electromagnetic noise and an increase in motor efficiency.

Therefore, conventionally, by providing an analog control circuit, or using dedicated hardware for digital circuits or a high-speed arithmetic unit such as DSP, pulse width modulation control with a high carrier frequency (for example, 20 KHz) has been made possible. What secures the effect of reducing the amount is known. (For example, Showa 62
(Refer to the presenter, Chihiro Okado, etc., in the application of high frequency switching to general-purpose inverters) in the proceedings of the IEEJ National Conference on Industrial Applications, 2007.)

(Problems to be Solved by the Invention) However, the above-mentioned conventional one has disadvantages such as complicated circuits, complicated adjustments, and high cost.

Therefore, it is conceivable to use a one-chip microcomputer (hereinafter simply referred to as a microcomputer) that is inexpensive and has a simple circuit configuration. The calculation time is long, for example, a time of about 200 μS is required, and the carrier frequency is limited to about 5 KHz at the maximum. For this reason, it is generally difficult to perform pulse width modulation control using a high frequency (20 KHz or more) carrier frequency.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to realize a low-cost and simple circuit configuration while adopting a one-chip microcomputer by making the situation seemingly equivalent to an increase in carrier frequency. Accordingly, it is an object of the present invention to enable pulse width modulation at an equivalently high carrier frequency and obtain effects such as reduction of electromagnetic noise and increase in motor efficiency by precise waveform control.

(Means for Solving the Problems) In order to achieve the above object, according to the present invention, an algorithm for generating a PWM control pattern (that is, an ON time of a plurality of switching elements provided in an inverter) is changed to calculate a PWM control pattern. Even if the time (calculation period) is long, the calculated ON time of each switching element is divided into a plurality of pulses to equivalently increase the carrier frequency.

In this case, when the ON time of each switching element is equally divided into pulses having the same width, as shown in FIG. Good reproducibility of the waves will be slightly reduced.

Therefore, in the present invention, the division of the ON time of each switching element is not performed with an equal-width pulse, but is performed with a plurality of unequal-width pulses. It is to enable pulse width modulation control by a carrier frequency.

The specific solution is that in the invention according to claim (1), a plurality of switching elements (Tra) to (Trc) are connected to the three-phase winding (2) as shown in FIGS. '), And ON / O of each switching element (Tra) to (Trc') of the bridge circuit (4).
It is assumed that the pulse width modulation control device of the inverter is configured to apply a three-phase AC voltage to the three-phase winding (2) by performing a pulse width modulation of the direct current by the FF operation. Then, as shown in FIGS. 10 and 11, a calculating means (10) for calculating the ON time of each of the switching elements (Tra) to (Trc ') at a calculating cycle corresponding to the carrier frequency, and the calculating means ( Dividing means (11) for dividing the ON time of each switching element (Tra) to (Trc ') calculated in 10) into a plurality of unequal width pulses
And a control means (12) for turning on and off each of the switching elements (Tra) to (Trc ') by a plurality of pulses divided by the dividing means (11).

In the invention according to claim (2), the dividing means (11)
, The ON time of each of the switching elements (Tra) to (Trc ′) is specified to be divided into unequal-width pulses, and the interpolation is performed by linear interpolation so that the width of the divided pulse changes with an equal change width. Further, in the invention according to claim (3), a correction value table corresponding to the phase of the signal wave is prepared in advance, and the ON time of each of the switching elements (Tra) to (Trc ') is set to a plurality of equal widths. After being divided into pulses, the plurality of equal-width pulses are converted into a plurality of unequal-width pulses based on the correction value table.

(Operation) With the above configuration, in the invention according to claim (1), even when the carrier frequency is a normal value (for example, about 5 KHz),
ON time of each switching element (Tra) to (Trc ') (PWM
The control pattern is repeatedly calculated by the calculation means (10) at each calculation cycle according to the carrier frequency, and the ON time of each of the switching elements (Tra) to (Trc ') is determined by the division means (11). (E.g., four pulses), the carrier frequency is multiplied by the number of divisions, and the pulse width modulation control is performed at an equivalently high carrier frequency (e.g., about 20 KHz). Become. as a result,
When each of the switching elements (Tra) to (Trc ') is controlled to be ON by the control means (12) with each of the divided pulses, a precise and nearly sinusoidal output waveform is obtained, and the electromagnetic noise is effectively reduced. As well as being reduced, the motor efficiency is effectively increased.

Here, the carrier frequency of the pulse width modulation control is a normal value (approximately 5 KHz), and the PWM control pattern can be sufficiently calculated even with a one-chip microcomputer having a long calculation, so that the pulse width modulation control using a high carrier frequency is inexpensive. This can be performed with a simple circuit configuration.

Furthermore, the switching element (Tr
Since the division of the ON time of a) to (Trc ') is performed by a plurality of unequal width pulses, the ON of each switching element (Tra) to (Trc') is performed as shown in FIG. Even when the change in time is large, it can follow the change well, and the reproducibility of the signal wave can be secured well.

In the inventions according to claims (2) and (3), the division into unequal-width pulses is performed based on linear interpolation or a correction value table stored in advance. It can be divided in a shorter time than in the case.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

1 and 2 show a pulse width modulation (hereinafter referred to as PWM) control device for an inverter according to the present invention. In each figure, (1) represents three windings (2a), (2b), and (2c)
An induction motor having a connected three-phase winding (2), (3) is a voltage-type inverter connected to the induction motor (1), and the inverter (3) includes the induction motor (1). And a transistor bridge circuit (4) connected to the three-phase winding (2).
Are transistors (switching elements) (Tra), (Tra '), (Trb), (Trb'), (Tr) such as a plurality (six) of MOSFETs each having a freewheeling diode (Da) to (Dc ').
c), (Trc '). Thus, the inverter (3)
, A DC voltage is applied from a rectifier (6) that rectifies a three-phase AC of a three-phase power supply (5).

(8) is a one-chip microcomputer for forming ON time of the six transistors (Tra) to (Trc ') of the bridge circuit (4), that is, a PWM control pattern. Are the transistors (Tra) to (Tr
c ′) ON / OFF operation is provided with a base driver (8a), and a transistor (Tr
a) DC is pulse width modulated by ON / OFF control of (Trc ').

Next, formation of the PWM control pattern by the microcomputer (8) will be described.

This PWM control pattern is formed by determining a PWM control pattern so that the locus of time integration of the output voltage approximates a circular locus. To elaborate on this,
First, the potential of the output terminal of the inverter (3) is set to va, vb, vc,
The potential at the neutral point of the three-phase winding (2) is vn, and the output voltage vector defined by the following equation And the voltage vector Time integral of think of.

Now, the angular frequency is applied to the three-phase winding (2) of the induction motor (1). (V ₁ is the effective value of the fundamental voltage) And its time integral Draws a circular locus on the complex plane.

On the other hand, in the voltage-type inverter (3), one of the transistors in each phase arm is always in the ON state. Therefore, for convenience, the ON state on the + side is set to “1” and the ON state on one side is set to “0”. In this case, if the phases are expressed as “101”, “011”, etc. in the order of a phase, b phase, and c phase, there are eight states of the inverter (3). Voltage vector of each state Is the size (Vd is the DC voltage of the rectifier (6)), and its direction is
The direction is as shown in FIG. here, Is the zero vector. Time integration of the above voltage vector Therefore, the time integration at the time of driving the inverter (3) Is the voltage vector In the direction of (However, if the vector is zero, it stops).

From the above, the PWM control pattern of the voltage source inverter (3) is based on the time integration of the voltage vector. Voltage vector such that the vector locus on the complex plane moves along the circumference of the specified radius R at the angular velocity ω. Is appropriately selected and determined. (The designated radius R is R = V ₁ , where V _{1 is} the effective value of the line voltage of the fundamental voltage and ω is the angular frequency.
/ ω).

That is, as shown in FIG. 4, for example, the angle φ is 0 ≦ φ ≦
In the range of π / 3, the voltage vector And zero vector And stays at the point Po for a time τo (this state is indicated by a symbol ゜). After time τ ₄ to reach point q ₁ , Is taken for a time τ ₆ to reach the point P ₁ . In this case, in △ Poq ₁ P ₁ , , And the addition because it is _{τo + τ 4 + τ 6 =} To, by solving the above equation, the voltage vector in the period To Τ ₄ , τ ₆ , τo are obtained.

τ ₄ / To = ks · Sin (π / 3−φo) τ ₆ / To = ks · Sinφo τo / To = 1−ks · Sin (φo + π / 3) (3) where ks is a voltage control rate. So, It is.

The above equation (3) is a relational equation in the case where the angle φ is in the range of 0 ≦ φ ≦ π / 3. In other sections, since the inverter (3) performs a symmetric three-phase operation, the following table shows By substituting each symbol as described above, a relational expression in the range of 0 ≦ φ ≦ 2π is obtained.

Next, an ON / OFF pattern (PWM control pattern) of each of the transistors (Tra) to (Trc ') is obtained based on the time τ of the voltage vector in the above equation (3). In this case, the relationship between the time τ of the voltage vector and the PWM control pattern changes according to the order in which the voltage vector is taken.
When the same pattern is repeated in each period To and the constraint that the ON / OFF switching of the transistor is performed only once in each period To is added, the PWM control pattern becomes as shown in FIG.
During typified (figure 4 patterns shown in (d), tau ⁺ is +
Τ ⁻ indicates the ON time of the − side transistor).

In this embodiment, the PWM control pattern shown in FIG. In the voltage source inverter (3), the PWM control pattern is uniquely determined if the name of the transistor which is turned on at the beginning of the period To and the time when the transistor is turned off are known. Referring to Figure (a), PW
The M control pattern is determined by the following equation when the angle φ is in the range of 0 ≦ φ ≦ π / 3.

The relational expression (4) of the PWM control pattern in the range of 0 ≦ φ ≦ π / 3 can be expressed as 0 ≦
The relational expression is in the range of φ ≦ 2π.

Next, the operation of the one-chip microcomputer (8) will be described with reference to FIG. 8 based on the control flow of FIG. 6 and FIG. For convenience of explanation, each transistor (Tra) to (Tr
First, the case where the ON time of c 'is divided into a plurality of equal-width pulses will be described.

The control flow of FIG. 6, each transistor (Tra) to (Tr
c ′) is an operation flow of the ON time (PWM control pattern), and the control flow of FIG.
This is a flow for ON-controlling a) to (Trc '). First, the control flow of FIG. 6 will be described. The control flow includes an operation cycle To (for example, 200 KHz) corresponding to a carrier frequency (for example, 5 KHz).
μS), and after inputting the output voltage phase ωt (= φo) and the output voltage amplitude V ₁ in step S _A1 ,
In step S _A2 , the ON time τ (n) of each of the transistors (Tra) to (Trc ′) is determined based on the above-described relational expression (4) of the PWM control pattern.
+1).

Thereafter, in step S _A3 , the ON time τ (n + 1) of the transistors (Tra) to (Trc ′) calculated above is divided by a preset value N (for example, 4) to obtain each ON time τ. (N + 1) is converted into a plurality of N (4) pulses τ ′ (n +
1) Divide into (τ ′ (n + 1) = τ (n + 1) / 4).
Then, in step _SA4 , the divided pulse τ '(n +
As shown in FIG. 9, 1) is stored in one switching time register for each phase (in a voltage type inverter, one transistor in each arm in each phase is always in the ON state, so only one phase is required). And return.

In the control flow of FIG. 7, the repetition period To 'is earlier than the calculation period To of FIG. 6, and the ON time τ (n
To ′ = To / N is set according to the division number N (4) of (+1) (the division number N is N = 2 ^m (m = 1, 2 …)). After the divided pulse τ ′ (n + 1) is stored in the switching time register of each phase in the control flow of FIG. 6, as shown in FIG. At S _B1 , the contents of the switching time register are input, and at Step S _B2 , the corresponding transistors (Tra) to (Trc ′) are ON-controlled by the divided pulse τ ′ (n + 1) at a cycle To ′, and the process returns. I do.

Next, a case where the ON time of each transistor (Tra) to (Trc ') is divided into a plurality of unequal width pulses is shown in FIGS.
This will be described with reference to FIG.

In other words, the division into the unequal width pulses is performed by turning on the transistor τ (n) in the period To and turning on the transistor in the next period To.
This is performed by linear interpolation (linear interpolation) between time τ (n + 1).

This will be described in detail. Control flow of FIG. 10 is processing period To period, and inputs the phase ωt and amplitude V ₁ of the output voltage in step Sc _1, each transistor in step Sc ₂ of the previous (Tra) ~ (Trc ') ON time τ '(n-1)
The calculation result of (divided pulse divided into four) is input.

Thereafter, each transistor (Tra) ~ the current based at step Sc ₃ to relationship of the PWM control pattern (4) (Tr
c ′) is calculated, and the ON time τ (n) is calculated.
Divided pulse τ ′ divided into N (4)
(N) is calculated, then, the transistors in step _{Sc 4 (Tra) ~ (Trc} ') according to the difference between the previous and current divided pulse tau' of the previous divided pulse τ '(n-1) It is calculated based on the interpolated values .DELTA..tau _n-1 by the following formula.

Δτ _n-1 = {τ ′ (n) −τ ′ (n−1)} / NN; N = 4 in the number of divisions Then, the previous four divided pulses τ ′ (n−1) are calculated by the interpolation value Δτ to progressively interpolate _n-1, successively Δ from the second one to the divided pulse Δτ '(n-1) in step Sc ₅
τ _n−1 , 2 · Δτ _n−1 , and 3 · Δτ _n−1 are added, and step S
The each divided pulse c ₆ are respectively stored for each phase in the switching time register of a plurality N (N = 4), step Sc
_{At step 7} , the divided pulses τ '(n-1) are stored and the routine returns.

The control flow shown in FIG. 11 is based on the calculation of the divided pulse τ ′ as shown in FIG. 12 and the respective transistors (Tra) to (Tr
c ′) is ON controlled, and the control cycle To ′ is
1 / N of calculation period To of control flow in Fig. 10 (N is the number of divisions)
It is.

In the control flow, after reading the divided pulse τ ′ for each phase stored in the first switching time register as shown in FIG. 13 in step S _D1 , the switching time register is shifted in step S _D2. , and 'each transistor (Tra) ~ (Trc by (n-1)' returns to oN control) step S _D3 in the read I I divided pulse tau, hereinafter, sequentially upon each control period to 'in the same manner The divided pulses for each phase stored in the second, third, and fourth switching time registers are read, and the transistors (Tra) to (Tr
Repeating c ') ON control.

Therefore, in the operation flow of the PWM control pattern of Fig. 10, in step Sc _3, based on the PWM control pattern relationship with the computation cycle corresponding to the carrier frequency (5 KHz) (4) each transistor (switching element)
The arithmetic means (10) is configured to calculate the ON time τ of (Tra) to (Trc ').

Further, the ON times τ of the transistors (Tra) to (Trc ′) calculated by the calculation means (10) are calculated by a plurality of N (N) in steps Sc ₂ and Sc _{4 to} Sc ₇ of the calculation flow of FIG. = 4)
Unequal width pulse ｛τ ', (τ' + Δτ), (τ '+ 2
(.Tau..tau.), (.Tau. '+ 3..DELTA..tau.)}. Further, according to the control flow of FIG. 11, a plurality of N
(N = 4) non-uniform pulse of each transistor (Tr
a) Control means for controlling ON of (Trc ') (12)
Is composed.

Therefore, in the above embodiment, the transistors (Tra) to (Trc ′) are turned on based on the relational expression (4) of the PWM control pattern in the operation flow of the PWM control pattern (FIG. 10).
After the time τ is calculated by the calculation means (10),
The time τ is divided by the dividing means (11) into a plurality of N (four) pulses τ ′, and the divided pulses τ ′ are stored in the switching time registers of the phases a, b, and c.

Then, in the subsequent period To, as shown in FIG. 12, during this period To, the transistors (Tra) to (T
rc ′), the ON time τ is calculated and divided, and in this time period To, a, b obtained in the previous time period To for each To / N (= To ′) cycle , c The corresponding transistors (Tra) to (Trc ') are divided by the control means (12) with the divided pulse τ' in the switching time register of each phase.
Since the ON control is performed, the frequency of the high-frequency component can be made higher than that of the conventional device as shown in FIG. 18 (the ON time is not divided into a plurality of pulses), and the carrier frequency is equivalently increased.
ON time can be multiplied by N (N = 4) times, and the original carrier frequency (5KHz) can be increased to a higher carrier frequency (20KHz)
Can be FIGS. 8 and 18 show the case where the ON time of the transistor on the + side of each phase is calculated.

Here, the original carrier frequency (5 KHz), that is, the operation period To (200 μS) of the ON time is a period sufficient for the one-chip microcomputer (8) to sufficiently calculate the PWM control pattern, so that one chip While using a microcomputer (8), it enables PWM control at a high carrier frequency (about 20 KHz), and at low cost and simplifies the circuit configuration,
By utilizing the capability of a high-speed switching element such as a MOSFET, the three-phase AC waveform to the induction motor (1) can be precisely controlled, thereby reducing electromagnetic noise and increasing motor efficiency.

In addition, when the carrier frequency (5 KHz) of the conventional level is sufficient, the operation time of the one-chip microcomputer (8) can be reduced, and the processing capacity other than the PWM control can be enhanced.

Moreover, the division of the ON time by the dividing means (11)
When the divided pulse τ ′ is output in the first cycle T′o as shown in FIG. 2B, the divided pulse τ ′ is output in the next cycle T′o, and is larger than the divided pulse by the interpolation value Δτ. Since the output of the divided pulse is repeated at each control cycle T'o (see also FIG. 12), the output of the divided pulse is shown in FIG. As described above, the reproducibility of the waveform can be satisfactorily secured with respect to the average value of the output voltage in the control cycle T'o corresponding to the equivalent carrier frequency. Further, in the case where the pulse is divided into a plurality of unequal-width pulses by linear interpolation, the calculation in the waveform interpolation is performed in the above-described manner.
Since division and addition are performed as shown in step Sc5 in FIG. 10, the calculation by the microcomputer (8) required for the division, The processing time is relatively short, and the equivalent carrier frequency can be sufficiently increased.

15 and 16 show another embodiment, in which division into unequal-width pulses is performed based on a correction value table stored in advance.

That is, even when performing linear interpolation as in the above embodiment,
As shown in FIG. 16, the true value of the signal wave (that is, Sinωt)
On the other hand, the three unequal width pulses located in the middle have errors Δτ ₁ , Δτ ₂ , and Δτ ₃ respectively. Each error Δτi is uniquely determined if the form of the sine wave function (determined by the amplitude V ₁ and the phase ωt) and the operation period To of the ON time are determined. A correction value table in which Δτi is stored in advance according to the amplitude V ₁ , the phase ωt, and the calculation period To of the ON time is prepared, and this correction value table is stored in the microcomputer (8).

FIG. 15 is a block diagram of the microcomputer (8) in the case of dividing the unequal-width pulse based on the correction value table. In the figure, (15) is the amplitude of the output voltage
V ₁ , the phase ωt, and the operation period To of the ON time are inputted, and the ON time operation circuit for calculating the ON time of each transistor (Tra) to (Trc ′) based on the control flow of FIG. ) Indicates that the ON time of each of the transistors (Tra) to (Trc ′) calculated by the ON time calculation circuit (15) is equally divided into a plurality of N (N = 4) into equal-width pulses. An unequal-width pulse dividing circuit for obtaining a plurality of N (N = 4) unequal-width pulses from this equal-width pulse based on an interpolation value by linear interpolation calculated by the control flow of FIG. A correction value reading circuit that inputs the amplitude V _{1 of the} output voltage, the phase ωt, and the operation period To of the ON time, and reads a correction value Δτi corresponding thereto from a correction value table stored in advance therein. Unequal-width pulse dividing circuit (16) and correction value reading circuit (1
7) is an unequal width pulse correction circuit that receives the output of 7) and adds a corresponding correction value Δτi to each of a plurality of N (N = 4) unequal width pulses. 18) Each transistor (Tr
a) to (Trc ') are controlled to be ON.

Therefore, the ON time of each of the transistors (Tra) to (Trc ') is corrected based on the correction value table by the block configuration of the microcomputer (8) in FIG. A dividing circuit (11) configured to divide into pulses is configured.

Therefore, in this embodiment, as shown in FIG. 16, the reproducibility of the waveform is corrected by correcting the three intermediate (N-1) unequal width pulses divided by the linear interpolation with the corresponding correction values Δτi. Can be improved.

Note that the correction value table uses a correction coefficient instead of the correction data.
ki may be stored. In this case, correction is performed by multiplying the variation Δτ of the unequal-width pulse by a correction coefficient as shown in the following equation.

τ (N) + k ₁ · Δτ τ (N) + k ₂ · Δτ τ (N) + k ₃ · Δτ τ (N) + 4 · Δτ Here, k ₁ , k ₂ , and k ₃ are represented by the following equations.

k ₁ = (Δτ + Δτ ₁ ) / Δτ k ₂ = (2 · Δτ + Δτ ₂ ) / (2 · Δτ) k ₂ = (3 · Δτ + Δτ ₃ ) / (3 · Δτ) Therefore, when the correction coefficient ki is stored, since the ratio can be information of amplitude V ₁ is made unnecessary, achieving a reduction in table amount.

The portion that converts the content of the switching time register of each phase into a pulse width may be processed by hardware such as an external pulse width modulation IC. 9 and FIG.
With the configuration as shown in FIG. 13, even when the carrier frequency changes due to the change of the switching element, it is sufficient to change only the dividing means (11) and the control means (12). Also, if the switching time register is shared with the register of the pulse width control unit (step S _B2 ), step S in FIG.
The processing of _B1 can be omitted.

Furthermore, the calculation cycle T in the calculation flow of the PWM control pattern
o is uniquely determined by the time required to actually calculate the PWM control pattern (including the division of the ON time).
The period To ′ of the ON control of the transistor in the control flow of FIG. 11 and FIG. 11 is determined according to a desired carrier frequency,
For this purpose, the number of divisions of ON time of each transistor N (To / T
The value of o ') may be set to an appropriate value.

Further, in the above embodiment, the division into unequal-width pulses by the dividing means (11) is performed based on linear interpolation or a correction value table. However, the present invention is not limited to this. It is needless to say that the present invention can be similarly applied to the case where the pulse is divided into a plurality of unequal width pulses by the interpolation method.

Further, in the above embodiment, the PWM control pattern is obtained based on the relational expression (4) in the case of the voltage vector control. However, the PWM control pattern is obtained based on the relational expression in the case of the other PWM control method such as the triangular wave comparison method. Of course, it is good.

(Effects of the Invention) As described above, according to the pulse width modulation control device for the inverter of the present invention, the ON time of the switching element that is repeatedly calculated at a calculation cycle corresponding to the carrier frequency is set to a plurality of unequal width pulses. Since each switching element is ON controlled by this decomposition pulse, even when a relatively long time is required to calculate the ON time of the switching element, the carrier frequency can be equivalently increased, for example, at a low cost. Even when a simple one-chip microcomputer with a simple circuit configuration is used, the three-phase AC waveform can be precisely controlled to reduce electromagnetic noise,
The motor efficiency can be increased. In addition, it can cope well with a large change in the ON time of the switching element, and as compared with the division by the equal-width pulse, the reproducibility of the waveform of the signal wave can be secured better, and more precise waveform control can be performed. Can be made possible.

In this case, when the division into unequal-width pulses is performed based on linear interpolation or a correction value table stored in advance, a plurality of pulses can be relatively easily compared with a case using a higher-order interpolation method. The pulse width can be divided into unequal width pulses, and the calculation and processing time by the microcomputer can be reduced, and pulse width modulation control at a sufficiently high carrier frequency can be performed.

[Brief description of the drawings]

1 to 14 show an embodiment of the present invention. FIG. 1 is an overall schematic diagram, FIG. 2 is an electric circuit diagram, and FIG. 3 is a diagram showing various states of a voltage type inverter by eight kinds of voltage vectors. FIG. 4 is an explanatory diagram of voltage vector control for making a locus of a time integral of a voltage vector on a complex plane close to a circular locus, and FIGS. 0 ≦ φ ≦
FIGS. 6 and 7 are flow charts showing ON / OFF control of each transistor by an equal-width pulse by a one-chip microcomputer, respectively. The figure shows that the carrier frequency is
FIG. 9 is an explanatory diagram equivalently increased by equal division of the ON time, FIG. 9 is an operation explanatory diagram in the case of decomposing into equal-width pulses, FIG. 10 and FIG.
FIG. 12 is a flowchart showing ON / OFF control of each transistor with an unequal width pulse. FIG. 12 is an explanatory diagram of the state of interpolation of each divided pulse at a rate of dividing into unequal width pulses. FIG. FIG. 14 is an explanatory diagram of the operation in the case of division into width pulses, and FIG. 14 is an explanatory diagram showing the reproducibility of the waveform in the case of division into unequal width pulses. 15 and 16 show another embodiment, and FIG.
FIG. 15 is a block diagram of the microcomputer, and FIG. 16 is an operation explanatory diagram. FIGS. 17 (a) and (b) are comparison diagrams of the case of dividing into equal-width pulses and the case of dividing into non-uniform-width pulses. FIG. 18 is an explanatory view showing a conventional example. (2) ... three-phase winding, (3) ... voltage-type inverter,
(4) Bridge circuit, (Tra) to (Trc ') Transistor, (8) One-chip microcomputer, (10) Calculation means, (11) Division means, (12) Control means.

Claims (3)

(57) [Claims] A bridge circuit (4) connected to a three-phase winding (2) and having a plurality of switching elements (Tra) to (Trc '), wherein each switching element (4) of the bridge circuit (4) is provided. A pulse width modulation control device for an inverter in which a DC is pulse width modulated by ON / OFF operations of Tra) to (Trc ') to apply a three-phase AC voltage to the three-phase winding (2), A calculating means (10) for calculating the ON time of each of the switching elements (Tra) to (Trc ') at a calculation cycle corresponding to the carrier frequency; and a switching element (Tra) to (Tra) calculated by the calculating means (10). A dividing means (11) for dividing the ON time of (Trc ') into a plurality of unequal width pulses;
Control means (12) for turning on and off each of the switching elements (Tra) to (Trc ') with a plurality of unequal width pulses divided in 1). apparatus. 2. The inverter according to claim 1, wherein the dividing means divides the pulse into a plurality of unequal-width pulses by linear interpolation so that the width of the divided pulse changes at an equal change width. Pulse width modulation controller. 3. The dividing means (11) divides the ON time of each of the switching elements (Tra) to (Trc ') into a plurality of equal-width pulses, and then stores a correction value stored in advance according to the phase of the signal wave. 2. The pulse width modulation control device for an inverter according to claim 1, wherein the plurality of equal width pulses are converted into a plurality of unequal width pulses based on a table.