JPH0832183B2 - Inverter pulse width modulation controller - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a pulse width modulation control device for an inverter,
In particular, the present invention relates to an improvement of a device for performing precise waveform control by increasing a carrier frequency.

(Prior Art) In recent years, elements such as MOSFETs (metal oxide gate field effect transistors) have appeared as high-speed switching devices, and if these are used for pulse width modulation of inverters,
Precise waveform control has become possible, and it has become possible to obtain effects such as reduction of electromagnetic noise and increase of motor efficiency.

Therefore, conventionally, by providing an analog control circuit or using a dedicated hardware of a digital circuit or a high-speed arithmetic unit such as DSP, it is possible to perform pulse width modulation at a high carrier frequency (for example, 20 KHz) and It is known to secure a reduction effect. (For example, see "Application of high-frequency switching to general-purpose inverters", Proceedings of the National Conference of the Institute of Electrical Engineers of Japan, 1987, Presenter, Chihiro Okado, etc.).

(Problems to be Solved by the Invention) However, the above-mentioned conventional ones have drawbacks that the circuit is complicated, various adjustments are complicated, and the cost is high.

Therefore, it is conceivable to adopt a one-chip microcomputer (hereinafter, abbreviated as a microcomputer) that is inexpensive and has a simple circuit configuration. In this idea, a series of processes necessary for generating a pulse width modulation pattern is performed. The calculation time of the microcomputer is long and requires, for example, about 200 μS, and the carrier frequency remains at about 5 KHz at the maximum. For this reason,
Pulse width modulation with a high frequency (2 OKHz or more) carrier frequency is generally difficult.

The present invention has been made in view of the above problems, and an object thereof is to make a situation that a carrier frequency is apparently raised to be equal to that of a single-chip microcomputer, and at the same time, a low-cost and simple circuit configuration is adopted. Therefore, it is possible to equivalently enable pulse width modulation at a high carrier frequency, and obtain effects such as reduction of electromagnetic noise and increase of motor efficiency by precise waveform control.

In that case, regarding the formation of the pulse width modulation pattern,
When the pulse width modulation pattern is determined so that the locus of time integration of the output voltage approaches the circular locus, the pulse width modulation pattern can be formed relatively easily.
It is desirable to utilize this. Now, to explain this in detail, first, let va, vb, vc be the output terminal potential of the inverter, vn be the neutral point potential of the three-phase winding, and the output voltage vector defined by the following equation. And the voltage vector Time integral of think of.

Now, the balanced three-phase voltage of angular frequency ω is applied to the three-phase winding of the induction motor. Voltage vector when voltage is applied And its time integration Draws a circular locus on the complex plane.

On the other hand, in the voltage source inverter, one of the transistors in each phase arm is always in the ON state, so for convenience,
When the + side ON state is represented by "1" and the-side ON state is represented by "0", and the a phase, b phase, c phase are written as "101", "011", etc., the state of the inverter (3) There are 8 types. Voltage vector for each state (P = 0 to 7) has a size (Vd is a DC voltage), and its direction is as shown in FIG. here, Is And is a zero vector. Time integration of the above voltage vector Therefore, the time integration when driving the inverter Is the voltage vector It moves at the speed of (However, it stops when the vector is zero).

From the above, the pulse width modulation pattern of the voltage source inverter is the time integration of the voltage vector. Voltage vector so that the vector locus on the complex plane of moves along the circumference of specified radius R at angular velocity ω Is appropriately selected and determined. (The designated radius R is R = V _{1 where} V _{1 is} the effective value of the line voltage of the fundamental wave voltage and ω is the angular frequency.
/ Ω. ) That is, for example, as shown in FIG. 4, the angle φ is 0 ≦ φ ≦
In the range of π / 3, the voltage vector And the zero vector (eg ), Stay at point P _{0 for} time τ ₀ (this state is indicated by the symbol °), and then For time τ ₄ to reach point q ₁ Let us consider the case of taking time τ ₆ to reach point P ₁ . In this case, at ΔP ₀ q ₁ P ₁ , And τ ₀ + τ ₄ + τ ₆ = T ₀ , the above equation is solved to obtain the voltage vector within the period T ₀ . , Τ ₄ , τ ₆ , and τ ₀ are obtained.

_{τ 4 / T 0 = k S} · Sin (π / 3-φ 0) τ 6 / T 0 = k S · Sinφ 0 τ 0 / T 0 = 1-k S · Sin (φ 0 + π / 3) ...... (3) where k _S is the voltage control rate, Is.

The above expression (3) is a relational expression in the range where the angle φ is 0 ≦ φ ≦ π / 3, but in other sections, the inverter performs symmetrical three-phase operation. By replacing each symbol as described above, a relational expression in the range of 0 ≦ φ ≦ 2π can be obtained.

Next, the ON / OFF pattern (pulse width modulation pattern) of each transistor is obtained based on the time τ of the voltage vector of the above formula (3). In this case, the relationship between the time τ of the voltage vector and the pulse width modulation pattern changes according to the order in which the voltage vector is taken. Therefore, in order to simplify the control device, the same pattern is repeated during each period T _0. , Each period
When the constraint condition that the ON / OFF switching of the transistor within T ₀ is performed only once, the pulse width modulation pattern is represented by the four patterns shown in FIGS. 5 (a) to 5 (d).
τ ⁺ indicates the ON time of the + side transistor, and τ ⁻ indicates the ON time of the − side transistor. Of the four PWM control patterns above, the fundamental wave output voltage amplitude is slightly larger. It is preferable to adopt the pulse width modulation pattern shown in FIG.

In the inverter, the pulse width modulation pattern is uniquely determined by knowing the name of the transistor that is turned on at the beginning of the period T ₀ and the time when it turns off. Therefore, the above equation (3) and FIG. ) And (b), the PWM control pattern is determined by the following equations when the angle φ is in the range of 0 ≦ φ ≦ π / 3.

(Method a) (Method B) That is, in the pattern shown in FIG. Time is τ ₀ and the voltage vector Time is τ ₄ and the voltage vector Since time is tau _6, from the 5 (b), - ON time of the transistor side of a phase tau _a ^- is the voltage vector (4) from the third equation of the above equation (3) corresponding to the time τ ₀ of
A first expression of the expressions is derived.

Similarly - ON time of the transistor side of the b-phase tau _b ^- is the voltage vector Since the sum of the time tau ₄ of ^{_{(τ b - = τ 0 +}} τ 4), (3) by adding the first equation and the third equation of equations (4) of the second
The formula is derived.

Also, - ON time of the transistor side of the c-phase tau _c ^- is the voltage vector Time τ ₄ and voltage vector Since the sum of the time tau ₆ of ^{_{(τ c - = τ 0 +}} τ 4 + τ 6),
The third equation of the equation (4) is derived by adding the first equation, the second equation, and the third equation of the above equation (3).

Furthermore, the same applies to the first to third expressions of the above expression (5), which is the pattern shown in FIG. 5 (b).
Voltage vector Is a voltage vector as shown in FIG. Is the same as, so the voltage vector To the time τ ₇ of (3), the ON time τ _a ^{+ of the +} side a phase transistor and the ON time τ _b ^{− of the} − side b phase transistor are applied in the same manner as described above. The ON time τ _c ⁻ of the c-phase transistor on the − and − sides is derived.

Further, the relational expression (4) of the pulse width modulation pattern in the range of 0 ≦ φ ≦ π / 3 is the same as the above, and
By replacing each symbol as shown in the table, a relational expression in the range of 0 ≦ φ ≦ 2π is obtained. If the ON time of each switching element is calculated based on the formula (4) or (5), the calculation time can be shortened to a relatively short time, and one of them can be constantly ON-controlled, and two sets can be set. The PWM control pattern can be calculated using only the timer of, and a set of timers can be eliminated. In addition, the above (4),
The expression (5) may be used properly as follows. Equation (4) is used when it is necessary to arrange the zero vector at the beginning of the period T ₀ due to hardware restrictions, and equation (5) is used when it is necessary to arrange it at the end.

(Means for Solving the Problem) From the above, according to the present invention, the calculation algorithm of the pulse width modulation pattern is changed by changing the generation algorithm of the pulse width modulation pattern (ON time of a plurality of switching elements provided in the inverter). Even if the (calculation cycle) is long, each calculated ON time is divided into a plurality of pulses to raise the carrier frequency equivalently. Further, the ON time of the switching element is calculated by using the arithmetic expression of the above formula (4) or (5), and the transistor which should take the calculated ON time is replaced as shown in Table 2 above. ON by turning on each transistor by specifying it based on the table
The time is calculated in a relatively short time.

As a concrete solution, a bridge circuit (4) connected to a three-phase winding (2) and having a plurality of switching elements (Tra) to (Trc ') is provided as shown in FIGS. The bridge circuit (4) is provided with each switching element (Tr
a) It is premised on a pulse width modulation control device for an inverter in which a DC pulse width modulation is performed by ON / OFF operations of (Trc ') and a three phase AC voltage is applied to the three phase winding (2). . Then, as shown in FIG. 6 and FIG. 7, each of the switching elements (Tr
a) ~ (Trc ') ON time is calculated in the range of 0 to π / 3 of phase φ Or And the switching elements (Tra) to (Trc ′) that should have ON times calculated based on the above-described calculation formula in the range of π / 3 to 2π of the phase φ ₀ are calculated in advance based on the phase φ _0.
Switching elements (Tra) to (Trc ') set according to
Of the switching element (Tr) calculated by the calculating means (10) and specified based on the replacement table of
a) to (Trc ') ON time is divided into a plurality of pulses, and the switching elements (Tra) to (Trc) are divided by the plurality of pulses divided by the dividing means (11). ′)
And a control means (12) for controlling ON.

In the invention according to claim (2), the calculation means (10)
Of the switching element (Tra) to (Trc ′) in the range of ₀ to π / 3 of the phase φ ₀ , the ON time table stored in advance is calculated based on the above equation. In advance, the ON time is obtained from the ON time table.

(Operation) With the above configuration, in the invention according to claim (1), even when the carrier frequency is a normal value (for example, about 5 KHz),
The ON time (pulse width modulation pattern) of each of the switching elements (Tra) to (Trc ′) is repeatedly calculated by the calculating means (10) at each calculation cycle corresponding to the carrier frequency. ) To (Trc ') ON time is divided into a plurality of (for example, four) pulses by the dividing means (11), so that the carrier frequency is multiplied by this number of divisions,
The situation is similar to when pulse width modulation is performed at an equivalently high carrier frequency (for example, about 20 KHz). as a result,
When each of the switching elements (Tra) to (Trc ') is controlled to be ON by the control means (12) with each of the divided pulses, a precise and nearly sinusoidal output waveform is obtained, and the electromagnetic noise is effectively reduced. As well as being reduced, the motor efficiency is effectively increased.

Here, the carrier frequency of pulse width modulation is the normal value (5K
Since the pulse width modulation pattern can be sufficiently calculated even with a 1-chip microcomputer having a long calculation time (about Hz), PWM modulation with a high carrier frequency can be performed with a low cost and a simple circuit configuration.

Moreover, each switching element (Tra) to (Trc ') is turned on.
Calculation of time is an arithmetic expression with relatively few additions and subtractions Or Since it is performed based on the above, the ON time calculation time can be shortened, and one predetermined switching element can always be ON-controlled, and the ON time calculation can be performed using only two sets of timers.

Furthermore, each switching element (Tra) to (Trc ') is turned on.
The calculation of time is performed by the same calculation formula (calculation formula (4) or (5)) in the entire range of the phase φ (0 ≦ φ ≦ 2π), and its ON
Since the switching elements (Tra) to (Trc ') that should take time are specified based on the replacement table, the calculation time of the ON time can be more effectively shortened.

In the invention according to claim (2), the calculation means (10)
Since the ON time of each switching element (Tra) to (Trc ') is calculated and calculated based on the ON time table provided in advance, this ON time can be calculated in a shorter time and the ON time table Since the ON time is stored in the range of 0 to π / 3 of φ, the storage capacity is small.

(Effects of the Invention) As described above, according to the pulse width modulation control device for an inverter of the invention according to claim (1), the ON time of the switching element is set to 0 of the phase φ with an operation cycle corresponding to the carrier frequency. Calculation formula in the range of up to π / 3 Etc., and based on the substitution table set beforehand according to the phase φ, the switching element that should take this calculated ON time is specified, and the calculated ON time of the switching element is calculated as a plurality of pulses. Since each switching element is ON-controlled by this divided pulse with the divided pulse, the same calculation is performed in the entire range of the phase φ (0 ≦ φ ≦ 2π) to reduce the calculation time of the ON time of the switching element. However, the carrier frequency can be increased remarkably equivalently, and the three-phase AC waveform can be precisely controlled by using a low-priced one-chip microcomputer with a simple circuit configuration and using only two sets of timers. It is possible to reduce electromagnetic noise and increase motor efficiency.

In particular, if the calculation means is provided with the ON time table in advance as in the invention according to claim (2), the calculation calculation of the ON time of each of the switching elements (Tra) to (Trc ′) can be performed in a shorter time. Together with this ON time table, the phase φ is 0 to π
Since the range of / 3 is sufficient, the storage capacity can be reduced.

(Example) Hereinafter, the Example of this invention is described based on drawing.

1 and 2 show a pulse width modulation controller for an inverter according to the present invention. In each figure, (1) is an induction motor having a three-phase winding (2) in which three windings (2a), (2b), (2c) are Y-connected, and (3) is the induction motor (1). A connected voltage type inverter, wherein the inverter (3) has a transistor bridge circuit (4) connected to the three-phase winding (2) of the induction motor (1).
The bridge circuit (4) is provided with a plurality of (6) MOSFETs each having free wheeling diodes (Da) to (Dc ′).
Etc. Transistors (switching elements) (Tra), (Tr
a ′), (Trb), (Trb ′), (Trc), (Trc ′). A DC voltage is applied to the inverter (3) from the rectifier (6) that rectifies the three-phase AC of the three-phase power supply (5).

Further, (8) is a one-chip microcomputer that forms the ON time of the six transistors (Tra) to (Trc ') of the bridge circuit (4), that is, a pulse width modulation pattern,
The microcomputer (8) has the above-mentioned transistors (Tra) to
A base driver (8a) for turning ON / OFF (Trc ′) is provided, and pulse width modulation of DC is performed by ON / OFF control of the transistors (Tra) to (Trc ′) by the microcomputer (8). I have to. Further, in the microcomputer (8), a replacement table in which the types of transistors (Tra) to (Trc ') to be specified are set according to the section N (N = 0 to 5) of the phase φ as shown in Table 2 above. Is stored in advance.

Next, the operation of the one-chip microcomputer (8) will be described with reference to FIG. 8 based on the control flows of FIGS. 6 and 7. The control flow of FIG. 6 is for each transistor (Tra)
It is a calculation flow of ON time (pulse width modulation pattern) of (Trc ′), in which each of the transistors (Tra) to (Trc ′)
The calculation of the ON time is performed by determining the pulse width modulation pattern so that the locus of time integration of the output voltage approaches the circular locus, and the calculation formula is, for example, the above calculation formula (4). It is based on. Further, the control flow of FIG. 7 is a flow for actually turning on each of the transistors (Tra) to (Trc ′). First, as will be described from the control flow of FIG. 6, the calculation cycle T ₀ (for example, 5 KHz) according to the carrier frequency (for example, 5 KHz)
Every 200 μS), and after inputting the phase ωt of the output voltage and the amplitude V ₁ of the output voltage in step S _A1 ,
Each transistor (Tra) to (Trc ') is based on the relational expression (4) of the PWM control pattern and the second table of the substitution table in S _A2.
ON time τ (n + 1) of is calculated.

Then, subsequently, the ON time τ (n + 1) of the transistors (Tra) to (Trc ′) calculated above in step S _A3 is divided by a preset numerical value N (for example, 4) to obtain each ON time τ. A plurality of (n + 1) N (4) pulses τ ′ (n +
1) Divide into (τ '(n + 1) = τ (n + 1) / 4).
Then, in step S _A4 , this divided pulse τ ′ (n +
1) for each phase (In the voltage type inverter, one of the transistors in each phase arm is always in the ON state,
Store in the switching time register for each phase) and return.

Further, in the control flow of FIG. 7, the repetition cycle T ₀ ′ is earlier than the calculation cycle T _{0 of} FIG. 6 and the ON time τ (n
According to the number of divisions N (4) of +1), T ₀ ′ = T ₀ / N is set (note that the number of divisions N is N = 2 ^m (m = 1 where division can be executed only by shifting). , 2 ...) is preferable). And Thus, in the sixth divided in control flow diagram pulse τ '(n + 1) after it is stored in each phase of the switching time register, as shown in FIG. 8, in the next calculation cycle T _0, The contents of the switching time register are input in step S _B1 , and the divided pulse τ ′ (n + 1) is input in step S _B2.
Then, the transistors (Tra) to (Trc ') to be ON-controlled by ON are controlled by the divided pulse τ' (n + 1), and the process returns.

Therefore, in the control flow of FIG.
With S _A1 and S _A2 , the relational expression (4) of the above pulse width modulation pattern is obtained with the calculation cycle corresponding to the carrier frequency (5 KHz).
Based on each transistor (switching element) (Tra)
~ (Trc ′) ON time τ (n + 1) is calculated, and the calculated ON time τ (n + 1) should be taken into the transistor (Tr
The arithmetic means (10) is configured to identify a) to (Trc ') based on the substitution table in Table 2.

Further, in step S _A3 , the ON time τ of each of the transistors (Tra) to (Trc ′) calculated by the calculating means (10) is
A plurality of (n + 1) N (N = 4) pulses τ ′ (n +
The dividing means (11) is configured to divide into 1). Further, according to the control flow of FIG. 7, a plurality of N (N = 1) pulses τ ′ divided by the dividing means (11).
With (n + 1), the above transistors (Tra) to (Tr)
The control means (12) is configured to control ON of c ').

Therefore, in the above embodiment, FIG. 8 and FIG.
As shown in the figure, the ON time τ (n +) of each of the transistors (Tra) to (Trc ′) is calculated based on the relational expression (4) of the pulse width modulation pattern in the pulse width modulation pattern calculation flow (FIG. 6).
1) is calculated, and the transistors (Tra) to (Trc ') to be ON-controlled by the ON time are specified by the calculating means (10) based on the substitution table (Table 2), and then each ON time is calculated. τ (n + 1) is divided into a plurality of N (4) pulses τ ′ (n + 1) (τ ′ (n + 1) = τ (n + 1) by the dividing means (11).
/ 4), this divided pulse τ '(n + 1)
It is stored in the switching time register of each phase a, b, c.

Then, in the next calculation cycle T _0, as shown in FIG. 8, each transistor as again described above in this period T ₀ (Tra) ~ (T
The ON time τ (n + 2) of rc ′) is calculated and divided, and at the time T ₀ of this time, the T ₀ / N (= T ₀ ′)
In each cycle, the transistors (Tra) to (Trc ') specified above are controlled by the divided pulse τ' (n + 1) in the switching time register of each phase of a, b, c obtained in the previous period T _0. Since it is ON-controlled by the means (12), the frequency of the high-frequency component can be made higher than that of the conventional one (where the ON time is not divided into a plurality of pulses) as shown in FIG. Can be multiplied by the number of ON times divided by N (N = 4), and the original carrier frequency (5 KHz) can be made a high carrier frequency (20 KHz). Incidentally, FIGS. 8 and 16 show the case where the ON time of the + side transistor of each phase is calculated.

Here, the original carrier frequency (5 KHz), that is, the ON time calculation cycle T ₀ (200 μS) is a sufficient period for the 1-chip microcomputer (8) to sufficiently calculate the pulse width modulation pattern. Using a 1-chip microcomputer (8), pulse width modulation at a high carrier frequency (about 20 KHz) is possible, and at the same time it is possible to use the high-speed switching elements such as MOSFETs at a low price while simplifying the circuit configuration. The three-phase AC waveform to the electric motor (1) can be precisely controlled, and electromagnetic noise can be reduced and motor efficiency can be increased.

Further, when a carrier frequency (5 KHz) similar to the conventional one is sufficient, the calculation time of the one-chip microcomputer (8) can be shortened and the processing capacity other than pulse width modulation can be enhanced.

Moreover, the calculation of the ON time τ (n + 1) of each of the transistors (Tra) to (Trc ′) is performed based on the calculation formula (4) with a small number of additions and subtractions, so that the calculation time can be shortened. At the same time, one transistor can be always ON-controlled, and the timer only needs to be two sets corresponding to the other two phases, and the circuit configuration can be simplified accordingly.

In addition, the transistor that should take the ON time calculated based on the calculation formula (4) is specified based on the substitution table (Table 2) built in advance, and the total range of the phase φ is calculated as the calculation of the ON time. (0 ≦ φ ≦ π) can be performed in the same manner with the equation (4), so that the calculation time of the ON time τ of each transistor (Tra) to (Trc ′) can be further shortened, and the pulse width at a higher carrier frequency can be obtained. Modulation can be performed.

In the above embodiment, each of the transistors (Tra) to (Tr
The ON time of c ′) is expressed by the relational expression (4) of the pulse width modulation pattern.
After calculating based on the above, this was divided into a plurality of N (N = 4).
The divided pulse τ '(n +
1) may be calculated.

In addition, step S _A2 in the control flow shown in FIG.
ON time τ (n) of each transistor (Tra) to (Trc ′) at
If an ON time table that stores the operation result in the range of ₀ to π / 3 of the phase φ ₀ is prepared in advance instead of the +1) operation, the ON time of each transistor (Tra) to (Trc ′) τ
The calculation and calculation of (n + 1) becomes easier and
Since the storage range of the ON time is the range of ₀ to π / 3 of the phase φ ₀ , the storage capacity can be reduced.

Further, the portion for converting the content of the switching register of each phase into a pulse width may be processed by hardware such as an external pulse width modulation IC. Further, with the configuration shown in FIG. 9, even when the carrier frequency changes due to the change of the switching element, it is sufficient to change only the dividing means (11) and the control means (12). Further, if the switching time register is shared with the register of the pulse width control unit (step S _B2 ), the process of step S _B1 in FIG. 7 can be omitted.

In addition, the calculation cycle T in the calculation flow of the PWM control pattern
₀ is uniquely determined by the time required to actually calculate the PWM control pattern, but the period T ₀ ′ of ON control of the transistor in the control flow of FIG. 7 is determined according to the desired carrier frequency. Therefore, for this purpose, the value of the number N (T ₀ / T ₀ ′) of division of the ON time of each transistor may be set to an appropriate value.

Further, FIGS. 10 to 14 show a modification of the present invention,
In the above embodiment, when the pulse is divided into a plurality of N pulses (which will be described below when N = 4 similarly), each pulse is divided into equal widths instead of equal widths. .
That is, the ON time τ (n) of the transistor in the period T ₀ ,
This is a result of performing linear interpolation (linear interpolation) with the ON time τ (n + 1) in the next period T ₀ .

The above modification will be described in detail. The control flow in Fig. 10 is the period
Is the arithmetic processing in T ₀ period, and inputs the phase ωt and amplitude V ₁ of the output voltage in step S _C1, 'ON time τ of (n each transistor in step S _C2 of the previous (Tra) ~ (Trc)'
-1) Input the calculation result of (divided pulse divided into 4).

Then, based on the relational expression (4) of the pulse width modulation pattern in step S _C3 , each transistor (Tra) to (T
rc ') ON time τ (n) is calculated, and this ON time τ (n)
Divided pulse τ ′ into a plurality of N (4)
(N) is calculated, and then, in step S _C4 , the previous divided pulse τ ′ (n−1) is calculated according to the difference between the divided pulse τ ′ of the transistors (Tra) to (Trc ′) and the divided pulse τ ′ of the previous time. The interpolated value Δτ _{n-1 of} is calculated based on the following formula.

Δτ _n-1 = {τ ′ (n) −τ ′ (n−1)} / NN; the number of divisions Then, the previous four divided pulses τ ′ (n−1) are calculated with this interpolation value Δτ _n−1 . In order to interpolate gradually, each divided pulse τ ′ (n−1) is sequentially divided by Δτ in step S _C5.
n−1 , 2 · Δτ _n-1 , 3 · Δτ _n-1 are added, and step S _C6
Then, each of these divided pulses is stored in a plurality of N (N = 4) switching time registers for each phase, and step S _C7
The divided pulses τ ′ (n−1) are stored and the process returns.

The control flow of FIG. 11, the first 12 divided pulse tau as shown in FIG. 'Calculates, stores the period T ₀ to 2 periods T ₀ eyes to the each divided pulse tau' each transistor (Tra) ~ (Tr
c ′) is ON-controlled, and its control cycle T ₀ ′ is
1 / N of the calculation cycle T ₀ of the control flow in FIG. 11 (N is the number of divisions)
Is.

In the control flow, the divided pulse τ ′ for each phase stored in the first switching time register is read in step S _D1 as shown in FIG. 13, and then the switching time register is shifted in step S _D2. , In step S _D3 , the corresponding divided pulses τ ′ (n−1) are turned on to control the corresponding transistors (Tra) to (Trc ′) to return, and thereafter, similarly, every control cycle T ₀ ′. The divided pulse for each phase stored in the 2nd, 3rd, and 4th switching time registers is sequentially read, and each transistor (Tra) is read.
Repeat ON control of ~ (Trc ').

Therefore, in the above modification, as shown in FIG. 12, for example, in the middle period T ₀ , the ON time τ (n) of the transistor is
The divided pulse τ ′ (n), which is obtained by dividing 4 into four, is the first period T ′ _0.
Is output in the control cycle T ′ ₀ , the division pulse larger in interpolation value Δτ _n−1 than the division pulse is output in the next cycle T ′ _0. Therefore, as shown in FIG. , A control period T ′ corresponding to an equivalent carrier frequency
The reproducibility of the waveform can be improved with respect to the average value of the output voltage at ₀ .

Further, FIG. 15 shows another modification, in which the ON time of each of the transistors (Tra) to (Trc ') is divided by a uniform width pulse or a non-uniform width pulse. Is appropriately selected according to the degree of the signal and the phase of the signal wave.

In other words, in the figure, ON time division is performed with unequal width pulses in the range where the phase slope of the signal wave (indicated by the dashed line in the figure) is large, and ON time division is performed in the range where the phase slope is small with equal width pulses. I am going to do it. In this modified example, the reproducibility of the waveform can be improved in the phase range with a large inclination as compared with the case of dividing with a constant-width pulse, and the reproducibility of the phase can be excellently secured in the phase range with a small inclination. However, as compared with the case of division with unequal width pulses, there is an effect that the calculation of the interpolation value becomes unnecessary and the calculation and processing time can be saved.

[Brief description of drawings]

1 to 15 show an embodiment of the present invention, FIG. 1 is an overall schematic configuration diagram, FIG. 2 is an electric circuit diagram, and FIG. 3 shows various states of a voltage source inverter by eight kinds of voltage vectors. The displayed explanatory diagram, FIG. 4 is an explanatory diagram of the voltage vector control for making the locus on the complex plane of the time integration of the voltage vector close to the circular locus, and FIG. 5 shows the phase φ of 0 ≦ φ ≦ π / 3 Explanatory diagrams of types of PWM control patterns that can be taken within the range, FIGS. 6 and 7
The figure shows each transistor ON / O by 1-chip microcomputer
FIG. 8 is a flowchart showing the FF control, FIG. 8 is an explanatory diagram in which the carrier frequency is equivalently increased, and FIG. 9 is an operation explanatory diagram. FIGS. 10 to 14 show a modified example, FIGS. 10 and 11 are flow charts showing ON / OFF control of each transistor, FIG. 12 is an explanatory view of the interpolation of divided pulses, FIG.
FIG. 13 is a diagram for explaining the operation, and FIG. 14 is a diagram for explaining the reproducibility of the waveform. Further, FIG. 15 is an explanatory view showing a phase range of a signal wave for selecting division with a constant width pulse and division with a non-uniform width, showing another modification. Further, FIG. 16 is an explanatory view showing a conventional example. (2) …… Three-phase winding, (3) …… Voltage type inverter,
(4) …… Bridge circuit, (Tra) to (Trc ′) …… Transistor, (8) …… One-chip microcomputer, (10) …… Computing means, (11) …… Division means, (12) …… Control means.

Claims (2)

[Claims] 1. A bridge circuit (4) which is connected to a three-phase winding (2) and has a plurality of switching elements (Tra) to (Trc '), and each switching element () of the bridge circuit (4). Tra) to (Trc ′) ON / OFF operation for pulse width modulation of DC to apply a three-phase AC voltage to the three-phase winding (2). An arithmetic expression in which the ON time of each of the switching elements (Tra) to (Trc ′) is calculated in the range of ₀ to π / 3 of the phase φ ₀ at the calculation cycle corresponding to the carrier frequency. τc ^- / T ₀ = 1 or τa ⁺ / T ₀ = 1 (.Tau.a ^-, .tau.a ^+, .tau.b ^-, .tau.c ^- each + side and - side of a phase,
ON time of b-phase and c-phase switching elements, T ₀ is a cycle,
V ₁ is the effective value of the fundamental wave voltage, and Vd is the DC voltage that is applied.), And the ON time calculated based on the above formula in the range of π / 3 to 2π of phase φ _0. Power switching elements (Tra) to (Trc ′) in advance with phase φ ₀
Switching elements (Tra) to (Trc ') set according to
Of the switching element (Tr) calculated by the calculating means (10) and specified based on the replacement table of
a) to (Trc ') ON time is divided into a plurality of pulses, and the switching elements (Tra) to (Trc) are divided by the plurality of pulses divided by the dividing means (11). ′)
A pulse width modulation control device for an inverter, comprising: 2. An arithmetic means (10) preliminarily calculates and stores an ON time of each switching element (Tra) to (Trc ') in a range of ₀ to π / 3 of a phase φ ₀ based on an arithmetic expression. 2. The pulse width modulation control device for an inverter according to claim 1, further comprising: an ON time table for obtaining the ON time from the ON time table.