JP2571370B2 - Photoelectric analog smoke detector - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to improvements in photoelectric analog smoke detectors.

(Background technology)

The photoelectric analog smoke detector, as shown in FIG.
A light-emitting chamber A and a light-receiving chamber B are provided in a chamber C having a maze structure, and the light-receiving chamber B is located at a position where light emitted from the light-emitting chamber A is not directly received. Is detected in the light receiving chamber B to obtain a signal corresponding to the smoke density. In the drawing, the hatched portions indicate the sensing areas.

FIG. 5 is an electric circuit diagram showing a basic configuration of the photoelectric analog smoke detector. In the light emitting chamber A, a light emitting element driving circuit 1 for intermittently emitting a light emitting element 10 such as an LED is provided. In the other light receiving chamber B, a light receiving signal amplifying circuit 2 provided with a light receiving element 20 such as a photodiode is provided.

The light scattered by the smoke in the chamber C is
Is detected, the signal is photoelectrically converted into a level signal corresponding to the smoke density in the light receiving signal amplifying circuit 2 and then amplified. The output integrated in the integrating circuit 3 is amplified in the DC amplifying circuit 4 to generate the self-fire alarm system. The analog signal VouT of the output characteristics required by the side is obtained.

By the way, in such a photoelectric analog smoke detector, the ratio of the sampling time to the sampling interval, that is, the duty ratio is extremely small (usually about 10 ^-4 ). Flows out, or conversely, flows into the integration circuit 3 from the DC amplification circuit 4, and the integrated output fluctuates, so that an appropriate analog output cannot be obtained. FIG. 3 shows a time chart for explaining the operation of the integrating circuit 3 in consideration of the leakage current. FIG. 3 (a) shows a timing pulse To sent by the light emitting element driving circuit, and FIG. The output light receiving pulse voltage Vs, (c) indicates the integration capacitor output Vc.

Therefore, in order to prevent such a leakage current, the input portion of the DC amplifier circuit 4 needs to have a very small input bias current, and when the environmental conditions of use as a smoke detector are taken into consideration, a low temperature (for example, −15) is used. C), the operation must be guaranteed, and in view of commercial value, it is required that power consumption is small and that the device can be constructed at low cost.

However, there is no DC amplifier circuit (op-amp) that satisfies all of these conditions at present.

[Object of the invention]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a photoelectric analog smoke detector that can meet the above requirements.

[Disclosure of the Invention]

In order to achieve the above object, the present invention proposes, at an input section of a DC amplifier circuit, a differential amplifier including an FET and an operational amplifier that amplifies an output signal of the FET. The gate output terminal of the first FET receives the integrated output of the integration circuit, and the gate terminal of the other FET receives the output of the operational amplifier as feedback.

Embodiment An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a circuit diagram showing a main part of the present invention. TR is a transistor constituting the final stage of the light receiving signal amplifying circuit 2 and is an emitter follower. The light receiving signal amplifying circuit 2 and the integrating circuit 3 are coupled by a coupling capacitor C. The integrating circuit 3 includes a resistor Rc, a charge / discharge control FET (FE
T3), and an integration capacitor Cc. A timing pulse synchronized with the light emission of the light emitting element is transmitted from a light emitting element driving circuit (not shown) to the gate terminal of the charge / discharge control FET (FET3), and integrated. Action is taking place.

A DC amplifier circuit 4 is provided at a stage subsequent to the integration circuit 3.
And an operational amplifier OP.

Here, the differential amplification FET has two F
ET1 and FET2 are combined, and FET1 and FET2 are source followers, and resistors Rs1 and Rs2 are connected to their respective sources. The output terminal of the integrating circuit 3, that is, the charge / discharge terminal of the integrating capacitor Cc is connected to the gate of the FET1. The non-inverting input terminal of the operational amplifier OP is connected to the source of the FET1, and the output terminal of the operational amplifier OP is divided by resistors R1 and R2 and connected to the gate of the FET2. Now, the charging voltage of the integrating capacitor Cc is Vc, and the source potentials of FET1 and FET2 are Vsl and V
If s2 is set, if Vc = 0, then if Vs1 = Vso, then if Vc ≠ 0, then Vs1 = Vso + Vc because the FET is a source follower. By the way, since the operational amplifier OP operates so that the inverted input potential becomes equal to the non-inverted input potential, Vs2 = Vso + Vc
Since FET1 and FET2 are differential amplifiers, FET2
Gate potential VG2 becomes VG2 = Vc. Therefore, at this time, the output voltage V2 of the operational amplifier OP is Therefore, the DC amplification circuit having the amplification degree of (R1 + R2) / R2 is configured by the FET1, the FET2, and the operational amplifier OP.

In such a circuit, the gate current of the FET is usually very small (for example, the gate current IG of the μPA71A (manufactured by NEC) is about IG <0.1 nA at room temperature).
Does not affect the charging current Vc of the integrating capacitor Cc even if the bias current is large, so that an inexpensive bipolar operational amplifier that operates with low current consumption can be used as the operational amplifier OP. Also, the source resistances Rs1, R2 of FET1 and FET2
The drain current can be reduced by using a few hundred KΩ for s2.
The consumption current can be suppressed by reducing the current to about 10 μA.

Moreover, these FET1, FET2 and operational amplifier OP are CM
Unlike OS operational amplifiers, operation is guaranteed even at low temperatures (eg, -15 ° C).

Next, a design example when such a DC amplifier circuit is configured will be described.

FIG. 2 shows an electrical equivalent circuit diagram of the integrating circuit portion when the FET 3 is turned on in the present invention.

In the figure, Ro indicates the output impedance of the light receiving signal amplifier circuit 2, RON indicates the on-resistance of the FET 3, and I1, I2, and I3 indicate the leakage current flowing into or out of the integration capacitor Cc.

Now, let Vs be the capacitor charging voltage when I = 0, and I 、
Assuming that the maximum value at 0 is Vc (see FIG. 3), the decrease amount of the charge of the integration capacitor Cc by the light receiving pulse voltage Vs is Q1, I1, I2, and the increase amount of the charge by I3 is Q2. , Here, it is assumed that τ = Cc (Ro + Rc + Ron) ≫To.

When To≪τ So on the other hand, In a steady state, that is, when the pulse voltage Vs is constant, Q1 and Q2 are equal. Therefore, in order to reduce the error Vc-Vs of the terminal voltage of the integrating capacitor Vc from the value Vs when I = 0, the resistance R is reduced, I is reduced (I1, I2, I3 is reduced), and T / To needs to be reduced.

By the way, considering the actual circuit, R is R
Since both o and RON are several hundred Ω, even if it is small, R =
The limit is about 0.5KΩ, and T / To cannot be reduced too much due to the limitation of current consumption.
^The limit is about ⁴ to 10 ⁵ .

Therefore, under such conditions, Vs is set to 100 mA
In order to make Vc−Vs <1 / 10Vs, R = 0.5K
Ω, T / To = 10 ⁴ Since Vs = 100 mV, Vc−0.1 = 5 × 10 ⁶ (I1 + I2-I3) <10 ⁻² ∴I1 + I2-I3 <2 × 10 ⁻⁹ = 2nA, and the leakage current from the DC amplifier circuit to the integration capacitor is a temperature characteristic. Therefore, it is desired that the design is made to be 2 nA or less.

〔The invention's effect〕

As understood from the above description, according to the photoelectric analog smoke detector of the present invention, since the input part of the DC amplifier circuit is configured by combining the differential amplification FET and the operational amplifier, the input bias It has the advantage that current is smaller than conventional operational amplifiers, operation is guaranteed even at low temperatures (for example, -15 ° C), and current consumption is small (approximately 10 μA is possible). Can be.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of a photoelectric analog smoke detector according to the present invention, FIG. 2 is an electric equivalent circuit diagram of an integrating circuit considering leakage current, and FIG. 3 explains the operation of the integrating circuit. FIG. 4 is a structural example of a photoelectric analog smoke detector, and FIG. 5 is an electric circuit diagram thereof. (Explanation of reference numerals) 1 ... Light emitting element driving circuit 10 ... Light emitting element 2 ... Light receiving signal amplifying circuit 20 ... Light receiving element 3 ... Integrating circuit 4 ... DC amplifying circuit FET1, FET2 ... Differential amplification FET OP …… Op amp

Claims (1)

(57) [Claims] 1. A light emitting element driving circuit for intermittently emitting light emitting electrons, and a light receiving element detects light scattered by light emitted from the light emitting element due to smoke, and outputs an electric signal having an output level corresponding to the smoke density. A light receiving signal amplifying circuit, an integrating circuit for integrating an output pulse from the light receiving signal amplifying circuit, and a DC amplifying circuit for amplifying an integrated output of the integrating circuit and outputting a signal having an output characteristic corresponding to smoke density. In the photoelectric analog smoke detector comprising: a differential amplifier constituted by an FET, and an operational amplifier for amplifying an output signal of the differential amplifier constituted by an input section of the DC amplification circuit; The gate terminal receives the integration output of the integration circuit and the other
A photoelectric analog smoke detector characterized by the output of an operational amplifier being fed back to the gate terminal of the FET.