JP2606322B2 - Blinking control device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for controlling blinking display of a frame memory included in a computer or the like as display means.

[Conventional technology]

Conventionally, a computer generally adopts a method of simply blinking by designating the attribute of a character displayed on a character screen to blinking.

[Problems to be solved by the invention]

Therefore, in the conventional method, the shapes that can be displayed on the character screen are limited, and in the blinking mode, only a simple form of alternately displaying the color given to the shape and the background color is allowed. Period was also limited to a constant.

An object of the present invention is to provide an output screen of a computer,
An object of the present invention is to provide a blinking control device capable of realizing a blinking display including a plurality of display contents at an arbitrary cycle in an area of an arbitrary shape.

[Means for solving the problem]

The blinking control device according to the present invention includes: a basic clock generating unit that receives a vertical synchronization signal for CRT display, divides the frequency, generates a basic clock, and a wavelength storage unit that stores a wavelength value of the basic clock. A first comparing means for comparing the outputs of the wavelength storage means and the basic clock generating means and outputting a signal for resetting the basic clock generating means to 0 when the values coincide with each other; Counting means for counting clocks; display start layer storage means for storing a value to be loaded when the counting means is reset; display end layer storage means for storing a value indicating a display end layer; output of the counting means And a second comparing means for comparing the value stored in the display end layer storage means, resetting the counting means at the time of coincidence, and loading the value stored in the display start layer storage means into the counting means. A counting direction control means for controlling the counting direction of the counting means; and a pixel for which blinking display is designated as attribute information from the parallel information of each layer read from the frame memory according to the output of the counting means. And display layer selecting means for selecting information of a layer to be displayed.

[Action]

The blinking control device of the present invention realizes blinking by sequentially switching layers to be displayed in a bitmap frame memory in which a plurality of memory layers for storing screen information are prepared.

The present invention allows any shape to be targeted for blinking by assigning one of a plurality of layers for storing screen information to attribute information for designating blinking display, thereby enabling blinking designation in units of one pixel. Because it becomes.

Also, in the present invention, the blinking display contents can be prepared by the number of memory layers prepared for display, so that if the number of display layers is increased, a free blinking form such as animation display can be adopted. It is possible. Also,
According to the value stored in the wavelength storage means, it is possible to specify how many (integer) cycles of the vertical synchronization signal of the CRT to perform counting by the counting means, so that the speed at which the display content changes can be arbitrarily selected. it can. Further, by specifying whether the counting direction of the counting means is to be taken in the ascending direction, the descending direction, or the alternate repetition of ascending and descending, the blinking display can be varied.

〔Example〕

 FIG. 1 is a block diagram of one embodiment of the present invention.

The blinking control device of the present embodiment includes a basic clock generation unit 1, a wavelength storage unit 2, a first comparison unit 3,
Counting means 4, display start layer storage means 5, display end layer storage means 6, second comparing means 7, counting direction control means 8
And display layer selecting means 9.

The basic clock generating means 1 is a means for receiving a vertical synchronizing signal _Vsync for CRT display, dividing the frequency, and generating a basic clock.

The wavelength storage means 2 is a means for storing the value of the wavelength of the basic clock.

The first comparing means 3 is a means for comparing the outputs of the wavelength storage means 2 and the basic clock generating means 1 and outputting a signal for resetting the basic clock generating means 1 to 0 when the values match.

The counting means 4 is means for counting the number of basic clocks according to the output of the first comparing means 3.

The display start layer storage means 5 is a means for storing a value to be loaded when the counting means 4 is reset.

The display end layer storage means 6 is a means for storing a value indicating the display end layer.

The second comparing means 7 compares the output of the counting means 4 with the value stored in the display end layer storage means 6, resets the counting means 4 at the time of coincidence, and resets the value of the display start layer storage means 5 Is loaded into the counting means 4.

The counting direction control means 8 is a means for controlling the counting direction of the counting means 4, that is, for specifying whether the counting direction is to be one of an ascending direction, a descending direction, and an alternate repetition of ascending and descending.

The display layer selecting means 9, according to the output of the counting means 4, converts the information of each layer parallel read from the frame memory 120 into information of a layer to be displayed for a pixel for which blinking display is designated as attribute information. Is a means for selecting If each display layer of the frame memory has 1 bit (binary image) per pixel, the display layer selection means is 1
A system may be used, but if each pixel is composed of a plurality of bits (multi-valued image), display layer selecting means is required by the number of bits.

FIG. 2 shows a specific circuit example of the embodiment of FIG.
Here, an example of a system having eight layers as a frame memory and four bits per pixel per layer (simultaneous display of 16 colors) is shown.

In this specific circuit example, the basic clock generation means 1
With the counter 101, the wavelength storage means 2 with the register 102, the first comparison means 3 with the comparator 103, the counting means 4 with the counter 104, the display start layer storage means 5 with the register 105, and the like.
The display end layer storage means 6 comprises a register 106, the second comparison means 7 comprises a comparator 107, the counting direction control means 8 comprises a counter 108, a multiplexer 110, a register 109, and the display layer selection means 9 comprises multiplexers 112, 113, 114, 115. The multiplexers 112, 113, 114, and 115 select information of a layer to be displayed according to the counter output of the counter 104 for a pixel having an attribute designated blinking from display information and attribute information of each layer read from the frame memory 120, and Is an 8-to-1 multiplexer.

The blinking control device shown in FIG. 2 includes a decoder 111, which decodes a signal on an address bus 131 of a host computer and gives a read / write instruction to each register. Each register is connected to the data bus 132 of the host computer.

 Next, the operation of the embodiment shown in FIG. 2 will be described.

The counter 101 is a vertical synchronization signal ( _Vsync ) for CRT display.
Is incremented. The register 102 stores the wavelength of the basic clock. The comparator 103 compares the counter output of the counter 101 with the register output of the register 102, and when they match, a signal for resetting the value of the counter 101 to 0 and a counter 104. Outputs the signal to be input to. As described above, the counter 101 generates a basic clock by dividing the frequency of the vertical synchronization signal, and sends the generated basic clock to the counter 104.
The counter 104 increments or decrements the basic clock from the counter 101 according to the output of the comparator 103.

The register 105 stores a value loaded to the counter 104 when the counter 104 is reset by the comparator 107, that is, an initial value at which the counter 104 starts counting.

On the other hand, the register 106 stores a value at which the counter 104 stops counting.

The comparator 107 compares the counter output of the counter 104 with the register output of the register 106, and when the outputs match, causes the counter 104 to load the value of the register 105.

The counter 108 is a one-bit counter that is incremented by the output of the comparator 107, and the output alternately changes each time a signal from the comparator 107 is received.

The register 109 includes a bit (bit A) for selecting whether the counter output transitions in a triangular waveform or a sawtooth waveform, and when the bit A is selected for the latter, the counting direction of the counter 104 is increased. This register is a two-bit register (bit B) for selecting whether to take in the downward direction.

The multiplexer 110 is a 2-to-1 multiplexer. The bit B of the register 109 and the output of the counter 108 are used as two inputs, and the input is used as a signal for selecting the counting direction of the counter 104 by the bit A of the register 109. Take or switch. The counter 104 is a multiplexer 1
The output direction of 10 controls the counting direction.

The output of the counter 104 is a multiplexer 112, 113, 114, 1
Entered in 15. These multiplexers are 8-to-1 multiplexers. Based on the parallel information of each layer read from the frame memory 120, information of a layer to be displayed is displayed for a pixel for which blinking display is designated as attribute information. select.

As described above, blinking can be realized by sequentially switching the display layers in a bitmap frame memory in which a plurality of memory layers for storing screen information are prepared.

The present invention allows any shape to be targeted for blinking by assigning one of a plurality of layers for storing screen information to attribute information for designating blinking display, thereby enabling blinking designation in units of one pixel. Because it becomes.

Also, in the present invention, the blinking display contents can be prepared by the number of memory layers prepared for display, so that if the number of display layers is increased, a free blinking form such as animation display can be adopted. It is possible. Also,
In accordance with the value of the wavelength storage means, it is possible to specify how many times (integer multiple) the cycle of the vertical synchronizing signal of the CRT performs the integer of the counting means, so that the speed at which the display content changes can be arbitrarily selected. Further, the counting direction control means specifies whether the counting direction of the counting means is to be ascending direction, descending direction, or alternately repeating ascending and descending.
The blinking display can be varied. One example of these is shown in FIG.

FIG. 3 (a) shows an example of a frame memory composed of four layers, and reference numeral 200 denotes an area designated as blinking. Third
FIG. 2B shows the display contents (indicating a circle 201) of each layer of the frame memory of FIG.

In such a frame memory, when counting in the ascending direction, the layers to be displayed are sequentially switched in the order of the first layer → the second layer → the third layer → the fourth layer → the first layer → the second layer, and circles are successively formed. It seems to rise.

When counting in the descending direction, the layer for displaying is the first layer.
The layers are sequentially switched from layer → fourth layer → third layer → second layer → first layer → fourth layer, and the circles appear to descend one after another.

Also, by repeating the counting in the ascending direction and the descending direction, the layer to be displayed becomes the first layer → the second layer → the third layer → the fourth layer → the third layer → the second layer → the first layer → the second layer. The layers are switched sequentially and the circle appears to move up and down.

As described above, the blinking mode changes depending on the counting direction.

〔The invention's effect〕

As described above, according to the present invention, it is possible to realize a blinking display including a plurality of display contents at an arbitrary cycle on an area of an arbitrary shape on an output screen of a computer.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram showing a specific circuit of the blinking control device of FIG. 1, and FIG. 3 is various blinking displays realized by the present invention. It is a figure showing an example of. DESCRIPTION OF SYMBOLS 1 ... Basic clock generation means 2 ... Wavelength storage means 3 ... First comparison means 4 ... Counting means 5 ... Display start layer storage means 6 ... Display end layer storage means 7 ... Second comparison means 8 ... Counting direction control means 9 ... Display layer selection means

Claims (1)

(57) [Claims] 1. A basic clock generating means for receiving a vertical synchronizing signal for CRT display, dividing the frequency and generating a basic clock, a wavelength storing means for storing a wavelength value of the basic clock, and a wavelength storing means. And a first comparing means for outputting a signal for resetting the basic clock generating means to 0 when the output values of the basic clock generating means coincide with each other, and counting the number of basic clocks according to the output of the first comparing means. Counting means for performing counting; display start layer storage means for storing a value to be loaded when the counting means is reset; display end layer storage means for storing a value indicating a display end layer; output of the counting means and display end layer Second comparing means for comparing the values stored in the storage means, resetting the counting means at the time of coincidence, and loading the value stored in the display start layer storage means into the counting means; Counting direction control means for controlling the number of layers to be displayed for the pixels for which blinking display is specified as attribute information from the parallel information of each layer read from the frame memory in accordance with the output of the counting means. A blinking control device comprising: display layer selecting means for selecting information.