JP2661219B2 - Pulse detection circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse detection circuit, and more particularly to a pulse detection circuit suitable for a video tape recorder (VTR) equipped with an amplification circuit and a peak level holding type noise elimination circuit. It relates to a detection circuit.

[Conventional technology]

Conventionally, this kind of pulse detection circuit has been constituted by an amplifier circuit 7, a peak clamp type noise elimination circuit 2, and a comparison circuit 3, as shown in FIG. 5 as an example.

Amplifier circuit 7 inputs an input signal V _I of small amplitude amplified by a predetermined amplification factor and outputs the amplified signal V _A.

Peak clamped noise reduction circuit 2, the amplified signal V _A as input, when exceeded the level of the hold signal V _H having a predetermined level characteristics with respect to the peak value (true signal component) The amplified signal V _A set the new hold signal V _H as well as transmitted to the output, holding the signal V _H amplification signal V _a does not exceed the level of the (noise) removes noise stops transmission to the output end, a peak clamp signal and outputs the V _PC.

Comparator circuit 3 inputs the peak clamp signal V _PC with a predetermined reference level V _R, the detection signal V _D converts the true signal component passed through the peak clamped noise elimination circuit 2 to the logic level Is output.

 Next, the operation of the pulse detection circuit will be described.

FIG. 6 and FIG. 7 are waveform diagrams of signals at various parts for explaining the operation of the pulse detection circuit.

The FIG. 6, the holding amplitude 5mV of the true signal component of the input signal V _I of small amplitude, the amplitude of the noise 1.58MV, also setting the amplification factor of the amplifying circuit 7 is 50 dB, the peak clamped noise elimination circuit 2 has the level characteristic signal V _H decreases slowly from the peak value, the reference level V _R of the comparison circuit 3 is 1V, further operating power supply voltages of all the circuits are 5V, example of the operating point voltage of 2.5V It is shown.

First, the amplitude of the input signal V _I is amplified by the amplifier circuit 7, the amplitude of the true signal component 1.58 V, the amplitude of the noise is obtained amplified signal V _A of 0.5V.

Next, noise in the amplified signal V _A is removed at the peak clamped noise reduction circuit 2, only the true signal component is obtained as a peak clamp signal V _PC.

Finally, the analog level of the peak clamp signal V _PC is converted into a logic level comparator circuit _3, the detection signal _VD can be obtained.

The FIG. 7, the true signal component amplitude of the input signal V _I is 25 mV,
6 shows an example in which the noise amplitude is 7.9 mV, and all other cases are the same as those in FIG.

Since the amplification factor of the amplifier circuit 1 is constant, the amplified signal V
_A means that the amplitude of the true signal component is saturated and the amplitude of the noise is 2.5V
become. Therefore, noise may appear in the detection signal V _D without ineffective peak clamping characteristics.

[Problems to be solved by the invention]

Conventional pulse detection circuit described above, since the amplification factor of the amplifying circuit 7 is constant, the amplitude of the input signal V _I increases, the true signal components beyond the levels of saturated and noise also hold signal V _H As a result, the peak clamp characteristic becomes ineffective and noise cannot be removed.

In particular, when this pulse detection circuit is applied to a playback control signal in a VTR, when high-speed playback is performed, that is, when the playback control signal frequency is high, the amplitude of the noise increases with the amplitude of the true signal component. May not be obtained.

An object of the present invention is to provide a pulse detection circuit that can remove noise even when the amplitude of an input signal increases.

[Means for solving the problem]

The pulse detection circuit of the present invention has a switchable amplification factor, and lowers the amplification factor when the upper limit comparison signal reaches the first level, and increases the amplification factor when the lower limit comparison signal reaches the second level. Amplifying the amplified signal and outputting the amplified signal as an amplified signal, and transmitting the amplified signal to an output terminal when the amplified signal of the variable amplifier circuit exceeds the level of a holding signal having a predetermined level characteristic, and newly generating the amplified signal by the amplified signal. Setting the holding signal, a noise removing circuit for stopping transmission of the amplified signal to the output terminal when the amplified signal is lower than the level of the holding signal, and setting the output signal of the noise removing circuit to a predetermined reference level. A comparison circuit for comparing and converting to a signal of a logic level, and an upper limit comparison circuit for setting the upper limit comparison signal to a first level when an amplified signal of the variable amplifier circuit is higher than an upper limit reference level , Amplified signal of the variable amplifier circuit and a lower limit comparing circuit for the lower limit comparison signal is lower than the lower limit reference level to a second level.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

The variable amplifying circuit 1 has a switchable amplification factor, and lowers the amplification factor when the upper limit comparison signal _VUC becomes the first high level, and amplifies when the lower comparison signal _VLC becomes the second low level. raising the rate to amplify the input signal V _I, amplified signal V _a
Is output. Peak clamped noise reduction circuit 2, as in the prior art, the amplified signal V _A is, output the amplified signal V _A when it exceeds the level of the hold signal level characteristics that gradually drops from the peak value (V _H) And the amplified signal V _A
, The holding signal (V _H ) is newly set, and when the amplified signal _VA is lower than the level of the holding signal (V _H ), the transmission of the amplified signal _{VA to} the output terminal is stopped to remove noise.

The comparison circuit 3 outputs the output signal of the peak clamp type noise removal circuit 2, that is, the peak clamp signal V
_PC is compared with a reference level (V _R ), and the peak clamp signal V _PC that has passed through the peak clamp type noise elimination circuit 2 is converted into a logical level and output as a detection signal V _D.

The upper limit comparing circuit 4 converts the amplified signal _VA into an upper limit reference level (V
_UR ), the first level, that is, a high level upper limit comparison signal _VUC is output when the amplified signal _VA is higher than the upper limit reference level (V _UR ).

The lower limit comparing circuit 5 converts the amplified signal _VA into a lower reference level (V
_LR ), and when the amplified signal _VA is lower than the lower reference level (V _LR ), the lower limit comparison signal becomes the second level lower.
Output V _LC .

 Next, the operation of this embodiment will be described.

FIG. 2 and FIG. 3 are waveform diagrams of signals of respective parts for explaining the operation of this embodiment.

The second figure, the amplitude of the true signal component of the input signal V _I of small amplitude is 25 mV, the amplitude of the noise is 7.9MV, also initialized amplification factor of the variable amplification circuit 1 is 50 dB, the peak-clamp denoising having levels characteristic hold signal V _H circuit 2 decreases slowly from the peak value, the reference level is 1V comparison circuit 3, a reference level V _UR is 2V upper comparator circuit 4, further operating power for all circuits An example in which the voltage is 5 V and the operating point voltage is 2.5 V is shown.

First, the amplitude of the input signal V _I is amplified by the variable amplifier 1, the amplifier signal V _A -1 amplitude of the noise reaches the amplitude saturation level of the true signal component composed 2.5V, that is, the peak value 5.0V
Is obtained.

Therefore, a high-level pulse of the upper limit comparison signal _VUC is output from the upper limit comparison circuit 4, and the amplification factor of the variable amplifier circuit 1 is switched to 35 dB. In conjunction with this, the amplitude of the amplified signal V _A is true signal component 1.4V, the amplitude of the noise is changed to the amplified signal V _A -2 of 0.44V.

Then, the noise in the amplified signal V _A -2 is removed by a peak clamped noise reduction circuit 2, only the true signal component is obtained as a peak clamp signal V _PC.

Finally, the analog level of the peak clamp signal V _PC is converted into a logic level comparator circuit 3, the detection signal V _D is obtained.

The Figure 3, 5 mV true signal component of the input signal V _I is the amplitude of the noise is 1.58MV, also the initial amplification factor of the variable amplification circuit 1 is set to 35 dB, the reference level of the lower limit comparing circuit 5 V
FIG. 2 shows an example in which _LR is 1 V and all other cases are the same as those in FIG.

In this case, the amplified signal _VA- 3 has a true signal component amplitude.
0.28V, the noise amplitude is 0.089V.

For this reason, since no pulse is output to the lower limit comparison signal _VLC, which is at a low level, the amplification factor of the variable amplifier circuit 1 is switched to 50 dB.

As a result, the amplitude of the amplified signal _VA is 1.58.
V, the amplitude of the noise changes to an amplified signal _VA- 4 of 0.5V.

Then, the noise in the amplified signal V _A -4 is removed at the peak clamped noise reduction circuit 2, only the true signal component is obtained as a peak clamp signal V _PC, the peak clamp signal V _PC is the comparison circuit 3 detection signal V _D is converted to the logical level is obtained.

As described above, in the case of a low level at which no pulse is output to the lower limit comparison signal _VLC , the amplification factor is increased and the upper limit comparison circuit V _UC
When the pulse is output to a high level and the amplification level is reduced, the peak clamp characteristic always acts on the noise, thereby removing the noise and detecting only the true signal component.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

This embodiment uses a peak hold type noise elimination circuit 6 as a noise elimination circuit. The first embodiment includes operations, effects, etc., except that the level of a held signal is held at a constant value and noise is eliminated. Is the same as

〔The invention's effect〕

As described above, the present invention reduces the gain of the variable amplifier circuit when the level of the output signal of the variable amplifier circuit is higher than the upper reference level, and increases the gain of the variable amplifier circuit when the output signal level is lower than the lower reference level. By amplifying the input signal and transmitting it to the peak level holding type noise elimination circuit, always input a signal within the effective range of the noise elimination characteristics to the noise elimination circuit even if the level of the input signal fluctuates greatly. Thus, there is an effect that noise can be surely removed.

In particular, when the present invention is applied to a pulse detection circuit of a reproduction control signal in a VTR, high-speed reproduction, that is, even when the reproduction control signal frequency is high, noise can be removed and only a true signal component can be detected. Good tracking characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIG.
FIGS. 3A and 3B are waveform diagrams of signals of respective parts for explaining the operation of the embodiment shown in FIG. 1, FIG. 4 is a block diagram showing a second embodiment of the present invention, and FIG. FIG. 6 and FIG. 7 are waveform diagrams of signals of respective parts for explaining the operation of the pulse detection circuit shown in FIG. DESCRIPTION OF SYMBOLS 1 ... Variable amplification circuit, 2 ... Peak clamp type noise elimination circuit, 3 ... Comparison circuit, 4 ... Upper limit comparison circuit, 5 ... Lower limit comparison circuit, 6 ... Peak hold type noise elimination circuit, 7
…… Amplifier circuit.

Claims (1)

(57) [Claims] 1. An input signal having a switchable amplification factor, wherein the amplification factor is decreased when the upper limit comparison signal is at a first level, and the amplification factor is increased when the lower limit comparison signal is at a second level. A variable amplifier circuit that outputs the amplified signal as an amplified signal; and when the amplified signal of the variable amplifier circuit exceeds a level of a holding signal having a predetermined level characteristic, the amplified signal is transmitted to an output terminal, and the holding signal is newly generated by the amplified signal. A noise removal circuit that stops transmission of the amplified signal to the output terminal when the amplified signal is lower than the level of the holding signal; and compares the output signal of the noise removal circuit with a predetermined reference level to determine a logic level. A comparison circuit that converts the signal into a level signal; an upper limit comparison circuit that sets the upper limit comparison signal to a first level when an amplified signal of the variable amplifier circuit is higher than an upper limit reference level; Pulse detection circuit; and a lower limit comparing circuit for amplifying the signal of the circuit to the lower limit comparison signal is lower than the lower limit reference level to a second level.