JP2661343B2 - Image special effect device and address generating circuit for image special effect device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an image for obtaining a special effect image by performing coordinate transformation of image information by controlling a writing and reading address of a television video signal to an image storage. The present invention relates to a special effect device and an address generating circuit for an image special effect device.

[Related Art] In recent years, with the digitization of television signals, various devices for obtaining special effects, such as combining a plurality of images in a mosaic pattern, have been developed for various types of broadcasting equipment. In such a television video signal special effect device, a desired special effect is produced by controlling a write address and a read address for an image storage for storing image information.

FIG. 5 is a block diagram showing a configuration of a conventional television video signal special effect device.

The input video signal V _IN input from the video input terminal IN is A
It is supplied to the / D converter 17 and the timing pulse generator 24. The A / D converter 17 receives the input analog video signal V
And outputs a video signal V _D digital and digitally encoded signal in accordance with a clock signal CK, which will be described later _IN. Timing pulse generator 24, the clock signal CK as a reference of processing the input video signal V _IN, the horizontal sync pulse P _H and generating output vertical sync pulse P _V corresponding to the horizontal sync and vertical sync of the video signal V _IN I do.

Video signal V _D from the A / D converter 17 is supplied to the image storage unit 18. Write address to this image storage 18
_AW and read address _AR are provided from a write address generator 19 and a read address generator 20, respectively.

The write address generator 19 includes a horizontal address generator 26 and a vertical address generator as shown in FIG. 6, for example.
It consists of 27. Horizontal address generator 26 is reset by the horizontal synchronizing pulse P _H, a clock counter for counting the clock signal CK. Also a vertical address generator
27 is reset by the vertical synchronizing pulse P _V, a horizontal sync pulse counter for counting the horizontal synchronizing pulse P _H.

The read address generator 20 also includes a horizontal address generator 29 similar to the write address generator 19 and a vertical address generator 30, for example, as shown in FIG. However, this read address generator 20
In addition, function generators 31 and 32 for performing address conversion for generating special effects, and read address comparators 33 and 34 for specifying the effective range of the video signal include horizontal and vertical It is provided with the respective read address a _R and scope indication signal S _V to perform a desired coordinate transformation by these are generated output.

Video signal V _R which is read from the image storage unit 18 is input to the background adder 21. The background adder 21 outputs the video signal V _R
Hand, adds a background in accordance with the effective range indication signal S _V.
The output of the background adder 21 is D / A converted by the D / A converter 22, after the synchronization signal by the synchronization signal adder 23 is added, from the output terminal OUT as a television video signal V _OUT after conversion It is output.

Next, the operation of the special effect device configured as described above will be described.

The input video signal V _IN is encoded into a digital signal by the A / D converter 17. Video signal V _D output from the A / D converter 17 is written into the image memory 18 according to a write address A _W output from the write address generator 19, it is stored until the next field.

Video signal V _D which is written in the image memory 18 is sequentially read according to the read address A _R, which is the coordinate transformation are output from the read address generator 20. The read image signal V _R, the background adder 21, the background is added in accordance with the effective range indication signal S _V output from the read address generator 20. The output of the background adder 21 is D / A
Decoded by the transducer 22, it is outputted further is added sync signal S _S for a synchronous signal adder 23 are supplied from the video input terminal IN, the output terminal OUT as a regular television picture signal V _OUT.

[Problems to be Solved by the Invention] However, in the conventional image special effect device described above, the read address for generating the special effect image is generated by the function generator in the read address generator, and the generated read address is generated. The effective range of the video signal is determined by comparing the read address with a predetermined constant using a read address comparator. Therefore, if you want to apply special effects only to the area where the video signal exists,
That is, even when the effective range of the video signal is not changed by the address conversion, a means for comparing the range of the generated read address is required, and the circuit scale of the entire read address generator becomes large and the processing becomes complicated. There is a problem that becomes.

The present invention has been made in view of such a problem, and an image special effect device capable of obtaining a special effect in which an effective range of an address does not fluctuate by simple means and reducing a circuit scale. And an address generating circuit for an image special effect device.

[Means for Solving the Problems] An image special effect device according to the present invention includes an A / D converter that encodes an analog video signal and outputs an encoded video signal;
An image storage device for storing the encoded video signal output from the A / D converter for at least one image, generating a write address and a read address for the image storage device and converting these addresses into a predetermined conversion function; An address generation circuit that obtains a special effect of the image by performing conversion based on the D / A conversion that decodes the encoded video signal read from the image storage device into an analog video signal in accordance with a read address from the address generation circuit; The address generating circuit generates a pre-conversion write address based on a horizontal synchronizing signal and a vertical synchronizing signal included in the analog video signal and a clock signal generated by these signals. A write address generator, a fixed value generator for generating a predetermined fixed value, An adder for adding the pre-conversion write address output from the write address generator and the output of the fixed value generator; converting the output of the adder according to a predetermined conversion function; And an address converter that outputs the write address as a write address.

[Operation] According to the present invention, the pre-conversion write address is added to the fixed value from the fixed value generator, and a predetermined conversion process is performed on the addition result by the address converter to write the data to the image storage. An address is generated. Therefore, by arbitrarily setting the fixed value of the fixed value generator and the conversion function of the address converter, it is possible to obtain an arbitrary special effect image having no change in the effective range on the writing side.

Therefore, according to the present invention, for a special effect image that does not involve complicated coordinate conversion, a special effect image can be obtained by an operation on the writing side using an address conversion circuit having an extremely simple circuit configuration.

Embodiment An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a block diagram of a television video signal special effect image according to the embodiment of the present invention.

The input video signal V _IN input from the video input terminal IN is A
/ D converter 1 and timing pulse generator 2. The A / D converter 1 receives the analog video signal V
And outputs a video signal V _D digital and digitally encoded signal in accordance with a clock signal CK, which will be described later _IN. Timing pulse generator 2, and the clock signal CK as a reference of processing the input video signal V _IN, the horizontal sync pulse P _H and a vertical synchronizing pulse P _V corresponding to the horizontal synchronizing signal and a vertical synchronizing signal of the video signal V _IN Generate and output.

Video signal V _D from the A / D converter 1 is supplied to the image storage unit 12. Write address to this image storage 12
_AWF is provided through the following means.

That is reset by the horizontal synchronizing pulse P _H, a clock counter 3 for counting the clock signal CK, a vertical synchronizing pulse P _V
In reset, is provided with a horizontal sync pulse counter 4 for counting the horizontal synchronizing pulse P _H, it constitutes a write address generator 5. The pre-conversion write address A _WH output from the clock counter 3 of the write address generator 5 and the pre-conversion write address A _WV output from the horizontal synchronization pulse counter 4 are one of the adders 8 and 9, respectively. Input to the input terminal. The other input terminals of the adders 8 and 9 receive the fixed values C _H and C _V from the fixed value generators 6 and 7, respectively.
Is given. The outputs of the adders 8, 9 are supplied to address converters 10, 11, respectively. Address translator 10,
11 performs address conversion by the conversion functions f _TH , f _TV on the addresses offset by the fixed values C _H , C _V by the adders 8, 9 to generate write addresses A _FH , A _FV for the image storage 12. And output. The read address A _R for the image storage device 12, are provided from the read address generator 13. Read address generator 13 also outputs the effective range indication signal S _V.

Video signal V _R which is read from the image storage unit 18 is input to the background adder 14. The background adder 14 outputs the video signal V _R
Hand, adds a background in accordance with the effective range indication signal S _V.
The output of the background adder 14 is a D / A converter at D / A converter 15, after the synchronization signal by the synchronization signal adder 16 is added, the output terminal as a television video signal V _OUT after conversion OUT Is output from

Next, the operation of the thus configured device will be described.

The input video signal V _IN is encoded by the A / D converter 1 into a digital signal. On the other hand, the timing pulse generator 2
When the clock signal CK outputted, the horizontal sync pulse P _H and re straight synchronizing pulse P _V is input to the clock counter 3 and the horizontal synchronizing pulse counter 4, the write address generator 5
Outputs the pre-conversion write addresses A _WH and A _WV . These pre-conversion write addresses A _WH , A _WV are added to the fixed values C _H , C _V from the fixed value generators 6, 7 in adders 8, 9, respectively. The added values A _WH + C _H , A _WV C _V are used as address converters 10 and 11
Is input to

In the address converters 10 and 11, the address conversion function f _TH ,
f Output addresses A _FH and A _FV converted by _TV . This is the write address _AWF of the image storage device 12.

According to such write address A _WF generated in the video signal V _D output from the A / D converter 1 is written in the image storage unit 12 and stored until the next field.

Then, the video signal V _R read from the image storage unit 12 in accordance with the read address A _R output from the read address generator 13, based on the effective range indication signal S _V output from the read address generator 13 The background is added by the background adder 14. Further, the output of the background adder 14 is D / A
Decoded by the transducer 15, is added to the synchronization signal S _S is supplied from the video input terminal IN by the synchronization signal adder 16, is output from the output terminal OUT becomes a regular television picture signal V _OUT.

The clock signal CK and the horizontal synchronizing pulse P generated from the input video signal V _IN by the timing pulse generator 2
_H and vertical synchronizing pulses P _V is used for synchronization of the blocks is performed digital processing, including write and read address generator 5 and 13 in Figure 1.

2 to 4 show examples of special effects by the television video signal special effect device according to this embodiment. FIG. 2 shows an input video signal, and FIG. 3 shows a conversion in an address converter. function f _T, FIG. 4 is a diagram showing s husband special effects sample output from the conversion function f _T of Figure 3.

In this example, the horizontal effective period a _h of the input video signal shown in FIG.
Respect, the function f _T which performs address translation as in the third diagram,
It is provided in an address converter 10 for horizontal write addresses. Here, when the fixed value generator 6 for the horizontal write address generates a fixed value C _H , the horizontal address A _WH becomes C _H
Although _H offset, when the conversion by the conversion function f _T shown in FIG. 3, the write address A _FH after the conversion, since all are in the horizontal effective in period a _h, images will not be missing . That is, the effective range is not changed by the address conversion.

In this case, as shown in FIG. 4, a special effect in which the input image slides to the right can be obtained. The slide amount can be a fixed value generator 6 is varied by the amount of the fixed value C _H generated.

[Effects of the Invention] As described above, according to the present invention, after adding to the fixed value from the pre-conversion write address fixed value generator,
By performing a predetermined conversion process on the addition result, a write address for the image storage is generated, so that the fixed value of the fixed value generator and the conversion function of the address converter can be arbitrarily set. By doing so, it is possible to obtain an arbitrary special effect image having no change in the effective range with a very simple circuit configuration. For this reason, the circuit scale can be simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram of a television video signal special effect device according to an embodiment of the present invention, FIGS. 2 to 4 are diagrams for explaining the operation of the device, and FIG. FIG. 3 is a graph showing a conversion function in an address converter, FIG. 4 is a schematic showing a special effect image obtained by the apparatus, and FIG. 5 is a conventional television video signal special effect. FIG. 6 is a block diagram of a write address generator in the device, and FIG. 7 is a block diagram of a read address generator in the device. 1,17; A / D converter, 2,24; Timing pulse generator, 3; Clock counter, 4; Horizontal sync pulse counter, 5,19; Write address generator, 6,7; Fixed value generator , 8,9; adder, 1
0,11; Address converter, 12,18; Image storage, 13,20; Read address generator, 14,21; Background adder, 15,22; D / A converter, 16,23; Synchronization signal addition Units, 26, 29; horizontal address generator, 27, 30; vertical address generator, 31, 32; function generator, 3
3,34; read address comparator

Claims (2)

(57) [Claims] An A / D converter for encoding an analog video signal and outputting an encoded video signal, and an image storage for storing at least one encoded video signal output from the A / D converter. An address generating circuit for generating a write address and a read address for the image storage and converting these addresses based on a predetermined conversion function to obtain a special effect of an image; and reading from the address generating circuit. A D / A converter that decodes the encoded video signal read from the image storage device into an analog video signal according to the address, wherein the address generation circuit includes a horizontal signal included in the analog video signal. The pre-conversion write address is determined based on the synchronization signal and the vertical synchronization signal and the clock signal generated by these signals. A write address generator for forming a fixed value generator for generating a predetermined fixed value, an adder for adding the output of the fixed value generator conversion before write address output from the write address generator,
An image converter for converting the output of the adder according to a predetermined conversion function and outputting the conversion result as a write address to the image storage. 2. An image special effect device address generating circuit for generating and outputting write and read addresses to and from an image memory of an image special effect device, wherein a horizontal synchronizing signal and a vertical synchronizing signal included in an analog video signal and these signals are provided. A write address generator that generates a pre-conversion write address based on a clock signal generated by the generator, a fixed value generator that generates a predetermined fixed value, a pre-conversion write address output from the write address generator, It has an adder for adding the output of the fixed value generator, and an address converter for converting the output of the adder according to a predetermined conversion function and outputting the conversion result as a write address to the image storage. An address generation circuit for an image special effect device, comprising: