JP2737264B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2737264B2 JP2737264B2 JP1169466A JP16946689A JP2737264B2 JP 2737264 B2 JP2737264 B2 JP 2737264B2 JP 1169466 A JP1169466 A JP 1169466A JP 16946689 A JP16946689 A JP 16946689A JP 2737264 B2 JP2737264 B2 JP 2737264B2
- Authority
- JP
- Japan
- Prior art keywords
- microwave
- input
- signal
- semiconductor device
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
Landscapes
- Semiconductor Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特に論理回路又はメモリ
ー回路の少なくとも一方を有する半導体装置に関する。Description: TECHNICAL FIELD The present invention relates to a semiconductor device, and more particularly to a semiconductor device having at least one of a logic circuit and a memory circuit.
従来、論理回路とメモリー回路の少なくとも一方を有
する半導体装置は、第2図(a)の平面図のように、各
セル21の電源入力部22,信号の入力部23及び出力部24が
配線でチップ25の端部に設けられた電極パッドまで引き
出され、該半導体装置を搭載する基板の接続のために、
例えばワイヤーボンディングやバンプ接続等の機械的な
工程が施されていた。また、複数の前記半導体装置より
成る系における対をなす入力部と出力部は、金属配線に
より接続されており、系としての電源入力部,信号の入
力部,出力部は、第2図(b)の平面図のように、複数
の前記半導体装置が搭載された基板26の各辺に配置され
た電極パッド27まで配線で引き出されていた。Conventionally, in a semiconductor device having at least one of a logic circuit and a memory circuit, as shown in the plan view of FIG. 2A, a power supply input section 22, a signal input section 23, and an output section 24 of each cell 21 are formed by wiring. It is pulled out to the electrode pad provided at the end of the chip 25, and for connection of the substrate on which the semiconductor device is mounted,
For example, mechanical processes such as wire bonding and bump connection have been performed. A pair of an input unit and an output unit in a system including a plurality of the semiconductor devices are connected by metal wiring, and a power supply input unit, a signal input unit, and an output unit as the system are configured as shown in FIG. As shown in the plan view of (2), the wiring is led out to the electrode pads 27 arranged on each side of the substrate 26 on which the plurality of semiconductor devices are mounted.
上述した従来の論理回路またはメモリー回路の少なく
とも一方を有する半導体装置は、入力部,出力部が配線
によって電極パッドまで引き出されているため、配線系
の抵抗,容量に帰因する信号伝搬遅延時間が大きくな
り、前記論理回路またはメモリー回路の動作速度が、信
号が配線系を伝搬する間に遅くなってしまうという欠点
がある。In the semiconductor device having at least one of the above-described conventional logic circuit and memory circuit, since the input portion and the output portion are extended to the electrode pads by wiring, the signal propagation delay time attributed to the resistance and capacitance of the wiring system. There is a disadvantage that the operating speed of the logic circuit or the memory circuit is reduced while the signal propagates through the wiring system.
また、該半導体装置とこれを搭載する基板との間の結
線には、例えばアルミニウムのワイヤーボンディングや
バンプ接続等の機械的な工程が施され、歩留りが悪くな
る原因となっている。In addition, a mechanical process such as aluminum wire bonding or bump connection is applied to the connection between the semiconductor device and the substrate on which the semiconductor device is mounted, which causes a reduction in yield.
さらに、該半導体装置を搭載する基板は、高密度への
要求から多層配線が施されているものがあるが、この多
層配線に電流が流れる際のジュール熱による温度上昇に
より配線寿命の低下が起こるという欠点がある。さら
に、放熱性向上の目的で、金配線を施したセラミックス
基板等が用いられるが、これを用いるとコストが高くつ
くという欠点がある。Further, some substrates on which the semiconductor device is mounted are provided with multilayer wiring in order to meet the demand for high density. However, the wiring life is shortened due to a rise in temperature due to Joule heat when current flows through the multilayer wiring. There is a disadvantage that. Further, for the purpose of improving heat dissipation, a ceramic substrate or the like provided with gold wiring is used, but the use of such a ceramic substrate has a disadvantage that the cost is high.
また、複数の前記半導体装置により成り、全体で一つ
の機能を有する系における対をなす入力部と出力部との
間は、金属配線が施されており、配線系の抵抗,容量に
帰因する信号伝搬遅延時間が大きくなり、系としての動
作速度が遅くなるという欠点がある。Further, a metal wiring is provided between a pair of an input unit and an output unit in a system having a plurality of semiconductor devices and having one function as a whole, and is attributed to the resistance and capacitance of the wiring system. There is a disadvantage that the signal propagation delay time increases and the operation speed of the system decreases.
本発明は論理回路またはメモリー回路の少なくとも一
方を有する半導体装置において、入力部にマイクロ波受
信機能を有し出力部にマイクロ波送信機能を有する複数
の前記半導体装置の一つを基板上に配置し、同一マイク
ロ波周波数で定義される前記入力部と出力部との対を複
数対設け、この複数対の各々に異なったマイクロ波周波
数を割り当て、この割り当てられたマイクロ波周波数で
前記半導体装置間の信号伝達を行い、前記基板全体で一
つの信号伝達機能を有する系を構成した半導体装置であ
る。According to the present invention, in a semiconductor device having at least one of a logic circuit and a memory circuit, one of a plurality of the semiconductor devices having a microwave receiving function at an input portion and a microwave transmitting function at an output portion is arranged on a substrate. A plurality of pairs of the input unit and the output unit defined by the same microwave frequency are provided, and different microwave frequencies are assigned to each of the plurality of pairs. A semiconductor device that transmits signals and forms a system having one signal transmission function on the entire substrate.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図(a),(b)は本発明の一実施例であり、各
々半導体装置の平面図及び複数の前記半導体装置からな
り全体で一つの機能を有する系の平面図である。1 (a) and 1 (b) show an embodiment of the present invention, and are a plan view of a semiconductor device and a plan view of a system including a plurality of the semiconductor devices and having one function as a whole.
第1図(a)に示すように、チップ1上にはセル2、
電源用の電極パッド3、及び電源配線4が配置されてい
る。各々のセル2は電源入力部5,信号入力部6,信号出力
部7を有している。各セル2への電源の供給は、チップ
1上の電源用の電極パッド3に接続された電源配線4を
通して電極入力部5に入れれ行なわれる。各信号入力部
6には、マイクロ波受信回路が接続されており、他のセ
ル、又は同じ系の中のチップの出力部から送信されたマ
イクロ波を受信し、入力信号に変換する機能を有する。
各信号出力部7には、マイクロ波送信回路が接続されて
おり、出力信号をマイクロ波に変換し、他のセル、又は
同じ系の中の他のチップの入力部に向けて送信する機能
を有する。As shown in FIG. 1 (a), a cell 2 is provided on a chip 1,
A power supply electrode pad 3 and a power supply wiring 4 are arranged. Each cell 2 has a power input 5, a signal input 6, and a signal output 7. Power is supplied to each cell 2 through an electrode input section 5 through a power supply wiring 4 connected to a power supply electrode pad 3 on the chip 1. Each signal input unit 6 is connected to a microwave receiving circuit, and has a function of receiving a microwave transmitted from another cell or an output unit of a chip in the same system and converting it to an input signal. .
Each signal output unit 7 is connected to a microwave transmission circuit, and has a function of converting an output signal into a microwave and transmitting the microwave to another cell or an input unit of another chip in the same system. Have.
第1図(b)において、基板8上には複数の前述の半
導体装置であるチップ1,1a等、系の電源用電極パッド
9、系の入力用電極パッド10、及び系の出力用電極パッ
ド11が搭載されている。系の電源は、系の外部より系の
電源線12により系の電源用電極パッド9に入り、系内を
縦横に張り巡らされた系の電源配線13を通して各チップ
1,1a等に供給されている。系内のチップ間、又は同じチ
ップ内のセル間の信号伝達は、前述のように、同じ周波
数で定義された一対の信号入力部6aと信号出力部7aの間
のマイクロ波伝搬により行ない、各々の信号入力部6a及
び信号出力部7aに対し、各々異なったマイクロ波周波数
が割り当てられている。信号入力部6a,6b,信号出力部7
a,7bは、系内の任意の位置に配置できる。In FIG. 1 (b), a plurality of semiconductor devices, such as chips 1, 1a, etc., a system power supply electrode pad 9, a system input electrode pad 10, and a system output electrode pad are provided on a substrate 8. 11 is installed. The system power is supplied from the outside of the system to the system power supply electrode pad 9 by the system power supply line 12, and the power is supplied to each chip through the system power supply wiring 13 laid vertically and horizontally in the system.
1, 1a etc. Signal transmission between chips in the system or between cells in the same chip is performed by microwave propagation between a pair of signal input units 6a and signal output units 7a defined at the same frequency, as described above. Different microwave frequencies are assigned to the signal input unit 6a and the signal output unit 7a. Signal input section 6a, 6b, signal output section 7
a and 7b can be arranged at any position in the system.
系の外部より系内のへの入力信号は、基板8の周辺に
配置された系の入力用電極パッド10に外部配線14を通し
て入り、同じく基板8の各辺に設けられた系の入力用マ
イクロ波送信回路15へ配線上を伝わって送られ、ここで
マイクロ波に変換され、系内のセルに送信される。ま
た、系の内から外部への出力信号は、系内のセルからマ
イクロ波により送信され、基板8の各辺に設けられた系
の出力用マイクロ波受信回路16へと伝わり、ここで電気
信号に変換され、基板8の各辺に設けられた系の出力用
電極パッド11へ配線上を伝わり、外部配線14aを通して
系の外部へと伝えられる。An input signal from the outside of the system to the inside of the system enters through the external wiring 14 into the input electrode pad 10 of the system arranged around the substrate 8, and the input micro pad of the system similarly provided on each side of the substrate 8. The signal is transmitted to the wave transmitting circuit 15 on the wiring, is converted into a microwave, and is transmitted to cells in the system. An output signal from the inside of the system to the outside is transmitted by microwaves from the cells in the system, transmitted to the microwave receiving circuit 16 for the system provided on each side of the substrate 8, where the electric signal is transmitted. Is transmitted to the output electrode pad 11 of the system provided on each side of the substrate 8 on the wiring, and is transmitted to the outside of the system through the external wiring 14a.
対をなす系の入力用マイクロ波送信回路15と系内のチ
ップ上の信号入力部6cは同一の周波数で定義され、また
各々の系の入力用マイクロ波送信回路15と系内のチップ
上の信号入力部6cの対には、各々異なったマイクロ波周
波数が割り当てられている。同様に、対をなす系の出力
用マイクロ波受信回路16と系内のチップ上の信号出力部
7cは同一の周波数で定義され、また各々の系の出力用マ
イクロ波受信回路16と系内のチップ上の信号出力部7cの
対には、各々異なったマイクロ波周波数が割り当てられ
ている。The input microwave transmission circuit 15 of the paired system and the signal input unit 6c on the chip in the system are defined at the same frequency, and the input microwave transmission circuit 15 of each system and the Different microwave frequencies are assigned to pairs of the signal input sections 6c. Similarly, the output microwave receiving circuit 16 of the paired system and the signal output unit on the chip in the system
7c are defined by the same frequency, and different microwave frequencies are assigned to the pair of the output microwave receiving circuit 16 of each system and the signal output unit 7c on the chip in the system.
チップ1,1a等は基板に接着するだけでよい。また発熱
量が少ないので、基板材料としてセラミック等の高価な
ものを使用する必要がない。The chips 1, 1a, etc. need only be adhered to the substrate. Further, since the calorific value is small, it is not necessary to use an expensive material such as ceramic as a substrate material.
マイクロ波受信回路,マイクロ波送信回路としては、
IMPATTやガンダイオード等を用いた回路を使用する。ま
た、マイクロ波が系の外部へ漏れないよう系全体の金属
で遮蔽する。As microwave receiving circuit and microwave transmitting circuit,
Use a circuit that uses IMPATT or Gunn diode. Also, shield the entire system with metal so that microwaves do not leak out of the system.
以上説明したように本発明は、論理回路またはメモリ
ー回路の少なくとも一方を有する半導体装置において、
入力部にマイクロ波受信機能を有し、出力部にマイクロ
波送信機能を有し、かつ複数の半導体装置より成り全体
で一つの機能を有する系における同一周波数で定義され
た一対の入力部と出力部の各々に対して、各々異なった
マイクロ波周波数が割り当てられていることにより、入
力信号をチップ上の任意の位置に与え且つ出力信号をチ
ップ上に任意の位置から取り出すことができ、従来の電
極パッドと入出力部の間の配線での信号伝搬遅延がなく
なるという効果がある。As described above, the present invention relates to a semiconductor device having at least one of a logic circuit and a memory circuit,
The input unit has a microwave receiving function, the output unit has a microwave transmitting function, and a pair of input units and outputs defined by the same frequency in a system including a plurality of semiconductor devices and having one function as a whole. By assigning different microwave frequencies to each of the units, an input signal can be applied to any position on the chip and an output signal can be extracted from any position on the chip. There is an effect that the signal propagation delay in the wiring between the electrode pad and the input / output unit is eliminated.
また、半導体装置とこれを搭載する基板との間の結線
は電源線だけでよく、工程が簡単となり歩留りが向上す
る効果がある。In addition, the connection between the semiconductor device and the substrate on which the semiconductor device is mounted only needs to be a power supply line, which has the effect of simplifying the process and improving the yield.
さらに、配線系を電流が流れる際のジュール熱による
配線寿命の低下は少なくなり、また熱放散のためのセラ
ミック基板等を使用しなくてもよく、コストが安くなる
効果がある。Further, a reduction in the wiring life due to Joule heat when a current flows through the wiring system is reduced, and a ceramic substrate or the like for dissipating heat does not need to be used, so that the cost is reduced.
また、複数の半導体装置より成り全体で一つの機能を
有する系において、対をなす入力部と出力部の間の信号
伝搬遅延がなくなるという効果がある。Further, in a system including a plurality of semiconductor devices and having one function as a whole, there is an effect that a signal propagation delay between a paired input unit and output unit is eliminated.
第1図(a),(b)はそれぞれ本発明の一実施例の平
面図、第2図(a),(b)はそれぞれ従来の半導体装
置の平面図である。 1,1a……チップ、2……セル、3……電源用の電極パッ
ド、4……電源配線、5……電源入力部、6,6a,6b,6c…
…信号入力部、7,7a,7b,7c……信号出力部、8……基
板、9……系の電源用電極パッド、10……系の入力用電
極パッド、11……系の出力用電極パッド、12……系の電
源線、13……系の電源配線、14,14a……外部配線、15…
…系の入力用マイクロ波送信回路、16……系の出力用マ
イクロ波受信回路、21……セル、22……電源入力部、23
……信号入力部、24……出力部、25,25a……チップ、26
……基板、27……電極パッド。1 (a) and 1 (b) are plan views of an embodiment of the present invention, and FIGS. 2 (a) and 2 (b) are plan views of a conventional semiconductor device. 1,1a chip, 2 cells, 3 electrode pads for power, 4 power wiring, 5 power input, 6, 6a, 6b, 6c
... Signal input part, 7,7a, 7b, 7c ... Signal output part, 8 ... Substrate, 9 ... System power electrode pad, 10 ... System input electrode pad, 11 ... System output Electrode pad, 12 ... Power line for system 13, Power line for system 13, 14, 14a External wiring, 15
... System input microwave transmission circuit, 16 ... System output microwave reception circuit, 21 ... Cell, 22 ... Power input section, 23
…… Signal input section, 24 …… Output section, 25, 25a …… Chip, 26
... board, 27 ... electrode pads.
Claims (1)
一方を有する半導体装置において、入力部にマイクロ波
受信機能を有し出力部にマイクロ波送信機能を有する複
数の前記半導体装置を一つの基板上に配置し、同一マイ
クロ波周波数で定義される前記入力部と出力部との対を
複数対設け、この複数対の各々に異なったマイクロ波周
波数を割り当て、この割り当てられたマイクロ波周波数
で前記半導体装置間の信号伝達を行い、前記基板全体で
一つの信号伝達機能を有する系を構成したことを特徴と
する半導体装置。In a semiconductor device having at least one of a logic circuit and a memory circuit, a plurality of semiconductor devices having a microwave receiving function at an input portion and a microwave transmitting function at an output portion are arranged on one substrate. A plurality of pairs of the input unit and the output unit defined by the same microwave frequency are provided, and different microwave frequencies are assigned to each of the plurality of pairs. A semiconductor device having a single signal transmission function for the entire substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169466A JP2737264B2 (en) | 1989-06-29 | 1989-06-29 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169466A JP2737264B2 (en) | 1989-06-29 | 1989-06-29 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0334359A JPH0334359A (en) | 1991-02-14 |
| JP2737264B2 true JP2737264B2 (en) | 1998-04-08 |
Family
ID=15887087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1169466A Expired - Fee Related JP2737264B2 (en) | 1989-06-29 | 1989-06-29 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2737264B2 (en) |
-
1989
- 1989-06-29 JP JP1169466A patent/JP2737264B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0334359A (en) | 1991-02-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |