JP2774403B2 - Method of forming bump electrodes - Google Patents
Method of forming bump electrodesInfo
- Publication number
- JP2774403B2 JP2774403B2 JP3296057A JP29605791A JP2774403B2 JP 2774403 B2 JP2774403 B2 JP 2774403B2 JP 3296057 A JP3296057 A JP 3296057A JP 29605791 A JP29605791 A JP 29605791A JP 2774403 B2 JP2774403 B2 JP 2774403B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor substrate
- substrate
- film
- resist film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 8
- 239000000758 substrate Substances 0.000 claims description 60
- 239000004065 semiconductor Substances 0.000 claims description 24
- 239000007772 electrode material Substances 0.000 claims description 19
- 239000010953 base metal Substances 0.000 claims description 10
- 238000005520 cutting process Methods 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 7
- 238000007747 plating Methods 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 claims 1
- 238000001444 catalytic combustion detection Methods 0.000 description 20
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 15
- 239000002184 metal Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は赤外線センサ等の光検出
素子を1次元、或いは2次元的に配列した半導体基板、
またはCCD等の信号処理素子を1次元、或いは2次元
的に配列した半導体基板等に形成する突起電極の形成方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate in which light detecting elements such as infrared sensors are arranged one-dimensionally or two-dimensionally.
Alternatively, the present invention relates to a method for forming a protruding electrode for forming a signal processing element such as a CCD on a semiconductor substrate or the like in which one-dimensional or two-dimensional array is provided.
【0002】[0002]
【従来の技術】従来から行われている突起電極の形成方
法の概略を図5に基づいて説明する。まず、半導体基板
30の表面にメッキ電極用の下地金属膜31、32を形
成した後、この表面にレジスト膜をパターン形成し、複
数の突起電極の形成予定領域を露出させる。次いで、電
気メッキを施し、前述の突起電極の形成予定領域に電極
材料を析出させる。電極材料を所定の厚さ(高さ)に析
出させた後、突起電極の形成予定領域を形成していた前
述のレジスト膜を除去して、突起電極33を形成するも
のである。2. Description of the Related Art An outline of a conventional method for forming a bump electrode will be described with reference to FIG. First, base metal films 31 and 32 for a plating electrode are formed on the surface of a semiconductor substrate 30, and then a resist film is pattern-formed on the surface to expose regions where a plurality of projected electrodes are to be formed. Next, electroplating is performed to deposit an electrode material in the region where the bump electrode is to be formed. After the electrode material is deposited to a predetermined thickness (height), the above-mentioned resist film which has formed the region where the bump electrode is to be formed is removed, and the bump electrode 33 is formed.
【0003】また、このようにして、半導体基板30上
に突起電極33を形成した後、所望のチップ形状を得る
ために、ダイシング装置を使用してこの半導体基板の切
り出しを行っていた。After forming the protruding electrodes 33 on the semiconductor substrate 30 in this way, the semiconductor substrate is cut out using a dicing apparatus in order to obtain a desired chip shape.
【0004】[0004]
【発明が解決しようとする課題】しかし、このダイシン
グ装置は、チップの切り出し時に高圧の水を必要として
おり、図5に矢印aで示す箇所のように、ダイシング装
置から半導体基板30に吹き付けられる高圧水によっ
て、形成した突起電極33が変形する場合があった。However, this dicing apparatus requires high-pressure water at the time of cutting out chips, and the high-pressure water blown from the dicing apparatus onto the semiconductor substrate 30 as shown by an arrow a in FIG. In some cases, the formed protruding electrode 33 was deformed by water.
【0005】本発明はこのような問題点を解決すべくな
されたものであり、ダイシング装置から吹き付けられる
高圧水が原因となり、チップの切り出し時に生じていた
突起電極の変形を防止する突起電極の形成方法を提供す
ることを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and the formation of a protruding electrode for preventing deformation of the protruding electrode caused at the time of cutting a chip due to high-pressure water sprayed from a dicing apparatus. The aim is to provide a method.
【0006】[0006]
【課題を解決するための手段】本発明は上記目的に鑑み
てなされたものであり、その要旨は、光検出基板や信号
処理基板等の半導体基板に、メッキ電極用の下地金属膜
を形成する工程と、形成した下地金属膜の表面にレジス
ト膜を選択的に形成し、複数の突起電極の形成予定領域
を露出させる工程と、レジスト膜を形成した下地金属膜
の表面に電気メッキを施し、各突起電極の形成予定領域
に突起電極の電極材料を析出させる工程と、電極材料を
析出させた半導体基板を所定の形状に切り出す工程と、
所定の形状に切り出した半導体基板からレジスト膜を除
去する工程とを備える突起電極の形成方法にある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned object, and its gist is to form a base metal film for a plating electrode on a semiconductor substrate such as a photodetection substrate or a signal processing substrate. A step of selectively forming a resist film on the surface of the formed base metal film, exposing regions where a plurality of projected electrodes are to be formed, and performing electroplating on the surface of the base metal film on which the resist film is formed, A step of depositing an electrode material of the projection electrode in a region where each projection electrode is to be formed, and a step of cutting a semiconductor substrate having the electrode material deposited into a predetermined shape,
Removing the resist film from the semiconductor substrate cut into a predetermined shape.
【0007】[0007]
【作用】各突起電極の形成予定領域内に電極材料を析出
させた後、この形成予定領域を形成するレジスト膜を除
去せずに、半導体基板の切り出しを行う。従って、半導
体基板の切り出し時には、析出した電極材料の周囲にレ
ジスト膜が形成されており、このレジスト膜は、ダイシ
ング装置によって吹き付けられる水の水圧から、析出し
た電極材料を保護するように作用する。After depositing the electrode material in the region where each bump electrode is to be formed, the semiconductor substrate is cut out without removing the resist film forming the region where the bump electrode is to be formed. Therefore, when the semiconductor substrate is cut out, a resist film is formed around the deposited electrode material, and the resist film acts to protect the deposited electrode material from the water pressure of water blown by the dicing device.
【0008】[0008]
【実施例】以下、本発明に係る突起電極の形成方法を添
付図面に基づいて工程順に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for forming a bump electrode according to the present invention will be described below in the order of steps with reference to the accompanying drawings.
【0009】信号処理基板としてのCCD基板10は、
CCDを2次元的に配列して構成し、入力された電気信
号を処理するための内部回路を備えている。図1に示す
ように、CCD基板10の表面には複数の入力電極12
を有しており、この上部には突起電極を形成するための
Al膜によるコンタクトホール電極13が形成されてい
る。また、図では省略したが、このCCD基板10の表
面上には、多数の信号線電極が形成されているため、基
板の表面保護のために絶縁膜などのパッシベーション膜
14を形成している。The CCD substrate 10 as a signal processing substrate includes:
CCDs are arranged in a two-dimensional array and have internal circuits for processing input electric signals. As shown in FIG. 1, a plurality of input electrodes 12
A contact hole electrode 13 made of an Al film for forming a protruding electrode is formed on the upper portion. Although omitted in the figure, since a large number of signal line electrodes are formed on the surface of the CCD substrate 10, a passivation film 14 such as an insulating film is formed to protect the surface of the substrate.
【0010】このように形成されているCCD基板10
の全面に、Ti膜15、Au膜16を順次蒸着し、下地
金属膜を形成する(図2)。なお、このTi膜15はバ
リアメタルであり、Au膜16はメッキ用電極である。The CCD substrate 10 formed as described above
Then, a Ti film 15 and an Au film 16 are sequentially deposited on the entire surface to form a base metal film (FIG. 2). The Ti film 15 is a barrier metal, and the Au film 16 is a plating electrode.
【0011】次に、Au膜16表面にレジスト膜17を
パターン形成し(図3(a)参照)、Au膜16の表面
に複数の突起電極の形成予定領域を露出させる。Next, a resist film 17 is pattern-formed on the surface of the Au film 16 (see FIG. 3A), and regions where a plurality of projecting electrodes are to be formed are exposed on the surface of the Au film 16.
【0012】次ぎに、形成したレジスト膜17を電気メ
ッキの保護膜として使用し、選択メッキ法により、低融
点金属、例えばInによる電極材料11´を各突起電極
の形成予定領域に析出させる(図3(a))。具体的に
は、CCD基板10をアルカリ性のInメッキ溶液中に
浸し、Au膜16を電極とし、室温にて所定の電流値で
数十分間メッキを施す。Next, using the formed resist film 17 as a protective film for electroplating, an electrode material 11 'made of a low-melting metal, for example, In, is deposited on a region where each protruding electrode is to be formed by selective plating (FIG. 3 (a)). Specifically, the CCD substrate 10 is immersed in an alkaline In plating solution, and the Au film 16 is used as an electrode to perform plating at room temperature with a predetermined current value for several tens minutes.
【0013】次に、ダイシング装置によって、CCD基
板10を所定のチップサイズに切り出す(図3
(b))。このダイシング装置は、チップの切り出し時
に高圧の水を必要としており、切り出し時において、電
極材料11´を析出させたCCD基板10の表面には、
ダイシング装置から高圧水が吹き付けられる。この際、
析出した電極材料11´の周囲にはレジスト膜17が形
成されており、電極材料11´は、このレジスト膜17に
よって、吹き付けられる水の水圧から保護されるもので
ある。Next, the CCD substrate 10 is cut into a predetermined chip size by a dicing device (FIG. 3).
(B)). This dicing apparatus requires high-pressure water at the time of cutting out chips, and at the time of cutting out, the surface of the CCD substrate 10 on which the electrode material 11 ′ is deposited,
High pressure water is sprayed from a dicing device. On this occasion,
A resist film 17 is formed around the deposited electrode material 11 ′, and the electrode material 11 ′ is protected from the water pressure of the sprayed water by the resist film 17.
【0014】次に、所定のチップサイズに切り出したC
CD基板10から、保護膜として機能したレジスト膜1
7を除去した後、電極材料11´をマスクとして、露出
したAu膜16、その直下のTi膜15を順にエッチン
グして除去する。これにより、突起電極11が形成さ
れ、かつ、所定のチップ形状に切り出されたCCD基板
10が得られる(図3(c))。Next, C which is cut out to a predetermined chip size
From the CD substrate 10, the resist film 1 functioning as a protective film
After removing 7, the exposed Au film 16 and the Ti film 15 immediately below the exposed Au film 16 are sequentially etched and removed using the electrode material 11 'as a mask. As a result, the projecting electrodes 11 are formed, and the CCD substrate 10 cut into a predetermined chip shape is obtained (FIG. 3C).
【0015】以上のようにしてCCD基板10上に突起
電極11を形成した後、図4に示すように、CCD基板
10とセンサ基板20との接続を行い、半導体装置を製
造する。なお、光検出基板としてのセンサ基板20は、
表面に赤外線検出素子を2次元的に配列し、裏面には各
検出素子で検出された電気信号が与えられる複数の出力
電極21を有するものである。両基板の接続にあたって
は、まず、センサ基板20下面の各出力電極21と、C
CD基板10の各突起電極11との位置合わせを行い、
次いで、両基板を互いに突き合わせて接続する。この
際、各突起電極11はダイシング装置から吹き付けられ
る水圧から保護された状態で形成されているので、この
水圧を受けても変形することなく、高さや形状が全て均
一に揃っており、各突起電極11はセンサ基板20の各
出力電極21と全て接続され、CCD基板10とセンサ
基板20の各素子を確実に接続することができる。After the protruding electrodes 11 are formed on the CCD substrate 10 as described above, as shown in FIG. 4, the CCD substrate 10 and the sensor substrate 20 are connected to manufacture a semiconductor device. In addition, the sensor board 20 as a light detection board is
The infrared detectors are two-dimensionally arranged on the front surface, and the rear surface has a plurality of output electrodes 21 to which electric signals detected by the respective detectors are applied. When connecting the two substrates, first, each output electrode 21 on the lower surface of the sensor substrate 20 is connected to C
The alignment with each protruding electrode 11 of the CD substrate 10 is performed,
Next, the two substrates are connected to each other by abutting each other. At this time, since each protruding electrode 11 is formed in a state protected from the water pressure blown from the dicing device, it does not deform even under this water pressure, and its height and shape are all uniform. The electrodes 11 are all connected to the respective output electrodes 21 of the sensor substrate 20, and the CCD substrate 10 and the respective elements of the sensor substrate 20 can be reliably connected.
【0016】本実施例では、突起電極11をCCD基板
10に形成する例を示したが、センサ基板20側に突起
電極11を形成することもできる。In this embodiment, the example in which the protruding electrodes 11 are formed on the CCD substrate 10 has been described. However, the protruding electrodes 11 may be formed on the sensor substrate 20 side.
【0017】また、本実施例では、信号処理基板として
CCD基板を例示したが、この他にもMOS集積回路基
板等、入力された電気信号を処理する内部回路を形成し
た半導体基板を用いることができる。さらに、センサ基
板20を構成する光検出素子として赤外線検出素子を例
示したが、可視光領域の光を検出する光検出素子等、検
出した光信号を電気信号に変換する光検出素子であれ
ば、特に限定するものではない。In this embodiment, a CCD substrate is exemplified as a signal processing substrate. However, a semiconductor substrate having an internal circuit for processing an input electric signal, such as a MOS integrated circuit substrate, may be used. it can. Furthermore, although an infrared detection element has been exemplified as the light detection element constituting the sensor substrate 20, any light detection element that converts a detected light signal into an electric signal, such as a light detection element that detects light in the visible light region, There is no particular limitation.
【0018】[0018]
【発明の効果】以上説明した通り、本発明に係る突起電
極の形成方法によれば、電気メッキを施して、各突起電
極の形成予定領域内に電極材料を析出させた後、突起電
極の形成予定領域を形成するレジスト膜を除去せずに、
半導体基板を所定の形状に切り出し、この後、レジスト
膜を除去する方法を採用した。As described above, according to the method of forming a projecting electrode according to the present invention, the electrode material is deposited in a region where each projecting electrode is to be formed by electroplating, and then the projecting electrode is formed. Without removing the resist film that forms the planned area,
A method of cutting a semiconductor substrate into a predetermined shape and thereafter removing the resist film was adopted.
【0019】従って、半導体基板の切り出し時には、析
出した電極材料の周囲にレジスト膜が形成された状態で
あり、ダイシング装置から高圧水が吹き付けられた場合
にも、このレジスト膜によって析出した電極材料を保護
することができ、吹き付けられる水の水圧が原因となっ
て生じていた突起電極の変形を防止することが可能とな
る。Therefore, when the semiconductor substrate is cut out, a resist film is formed around the deposited electrode material. Even when high-pressure water is sprayed from a dicing apparatus, the electrode material deposited by the resist film is removed. It is possible to protect and prevent the deformation of the protruding electrode caused by the water pressure of the sprayed water.
【図1】CCD基板を示す部分断面図である。FIG. 1 is a partial cross-sectional view showing a CCD substrate.
【図2】下地金属膜を形成した状態を示すCCD基板の
部分断面図である。FIG. 2 is a partial cross-sectional view of the CCD substrate in a state where a base metal film is formed.
【図3】図3(a)は電気メッキを施して突起電極の形
成予定領域に電極材料を析出させた状態を示すCCD基
板の部分断面図、図3(b)はチップの切り出しを行っ
た状態を示すCCD基板の部分断面図、図3(c)はレ
ジスト膜を除去し、突起電極を形成した状態を示すCC
D基板の部分断面図である。FIG. 3A is a partial cross-sectional view of a CCD substrate showing a state where an electrode material is deposited in a region where a protruding electrode is to be formed by electroplating, and FIG. 3B is a cut-out of a chip. FIG. 3C is a partial cross-sectional view of the CCD substrate showing the state, and FIG.
It is a fragmentary sectional view of D board.
【図4】CCD基板とセンサ基板とを突き合わせて接続
した状態を示す部分断面図である。FIG. 4 is a partial cross-sectional view showing a state in which a CCD substrate and a sensor substrate are connected by abutting each other.
【図5】従来の突起電極の形成状態を示す半導体基板の
部分断面図である。FIG. 5 is a partial cross-sectional view of a semiconductor substrate showing a state in which a conventional bump electrode is formed.
10…CCD基板(半導体基板)、11…突起電極、1
1´…電極材料、16…Au膜(下地金属膜)、17…
レジスト膜、20…センサ基板(半導体基板)。10: CCD substrate (semiconductor substrate), 11: projecting electrode, 1
1 ': electrode material, 16: Au film (base metal film), 17 ...
Resist film, 20: sensor substrate (semiconductor substrate).
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭62−281356(JP,A) 特開 昭49−40669(JP,A) 特開 平5−67620(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 21/321 H01L 21/60 311 H01L 27/146──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-281356 (JP, A) JP-A-49-40669 (JP, A) JP-A-5-67620 (JP, A) (58) Field (Int.Cl. 6 , DB name) H01L 21/321 H01L 21/60 311 H01L 27/146
Claims (3)
を形成する工程と、 形成した前記下地金属膜の表面にレジスト膜を選択的に
形成し、複数の突起電極の形成予定領域を露出させる工
程と、 前記レジスト膜を形成した前記下地金属膜の表面に電気
メッキを施し、前記各突起電極の形成予定領域に突起電
極の電極材料を析出させる工程と、 前記電極材料を析出させた半導体基板を所定の形状に切
り出す工程と、 所定の形状に切り出した前記半導体基板から、前記レジ
スト膜を除去する工程とを備えることを特徴とする突起
電極の形成方法。1. A step of forming a base metal film for a plating electrode on a semiconductor substrate, and selectively forming a resist film on a surface of the formed base metal film to expose regions where a plurality of bump electrodes are to be formed. A step of: electroplating the surface of the base metal film on which the resist film is formed, and depositing an electrode material of the bump electrode in a region where each bump electrode is to be formed; and a semiconductor substrate on which the electrode material is deposited. And a step of cutting the resist film from the semiconductor substrate cut into a predetermined shape.
変換する検出部を有し、その検出部で得られた電気信号
を取り出す複数の出力電極を備えた光検出基板であるこ
とを特徴とする請求項1記載の突起電極の形成方法。2. The semiconductor substrate according to claim 1, wherein said semiconductor substrate has a detection unit for converting an optical signal into an electric signal, and said electric signal obtained by said detection unit.
2. The method according to claim 1, wherein the substrate comprises a plurality of output electrodes for extracting light.
し、該入力電極に入力された電気信号を処理するための
内部回路を備える信号処理基板であることを特徴とする
請求項1記載の突起電極の形成方法。3. The signal processing board according to claim 1, wherein the semiconductor substrate has a plurality of input electrodes and includes an internal circuit for processing an electric signal input to the input electrodes. Forming method of the bump electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3296057A JP2774403B2 (en) | 1991-11-12 | 1991-11-12 | Method of forming bump electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3296057A JP2774403B2 (en) | 1991-11-12 | 1991-11-12 | Method of forming bump electrodes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05136149A JPH05136149A (en) | 1993-06-01 |
| JP2774403B2 true JP2774403B2 (en) | 1998-07-09 |
Family
ID=17828548
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3296057A Expired - Fee Related JP2774403B2 (en) | 1991-11-12 | 1991-11-12 | Method of forming bump electrodes |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2774403B2 (en) |
-
1991
- 1991-11-12 JP JP3296057A patent/JP2774403B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05136149A (en) | 1993-06-01 |
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