JP2785765B2 - Device and method for determining terminal position of integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for determining a terminal position of an integrated circuit, and more particularly to an integrated circuit which considers simultaneous operation for suppressing noise caused by a transient operation current in a layout design of a semiconductor integrated circuit. Below LS
The present invention relates to a terminal position determining device and method I).

[0002]

2. Description of the Related Art When a plurality of output terminals of an LSI simultaneously transition from a low level to a high level or from a high level to a low level, a charging / discharging current of an output load capacitance flows instantaneously to a power supply and a ground. Noise occurs on the power / ground line. For this reason, the number of output terminals that can be operated simultaneously is limited so that the noise does not occur.

Conventionally, when checking the limit value of the number of simultaneously operating terminals, a power supply on an LSI package,
From the number of grounds and the type of interface buffer in use,
The overall limit value was determined, and it was checked whether the number of simultaneous operations of the entire LSI chip exceeded the limit value.

Referring to FIG. 5 which is a flowchart showing an example of a conventional method of determining a terminal position of an integrated circuit using a check tool, first, a library relating to the driving capability of an interface buffer is read, and a netlist including the library is prepared (step S1). P1), terminal arrangement information including the number of terminals is created (step P2), and the number of simultaneously operable terminals is converted by its driving capability coefficient and checked (step P3). If an error is detected by the check (step P3), Step P
4) Check the list in step 5 and return to step P1 to change the type of buffer on the netlist, or return to step P2 and add power and ground in the terminal location information file, and then repeat step P1 To P4. If no error is detected in step P4, the terminal arrangement is determined in step P6, and this processing ends.

In this conventional terminal position determination method, in checking the number of simultaneously operable terminals, the number of power supplies and grounds is considered, but the position on the LSI pad is not considered. Therefore, it is effective as a check on the premise that the simultaneous operation terminals are uniformly distributed on the entire LSI chip. However, when the simultaneous operation terminals are unevenly arranged on a part of the LSI chip, It is not possible to check whether the limit of the number of terminals of each of the power supply and ground is exceeded.

If an error is detected by the above check, the type of the buffer is changed on the netlist by referring to the list and the power / ground is added in the terminal position information file as described above. After that, the same flow had to be executed again.

[0007]

The above-described conventional method of determining the terminal position of an integrated circuit does not effectively check the relationship between the positions of a plurality of simultaneously operating terminals and the power / ground positions. There is a drawback that the partial simultaneous operation is overlooked.

Further, when a problem point of simultaneous operation is found and it is attempted to correct it, the problem point is determined from a list, and a check is performed again from the beginning after correcting a net list, power supply addition or grounding information, etc. There is a disadvantage that it takes time to determine the terminal position.

An object of the present invention is to solve the above-mentioned drawbacks and to check for simultaneous operation errors in consideration of the positions of power supply and ground,
It is still another object of the present invention to provide an integrated circuit terminal position determining method and device capable of easily identifying a problem part visually at the time of the correction, confirming the correction and easily determining an optimum terminal position.

[0010]

According to the present invention, there is provided an integrated circuit terminal position determining apparatus for suppressing noise caused by a transient operation current due to local simultaneous operation of a plurality of terminals in a layout design of a semiconductor integrated circuit. In an integrated circuit terminal position determination device that determines a terminal position in consideration of a limit value of the number of simultaneous operation equivalent terminals represented by the number of equivalent terminals normalized by a constant drive current for each of the simultaneous operation terminals, A simultaneous operation terminal information file storing terminal information, which is terminal group information; a terminal position information file storing terminal position information including a relation between a terminal name and a terminal number on a package; a terminal name and connection to the terminal A netlist file containing a netlist containing information on the type of interface buffer, and a package containing standard power and ground location information Over pin number on di contour and interior of LS
A package library file storing a package library describing the correspondence with the I pad number; a limit value library file storing the limit value information on the number of simultaneous operation equivalent terminals; and a buffer drive capability library storing buffer drive capability information A terminal arrangement is created by using the file, the terminal position information, the netlist, and the package library to create terminal arrangement information, and the terminal arrangement information, the operation terminal information, the limit value library, and the buffer drive capability library are prepared. Using the above, a simultaneous operation check is performed to determine whether or not the number of simultaneous operation equivalent terminals exceeds a predetermined limit value. If the number exceeds the limit value, an error correction is performed so that the number of simultaneous operation equivalent terminals is within the limit value. And a terminal arrangement executing means for executing the above.

[0011] A method for determining a terminal position of an integrated circuit according to the present invention comprises:
In order to suppress noise caused by transient operation current due to local simultaneous operation of multiple terminals in layout design of semiconductor integrated circuit, each of these simultaneous operation terminals is represented by the number of equivalent terminals normalized with a constant drive current In a method for determining a terminal position of an integrated circuit, which determines a terminal position in consideration of a limit value of the number of simultaneous operation equivalent terminals, terminal position information including a relation between a terminal name and a terminal number on a package, the terminal name, and an interface connected thereto A first step of reading a netlist including buffer type information, and reading a package library comprising correspondence information between terminal numbers on the package outer periphery and numbers of internal LSI pads and standard power / ground position information By replacing the terminal or additional power / ground number designated in the terminal position information with the position on the LSI pad, A second step of generating child arrangement information, and reading simultaneous operation terminal information, which is information on a group of terminals that operate simultaneously, and arranging the positions of the simultaneous operation terminals and the positional relationship between the power supply and the ground in the positional relationship on the LSI pad. A third step of checking whether the number of simultaneous operation equivalent terminals within a predetermined effective range exceeds a predetermined limit value, and, if there is an excess portion of the limit value, resolving the excess portion. And a fourth step of correcting the terminal arrangement information.

[0012]

FIG. 1 is a block diagram showing an embodiment of the present invention. Referring to FIG. 1, a terminal position determining apparatus for an integrated circuit according to this embodiment shown in FIG. Simultaneous operation terminal information file 11 storing information OT
A terminal position information file 12 storing terminal position information TP including a relation between a terminal name and a terminal number on a package;
A netlist file 13 storing a netlist NL containing information on terminal names and types of interface buffers to be connected to the terminals; a terminal number on a package outline containing standard power / ground position information on a package; and a number of an internal LSI pad Package library P describing the correspondence with
L, a library library file 14 storing terminal number limit information LT, a buffer library 16 storing buffer drive information BD, and information on these files 11-16. The system includes a terminal arrangement system 10 for determining a terminal arrangement, and a display device 17 for displaying a terminal arrangement operation or a terminal arrangement result.

The terminal arrangement system 10 includes terminal position information T
P, netlist NL, and package library information PL
And a simultaneous operation check unit that checks the simultaneous operation based on the terminal arrangement information TA and the simultaneous operation information OT and determines whether the limit value of the number of terminals is exceeded. 102 and an error correction unit 103 that corrects an error exceeding the limit value.

Next, the operation of the present embodiment, that is, the method of determining the terminal position of the integrated circuit will be described with reference to FIG. 1 and FIG. 2 which is a flowchart showing the processing of the present embodiment. Then, the terminal position information TP and the netlist NL are read from the terminal position information file 12 and the netlist file 13, respectively (step S1). As described above, the terminal position information TP reads the relation between the terminal name and the terminal number on the package, and the netlist NL reads the terminal name and the type of the interface buffer connected thereto.

Next, the terminal arrangement information creating section 101 generates a package library PL including correspondence information between terminal numbers on the package outer periphery and numbers of internal LSI pads and standard power / ground position information from the package library file 14. The terminal arrangement information TA is generated by replacing the terminal or additional power / ground number designated in the read terminal position information TP with the position on the LSI pad (step S2).

Referring to FIG. 3 showing an example of a display screen of the terminal arrangement information TA on the display device 17, terminal names A to N of terminals arranged on one side of the LSI chip 20 and power / ground positions 21, 22, 23 are shown. Are shown.

Next, the terminal arrangement system is started (step S3). In order to check the simultaneous operation, the simultaneous operation check unit 101 reads the simultaneous operation terminal information OT from the simultaneous operation terminal information file 11, and determines the position of the simultaneous operation terminal and the positional relationship between the power supply and the ground on the LSI pad. Arrange with. Here, the effective range of each power supply / ground is interpreted as up to an intermediate point between adjacent power supplies / grounds. For example,
The effective range of the ground 21 is a half of the simultaneous operation terminal sandwiched between the ground 21 and the adjacent ground 22 on the left side, and the half of the simultaneous operation terminal sandwiched between the ground 21 and the adjacent ground 23 on the right side. It is the sum of half and half. The number of terminals operating simultaneously within this effective range is checked, and it is checked whether the number of terminals is greater than the total number of terminals divided by the number of grounds. This is checked for all of the power supplies and grounds (step S4). For example, terminals A, B, E, F, I, K,
When L operates at the same time, the driving capability coefficient information BD of the interface buffer connected to each terminal is obtained from the buffer driving capability library file 16, and grounds 21 and 22 are determined.
The number of each of the simultaneous operation terminals A and B and the number of the simultaneous operation terminals EK between the grounds 22 and 23 are converted. One for each
Whether or not the mutual addition value of / 2 exceeds the number of divisions of the total simultaneous operation limit value by the number of grounds is a simultaneous operation check for the effective range of the ground 21.

When the check is completed and there is a portion exceeding the limit value (step S5), the portion is displayed on the display device 17.
(Step S6).

FIG. 4 shows an example of a display screen when the limit value is exceeded.
The operation of the error correction unit 103 will be described with reference to FIG. 2. This figure shows the ground 21 related to the above-mentioned limit value excess and the simultaneous operation terminal affecting the ground, and the error correction unit 103 Temporarily edit the buffer type and additional power and ground positions to avoid this. For the sake of convenience of explanation, the position of the ground is changed in order to increase the noise against simultaneous operation around the ground exceeding the limit value. Since the additional ground 21 has many simultaneous operation terminals affecting the right adjacent ground 23, in this case, a process of changing the additional ground position can be considered. Here, after the position of the ground 21 is shifted to a position 24 intermediate to the ground 33, a simultaneous operation check is performed again on the spot to check whether the shifted position 24 is effective. The movement of the position of the additional grounding is realized by selecting the terminal movement in the edit menu 25 on the system and designating a desired change position on the drawing (step S7). Thereafter, a check in the simultaneous operation check menu 26 is performed, an error is displayed and confirmed, and if there is no error, the terminal arrangement is determined and the process ends (step S8).

As described above, in the conventional method, the list must be checked, and the netlist and the terminal position information must be changed and then re-executed. However, in the method of the present embodiment, By changing the position of the terminal and the type of the buffer on the display screen and rechecking on the spot, it is possible to immediately check whether these changes are effective or not, so that the man-hour for designing the terminal arrangement can be reduced.

[0021]

As described above, the apparatus and method for determining the terminal position of an integrated circuit according to the present invention performs terminal arrangement by using terminal position information, a netlist, and a package library to create terminal arrangement information. Using this terminal arrangement information, the above-mentioned operation terminal information, the limit value library, and the buffer drive capability library, a simultaneous operation check is performed to determine whether or not the number of simultaneous operation equivalent terminals exceeds a predetermined limit value. Since there is provided a terminal arrangement execution means for executing error correction so that the equivalent number of terminals is within the above limit value,
There is an effect that a simultaneous operation check is performed in consideration of an effective range for each power supply and ground, and a possibility of malfunction due to simultaneous operation depending on a part of a side of the LSI chip to be designed is easily found.

In addition, the display of the simultaneous operation restriction error portion,
The error correction function for changing the terminal, the power supply, and the ground position and the recheck function after the change have the effect of reducing the number of design steps when determining the terminal arrangement.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an integrated circuit terminal position determining apparatus according to the present invention.

FIG. 2 is a flowchart illustrating a method for determining a terminal position of the integrated circuit according to the embodiment;

FIG. 3 is a diagram illustrating an example of a display screen of a terminal arrangement according to the embodiment;

FIG. 4 is a diagram showing an example of a display screen for error display of terminal arrangement and position editing according to the present embodiment.

FIG. 5 is a flowchart illustrating an example of a conventional method for determining a terminal position of an integrated circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Terminal arrangement system 11 Simultaneous operation terminal information file 12 Terminal position information file 13 Netlist file 14 Package library file 15 Limit value library file 16 Buffer drive capability library file 17 Display device 101 Terminal arrangement information creation part 102 Simultaneous operation check part 103 Error Correction section

Claims (3)

(57) [Claims] An equivalent terminal obtained by normalizing each of these simultaneous operation terminals with a constant drive current for suppressing noise caused by a transient operation current due to local simultaneous operation of a plurality of terminals in a layout design of a semiconductor integrated circuit. In the integrated circuit terminal position determining device that determines the terminal position in consideration of the limit value of the number of simultaneous operation equivalent terminals expressed by the number of simultaneous operation terminals, the simultaneous operation terminal storing information of the simultaneously operating terminal group is stored. An information file, a terminal position information file that stores terminal position information including the relation between terminal names and terminal numbers on the package, and a netlist file that stores a netlist that contains information on the terminal names and the types of interface buffers connected to them The package contains the standard power and ground position information, and the terminal number on the package outline and the number of the internal LSI pad A package library file storing a package library describing the correspondence; a limit value library file storing limit value information on the number of simultaneous operation equivalent terminals; a buffer drive capability library file storing buffer drive capability information; The terminal arrangement is performed by using the information, the netlist, and the package library to generate terminal arrangement information, and the terminal arrangement information, the operation terminal information, the limit value library, and the buffer drive capability library are used to perform the terminal arrangement information. A simultaneous operation check is performed to determine whether or not the number of operation equivalent terminals exceeds a predetermined limit value. If the number of operation equivalent terminals exceeds the limit value, an error is corrected so that the number of simultaneous operation equivalent terminals is within the limit value. Means for determining a terminal position of an integrated circuit. 2. The terminal arrangement information creating means, wherein the terminal arrangement execution means arranges terminals by using the terminal position information, the netlist, and the package library to create the terminal arrangement information; Information, the operation terminal information, the limit value library, and the buffer drive capability library, the concurrent operation check means for determining whether or not the number of simultaneous operation equivalent terminals exceeds a predetermined limit value; 2. The integrated circuit terminal position determining apparatus according to claim 1, further comprising: an error correcting unit configured to correct an excessive error. 3. An equivalent terminal obtained by normalizing each of these simultaneous operation terminals with a constant drive current for suppressing noise caused by a transient operation current due to local simultaneous operation of a plurality of terminals in a layout design of a semiconductor integrated circuit. A terminal position determination method for an integrated circuit that determines a terminal position in consideration of a limit value of the number of simultaneous operation equivalent terminals represented by the number And a first step of reading a netlist including information on the type of an interface buffer connected to the device, and from the correspondence information between the terminal numbers on the package outline and the numbers of the internal LSI pads and standard power / ground position information Read the package library, and replace the terminal specified in the terminal position information and the number of the additional power / ground with the position on the LSI pad. A second step of generating terminal arrangement information by reading simultaneously operated terminal information, which is information on a group of simultaneously operated terminals, and determining the position of the simultaneously operated terminals and the positional relationship between power and ground on the LSI pad. A third step of arranging in a relationship and checking whether or not a predetermined limit value of the number of the simultaneous operation equivalent terminals within a predetermined effective range has been exceeded; and Modifying the terminal arrangement information so as to eliminate the terminal arrangement information.