JP2806697B2 - Variable frequency signal generator and communication measuring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to generation of an arbitrary frequency signal and measurement of a communication line at an arbitrary communication speed using the frequency signal.

[0002]

2. Description of the Related Art In a conventional communication measuring apparatus, a communication speed measuring clock is generated by dividing a signal of a reference frequency signal source by a frequency divider. Since the frequency division ratio of this frequency divider is determined based on a predetermined table,
The communication speed values that can be set are limited to commonly used values.

[0003]

Since the conventional communication measuring device has the above-described configuration and function, it cannot measure a communication line having a special communication speed as a test target. However, there is a problem that it is not possible to test the margin of the communication speed in the communication line to be tested by slightly shifting the communication speed from the prescribed communication speed.

The present invention has been made under such circumstances, and a variable frequency signal generator capable of generating a signal of an arbitrary frequency suitable for a communication measuring device, and a general device using this device. It is an object of the present invention to provide a communication measuring device capable of measuring a communication line having a special communication speed and a communication speed margin in addition to the measurement of a communication line having a communication speed.

[0005]

In order to achieve the above object, according to the present invention, a variable frequency signal generator is provided by the following (1).
And the communication measuring device is configured as in the following (2).

(1) A reference frequency signal generator, a first frequency divider for inputting and dividing the output of the reference frequency signal generator, and an output of the first frequency divider is applied to one input terminal. A phase comparator to be input, an integrator for integrating the output of the phase comparator, a voltage-controlled oscillator for receiving the output of the integrator, and a frequency-controlled oscillator for receiving and dividing the output of the voltage-controlled oscillator. A second frequency divider that outputs the voltage to the other input terminal, a third frequency divider that receives the output of the voltage-controlled oscillator, divides the frequency, and outputs the frequency-divided output to an output terminal. The first and second frequency dividers of the first frequency divider, the second frequency divider, and the third frequency divider , respectively.
A frequency division ratio determining means for determining a third frequency division ratio and supplying a signal corresponding to this frequency division ratio to each frequency divider;
A variable frequency signal generator, wherein said frequency division ratio determining means
Sets a predetermined value to the first frequency division ratio and the third frequency division ratio,
Substituting the selected frequency for the division ratio, the first division ratio and
The second frequency division ratio does not satisfy a predetermined condition set in advance
In this case, the second frequency division ratio and the
The third division ratio is increased / decreased at the same magnification, and the first division ratio and
If the second division ratio satisfies the predetermined condition, the first division ratio
Divide the division ratio and the second division ratio by these greatest common divisors
Thereby, the first division ratio, the second division ratio,
A frequency signal generator for determining a third frequency division ratio.

(2) A communication measuring device comprising communication measuring means for setting a communication speed based on the output of the variable frequency signal generating device described in (1) and measuring the communication speed of a communication line.

[0008]

According to the configuration (1), when a desired output frequency is designated, the frequency division ratio of each frequency divider is determined according to the frequency, and a desired output frequency is obtained at the output terminal.

Further, with the configuration (2), an arbitrary communication speed can be set, and measurement can be performed at the communication speed.

[0010]

The present invention will be described in more detail with reference to the following examples.

FIG. 1 is a block diagram of a "communication measuring device" according to an embodiment. FIG. 2 is a schematic perspective view of this embodiment, FIG. 3 is a diagram showing a display example of a display unit in this embodiment, and FIG. 4 is a ROM (read only memory) in this embodiment.
FIG. 5 is a diagram showing a table of a RAM (random access memory), FIG. 5 is a diagram showing a change in the table of the RAM, and FIG.
5 is a flowchart illustrating the operation of the calculation unit in the present embodiment.

As shown in FIG. 2, a communication measuring apparatus according to the present embodiment comprises a main body 30 containing components 1 to 12,
The display unit 13 includes an operation unit 14 provided on the upper surface of the main body 30. Then, the communication line 40 to be measured is coupled via the cable 15 and the connector 16.

FIG. 1 shows the contents of each of the components 1 to 14 of the present embodiment and the connection relationship thereof. As shown in the figure, the communication speed measurement clock f _S is the output f _X of the phase locked loop (PLL) type reference clock generator 20.
Is divided by the frequency divider 8 and generated. Reference clock generating section 20, reference divider 2, those containing the comparison frequency divider 4, the locking time, of the values output frequency f ₄ of the output frequency f ₂ frequency divider 4 frequency divider 2 matches the signal of the output frequency f _X voltage controlled oscillator (VCO) 6 is generated. The voltage controlled oscillator 6 has a limited frequency range (lock range) in which the locked state can be maintained.
Is provided.

In the configuration shown in FIG. 1, when the user inputs a desired communication speed by using the operation unit 14 while looking at the display unit 13, the arithmetic unit 7 sets the required communication speed for setting the desired communication speed. The frequency division ratios of the frequency dividers 2, 4, and 8 are calculated as described below, and supplied to the frequency dividers 2, 4, and 8. The frequency divider 8 outputs an output of a frequency f _S corresponding to a desired communication speed. can get. The communication measurement unit 9 uses the signal of the frequency f _S to perform various measurements on the communication line 40 to be tested.

Next, the man-machine interface unit 10
A procedure for setting an arbitrary communication speed will be described focusing on the operation of (1).

When the power is turned on, the operation shifts to the operation when the backup state of the RAM 11 is normal. If the backup status is abnormal, the contents of the table in ROM 12 are stored in RAM.
The operation shifts to the operation of copying to the table of FIG.
reference).

The display unit 13 displays a communication condition setting screen as shown in FIG.

While viewing the setting screen, the user operates the ↑ and ↓ keys of the operation unit 14 to select a desired “Send Spee”.
Move the cursor to “d:” or “Receive Speed:”. In FIG. 3, the cursor is located at “Send Speed:”.

The commonly used communication speeds are displayed in 1 to W in the column of “Select” on the setting screen, and these are directly selected by the user using the 1 to W keys of the operation unit 14. it can.

The communication speed to be selected by using the ←, → keys is 50 → 75 → 100 → 72,000 → 50 → 75.
... can be changed sequentially.

When the user needs to set a special communication speed, if the user selects "USER" in the "Select" field with the X key, the user can directly input the communication speed with the numeric keys.

For example, when the communication speed is 34700, "3", "4", "7", "0", "0" are inputted.

In the present embodiment, the effective figures arbitrarily selectable from the precision of the hardware (the crystal oscillator 1, the stability of the PLL) are limited to three digits.

For example, when the user inputs "34718", the man-machine interface 10 truncates (or rounds) "18" after four digits and internally sets the communication speed to "34700". When the user moves the cursor to the next setting item by key operation, the display of the setting item input as 34718 is changed to “3470”.
Change to "0".

The arbitrary speeds set in this way are stored in the table of the RAM 11 in ascending or descending order. For example, 34700 is stored between 32000 and 38400, as shown in FIG. The next time the communication speed is selected with the ←, → keys, 34700 will be 32000 and 38
Appears during 400.

When the user performs a measurement start operation using the operation unit 14, the man-machine interface 10 passes the selected value, for example, 34700, to the calculation unit 7.

The operation unit 7 puts 34700 into the P register and executes the operation shown in the flowchart of FIG.

Next, according to the flowchart of FIG.
Will be described. Prior to the description, related components, numerical values, and the like will be briefly described. Crystal output frequency f ₁ of the oscillator 1 is 8 MHz, the reference frequency divider 2 is binary 7
The bits are divided by 1 to 127 (division ratio), the comparison division ratio is 4 by binary 11 bits, and the divider is 2 by 2047.
This is 65535 frequency division. The required frequency division ratios of the frequency dividers 2 , 4, and 8 are stored in registers R, P, and C at the time of measurement. The frequency division ratios stored in the registers R, P, and C are referred to as R, P, and C for convenience.

The reference clock generator 20, when locking with PLL, Output frequency f ₄ of the comparison frequency divider 4 and the output frequency f ₂ of the reference divider 2 is controlled to be equal.

[0030]

[Number 1] f ₂ = f ₄ i.e. _{f 1 / R = f x /} P Therefore _{f x = P × f 1 /} R Therefore, the clock f _s communication _{speed, f s = f x / C} = P × f ₁ / (RC) (1) In this embodiment, the values of R, P, and C are limited as follows due to the hardware configuration. 8 ≦ R ≦ 127 R, P, and C are integers. 5 ≦ P ≦ 2047 R is preferably as small as possible. 2 ≦ C ≦ 65535 f ₁ = 8 MHz

FIG. 6 is a flowchart for obtaining the values of R, P, and C based on the selected communication speed.

In S (step) 1, the selected communication speed is substituted for P, 400000 for R, and 2 for C.
These numerical values are calculated numerical values that satisfy the relations 1 to 9 in FIG. 1 when the reference clock generator 20 is locked. In other words, it is a numerical value that satisfies the requirement when f _S = P in the above equation (1) and f ₁ = RC.

Assume that 34700 is substituted for P. Then, in S2, 400000 <34700/2? Is NO, and P and C are doubled in S3. That is, P ← 694
00, C ← 4, returning to S2, R <P / 2? Is NO and P and C are further doubled. Is this processing R <P / 2? Continue until YES is reached. In the 8th processing, 400000 <8
883200/2? Becomes YES, and at this time, C = 51
2. By the operations of S2 and S3, the frequency division ratio C of the frequency divider 8 is temporarily determined so that the operation (lock) frequency of the voltage controlled oscillator 6 of the reference clock generator 20 falls within a predetermined range. In the numerical value of S2 in FIG.
It will operate in the 6-32 MHz range. If the value of S2 is, for example, "R <P?", The voltage-controlled oscillator 6
Operates in the range of 8-16 MHz. As described above, by changing the value of S2, it is possible to select an operating frequency that matches the characteristics of the voltage controlled oscillator 6.

If S2 is YES, the process moves to S4, where P and R are divided by the greatest common divisor. P = 8883200, R = 400000
Since it is 0, the greatest common divisor is 6400, and therefore P ← 138
8, R ← 625. S5 is NO and S6 is x = 62
5/125 = 5, P ← 1388/5 = 277 in S7.
6, R ← 625/5 = 125. In S8, P is rounded off and P = 278, and the error at that time is “278/277.
6 "is the larger value of C = 512 and R = 125.
Correct with. That is, C ← 512 × (278/27
7.6) = 512.73775, and the value after the decimal point is rounded off to obtain C = 513. In S9, P = 278, R = 125
Is divided by the greatest common divisor. Here, P and R do not change at the greatest common divisor of 1. By the processing of S5 to S9, the value of R satisfies the requirements of the reference frequency divider 2.

In S10, the minimum x that satisfies Pxx ≧ 5 and Rxx ≧ 8 is determined. Here, x = 1, and in S11, P, R
Does not change. By the processing of S10 and S11,
P and R satisfy hardware requirements.

At S12, the values P = 278, R = 125, C calculated as described above are stored in the registers P, R, C, respectively.
= 513 and the operation is terminated.

The input signal frequency f _S of the communication control unit 9 is given by the following equation (1).

[0038]

F _s = 8000000 × P / (RC) f _s = 8000000 × 278 × (125 × 513)

And a desired communication speed setting frequency f
A signal of _S = 34700 Hz is obtained.

In this manner, an arbitrary frequency f _S can be set, and the communication measuring section 9 performs various measurements of the communication line 40 using the signal of the frequency f _S.

In the embodiment, the values of R, P, and C are calculated each time the communication speed is changed. However, the present invention is not limited to this. For example, R, P, and C at a required communication speed are calculated. , C values are calculated in advance and stored in a memory as a table, and when changing the communication speed, this table is searched to determine a part or all of R, P, C. Can also.

[0042]

As described above, according to the present invention,
Any frequency signal can be generated, and using this signal,
In addition to measuring a communication line with a general communication speed, it is also possible to measure a communication line with a special communication speed and a margin of the communication speed.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment.

FIG. 2 is a perspective view of an embodiment.

FIG. 3 is a diagram showing a display example of a display unit in the embodiment.

FIG. 4 is a diagram showing a table of ROM and RAM.

FIG. 5 is a diagram showing a change in a table of a RAM;

FIG. 6 is a diagram illustrating an operation of a calculation unit in the embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 crystal oscillator 2 reference divider 3 phase comparator 4 comparison divider 5 integrator 6 voltage-controlled oscillator 7 arithmetic unit 8 divider

Claims (2)

(57) [Claims] 1. A reference frequency signal generator, a first frequency divider for receiving and dividing an output of the reference frequency signal generator,
A phase comparator that inputs the output of the first frequency divider to one input terminal, an integrator that integrates the output of the phase comparator,
A voltage controlled oscillator that receives the output of the integrator, a second frequency divider that receives and divides the output of the voltage controlled oscillator, and outputs the divided frequency to the other input terminal of the phase comparator; A third frequency divider for inputting and dividing the output of the first frequency divider and outputting the same to an output terminal, and the first frequency divider, the second frequency divider, and the third frequency divider according to a desired output frequency The first, second,
A frequency division ratio determining unit for determining a third frequency division ratio and supplying a signal corresponding to the third frequency division ratio to each of the frequency dividers. Substitutes predetermined values for the first division ratio and the third division ratio and the selected frequency for the second division ratio, and sets the first division ratio and the second division ratio in advance. When the set predetermined condition is not satisfied, the second frequency division ratio and the third frequency division ratio are maintained until the predetermined condition is satisfied.
Is increased or decreased by the same magnification, and the first division ratio and the second division ratio are increased.
If the frequency division ratio of the first frequency division ratio satisfies the predetermined condition, the first frequency division ratio and the second frequency division ratio are divided by these greatest common divisors to obtain the first frequency division ratio and the second frequency division ratio, respectively. Division ratio, third
A variable frequency signal generator for determining a frequency division ratio of the variable frequency signal. Wherein to set the communication speed by the output of the variable frequency signal generating apparatus according to claim 1, comprising a communication measuring means for performing measurements related to communication speed of the communication line this
And a communication measurement device.