JP2825372B2 - Hardware structure display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a hardware structure display device used in a CAD system for LSI design.

[0002]

2. Description of the Related Art In recent years, with the enlargement of LSIs, various automation systems have been developed to support LSI design for the purpose of improving design efficiency.

Many of these systems are designed to support logic design such as automatically synthesizing logic circuits based on a hardware description language at the register transfer level. A system for supporting a function design for inputting a description and determining an operation for each data path structure and cycle time has also been developed.

In a system for supporting such a function design, for example, when an algorithm description is read, this algorithm description is converted into a data flow graph expression, and the operation of each cycle is determined on the data flow graph. Furthermore, the hardware structure is synthesized by allocating components on hardware such as registers and arithmetic units.

However, in general, since the level of functional design has a very wide range of design choices, even with the above-mentioned system, a hardware configuration of a quality comparable to the design by a skilled designer is completely automatically synthesized. It was extremely difficult to do.

For such a reason, in a system for supporting the function design of a logic circuit, correction work by interaction between a designer and the system becomes more and more important. To perform such correction work, the designer must first understand the hardware structure synthesized by the system, but in the case of conventional manual function design, the designer must It has been desired that the system output a block diagram so that the designer can intuitively understand the hardware structure synthesized by the system using a block diagram showing the components and their connection relations. At present, however, there are two types of hardware structures synthesized by the system: a data system hardware structure related to data processing and a control system hardware structure that controls data flow. It is output in the state where it was done.

[0007] This means that a system that supports functional design is generally used for large-scale hardware design, so that the block diagram output by the system is also large. Output in a state in which the hardware structures of the systems are mixed has the following problems.

(1) When trying to confirm the hardware structure by focusing on the data system or control system,
A large display area is required due to the mixture of the two hardware structures. However, since the display area of one screen is physically limited, the data is output over a large number of screens. Means that the user has to scroll through the screen to display the desired hardware structure over many pages while searching for the screen of interest. (2) The more pages are switched, the more erroneous the connection of hardware resources between pages is.

(3) If both hardware structures coexist, even if only the data system or control system block diagram needs to be viewed, the system must perform the placement / wiring processing for all hardware resources. And the time required for drawing increases. (4) As the number of objects to be drawn increases, it becomes more difficult to perform arrangement / wiring in an easy-to-view manner, and the quality of the output drawing deteriorates, making the checking operation more difficult.

[0010]

As described above, in the conventional system, since the hardware structure of the data system and the hardware structure of the control system are displayed in a mixed state, the designer pays attention to the data system or the control system. When trying to check the hardware structure, the designer must scroll the screen over several pages to display the desired hardware structure, and in doing so, There is also a problem that the connection mistake of the wear resource is increased. Furthermore, if both hardware structures are mixed, even if only the block diagram of the data or control system needs to be seen, the system must perform the placement / wiring processing for all hardware resources and the drawing There is also a problem that the required time increases, and that both hardware structures coexist, so that the number of objects to be drawn increases, which lowers the quality of the output drawing, and makes the checking operation difficult.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and is capable of displaying a hardware structure by distinguishing between a data system and a control system so that the hardware structure can be easily understood. An object of the present invention is to provide a structure display device.

[0012]

In a system for synthesizing a hardware structure for realizing an operation specification by inputting an operation specification of hardware, at least a resource table is used as a hardware structure for realizing the operation specification synthesized by the system. And the connection table are stored in the hardware structure storage means. Using the connection table of the hardware structure stored in the hardware structure storage means, the data structure and the control system for each resource of the resource table are determined by the hardware structure classification means. A code for classification is set, and the hardware structure is configured to display the hardware structure of the data system and the hardware structure of the control system using the resource table and the connection table in which the classification codes are set. I have.

[0013]

As a result, according to the present invention, the hardware structure for realizing the hardware operation specifications is classified into a data system part and a control system part, and these are classified into a data system hardware structure and a control system hardware. The hardware structure can be displayed separately, so that the designer can easily confirm the hardware structure combined with the system separately for the data system and the control system.

[0014]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a schematic configuration of the embodiment. In the figure, reference numeral 1 denotes a hardware structure storage unit, to which a hardware structure classification unit 2 is connected, and to this hardware structure classification unit 2, a hardware structure display unit 3 and a bit map display are connected. 4 are connected.

The hardware structure storage unit 1 stores the hardware structure synthesized by the system from the operation specification description of the hardware. In this case, an operation specification description similar to the C language as shown in FIG. 2 is used as the operation specification description of the hardware. The hardware structure synthesized by the system is stored in the form of a resource table and a connection table.

As shown in FIG. 3, for example, the resource table includes a resource name 31, display coordinates 32, and a classification code 33 indicating whether the resource is a data system or a control system. The table of the classification code 33 is composed of a data system / control system classification 41 and a classification code 42, for example, as shown in FIG.
“0” is set as the classification code of the data system, “1” is set as the classification code of the control system, and “2” is set as the classification code of the data system + control system. Note that FIG.
In the classification code of the resource table shown in (1), "0" (a classification code indicating that it is a data system) is set as an initial value.

On the other hand, as shown in FIG. 5, for example, the connection table includes a resource name 51, an input source 52 in which a resource name list connected to the input side of the resource is written, and a resource connected to the output side of the resource. Output destination 53 where name list is written
Consists of Here, <STATE1 in the table
> And <STATE2> indicate signals which become "1" when the state is 1 and "1" when the state is 2, respectively, and are treated as resources in this table. In the column of the input source 52, the numerical value enclosed in parentheses in front of the resource name indicates that the output of the resource written in the input source 52 is
It indicates the number of the input pin of the resource of the resource name 51 connected to the resource. For example, the resource name of the connection number 5 “COMP”
“1” indicates that the output of “R5” written in the input source 52 is connected to the input pin 1 and the output of “R2” is connected to the input pin 2. Also,
The “CTL number” enclosed in parentheses indicates to which control pin of the MUX of the resource name 51 the resource output written in the input source 52 is connected. Similarly,
The number enclosed in parentheses after the resource name in the column of the output destination 53 indicates the number of the input pin of the resource of the output destination 53 to which the output of the resource described in the resource name 51 is connected. For example, the resource name “COMP1” of the connection number 5 is connected to the input pin 2 of “AND1” written in the column of the output destination 53. The “CTL number” enclosed in parentheses indicates the number of the control pin of the MUX of the output destination 53 to which the output of the resource described in the resource name 51 is connected. The MUX of the resource table has two inputs, and when CTL1 is 1, the input 1
Has a function of distributing input 2 to the output side when CTL2 is 1.

The hardware structure classifying unit 2 uses the above-described connection table, traces the control pin connections to the input side for all MUXs, sequentially obtains resources, and determines that the output is related only to the MUX control. "1" (control system) for resources to be used, and "2" for resources whose output is used for purposes other than MUX control.
(Data system and control system) is set in the classification code 33 of the resource table described in FIG.

The hardware structure display unit 3 uses not-shown wiring information (wiring table) and resource shape information (shape table) in addition to the resource table and the connection table stored in the hardware structure storage unit 1. The hardware structure is displayed on the bitmap display 4. The display on the display 4 here is, for example, the reference document “Sun microsystems,“ S
unView system Programmer '
s Guide ", Revision of 15
Oct. 1986, is used. The hardware structure of the data system is shown in window 1, the hardware structure of the control system is shown in window 2, and the hardware structures belonging to both the data system and the control system are shown in window 1. And window 2 respectively. In this case, the control pins of the MUX having the hardware structure of the data system and the output pins of the resources whose outputs are connected to the control pins of the MUX in the hardware structure of the control system are displayed with tags having numbers indicating the correspondence. I have.

FIG. 6 shows the hardware structure display unit 3 based on the resource table shown in FIG. 3 and the connection table shown in FIG.
Indicates the hardware structure displayed in the window 1. Next, the operation of the embodiment configured as described above will be described. In this case, a case will be described as an example where a hardware structure synthesized based on the operation specification description of FIG. 2 is displayed.

The hardware structure classification unit 2 shown in FIG.
Using the connection table shown in FIG. 5 stored in the hardware structure storage unit 1, the connection of the control pin is traced to the input side for all the MUXs, the resources are sequentially obtained, and the output is related only to the control of the MUX. In this case, a classification code of "1" is set.

FIG. 7 shows a processing flow for the connection table in the hardware structure classification unit 2. First, FIG.
{MUX1} of connection number 7 for the connection table shown in FIG.
Is taken out (step S71). Next, I took out the ｛M
The subroutine 1 is called using UX1 # as a resource F (step S72).

The subroutine 1 performs a required process by recursively tracking hardware resources existing on the input side of a certain hardware resource in the input direction until reaching a resource having no input source. FIG. 8 shows the processing flow.
Is shown in In this case, subroutine 1
Since {MUX1} is an MUX, an input source {<STATE1>, <STATE2> of control pins of {MUX1} is obtained from the connection table (steps S81, S82, S88). Next, one of the input sources, {<STATE1>}, is extracted as a resource F ', and the subroutine 2 is called (step S8).
4, S85). The subroutine 2 performs processing for setting the classification code of the resource F 'in the resource table, and the processing flow is shown in FIG.

Here, the subroutine 2 includes a resource F '(<
STATE1>) is a state signal, so 1 is put in the column of the classification code of {<STATE1>} in the resource table and the process returns (steps S91, S92). Here, the process proceeds to step S86 of subroutine 1, where ｛<S
TATE1>｝ is newly considered resource F, and subroutine 1
Is called recursively. Then, {<STATE1>}
Because there is no input source, return (step S81),
The process returns to step S87 of subroutine 1. In this case, since {<STATE2>} remains as an input source, {<STATE2>} is extracted and the subroutine 2 is called as the resource F '(steps S84 and S8).
5) Then, 1 is also set in the classification code column of {<STATE2>} in the resource table (step S9).
1, S92).

As described above, since all the input sources of {MUX1} have been extracted, the subroutine 1 returns (step S87), and the process returns to step S73 in FIG. In this case, the connection table shown in FIG.
Since there is a UX, {MUX2} of the connection number 8 is newly extracted, and the same processing as described above is performed. Thus, ｛<S
1 is set again in the column of each classification code of TATE1>｝ and {<STATE2>} (step S7).
1, S72).

Further, the connection table shown in FIG.
Since UX remains, {MUX3} of connection number 15 is extracted (step S71), and {MUX3} is assigned to resource F.
Subroutine 1 (step S7)
2). In this case, the input source {OR1, INV1} of the control pin of {MUX3} is obtained from the connection table (steps S81, S82, S88).

Next, {OR1} which is one of the input sources is taken out as a resource F ', and the subroutine 2 is called (steps S84 and S85). The output destination of {OR1} is {MUX3} and {INV1}. Even if the classification code of {MUX3} is regarded as 1, the classification code of {INV1} contains 0 at this point. {OR1}
Is set to 2 in the classification code field (step S9).
(1, S93, S95, S98), and the process returns to step S86. Then, when {OR1} is used as the resource F and the subroutine 1 is recursively called and the processing is continued, the classification codes of {<STATE1>, <STATE2>} are 1, {AND1, COMP1, R5, R
2 is set in the classification code of 2｝, and subroutine 1 is set.
Returns (steps S87, S84, S85, S85).
86). Further, since {INV1} remains in the input source of the control pin of {MUX3}, if {INV1} is recursively called with resource F ′, {INV1, OR1, <STATE2>, AND
1, <STATE1>, COMP1, R5} is set to 1 in the classification code column, and {R2} is set to 2 in the classification code column.

As a result of the above processing, connection of resources as shown in FIG. 10 is obtained from the control pins of the MUXs 1 to 3, and the numerical value in parentheses attached to each resource is used as a classification code as shown in FIG. Set on the table. In this case, focusing on the classification codes in FIG. 10 and tabulating them, the resources are classified as shown in FIG. Also, from the processing result, the resource table shown in FIG. 3 is obtained as the one in which the classification code is set as shown in FIG.

Next, the hardware structure display unit 3 displays the hardware structure on the bitmap display 4 using the resource table in which the classification codes shown in FIG. 12 are set and the connection table shown in FIG. become.

In this case, the processing flow in the hardware structure display unit 3 is shown in FIGS. First, {R5} of resource number 1 is extracted from the resource table shown in FIG. 12 (step S131). In this case, {R5} is
Since the classification code is 1 at the display coordinates (10, 10),
{R5} is a shape corresponding to a resource stored in a shape table not explicitly shown in the figure.
(10) (Steps S132 and S13)
3, S135, S136).

Here, since all resources have not been extracted (step S138), the process returns to step S131, and the above processing is repeated. As a result, (R
1, R4, R2, MUX1, MUX2, ADD1, SU
B1, MUX3, R3} to window 1, (R5, R
2, COMP1, <STATE1>, <STATE2
>, AND1, OR1, INV1} are drawn in the window 2 (steps S131 to S13).
8).

Next, after the control tag number C is initialized to 1, the {R5} of the connection number 1 is extracted from the connection table shown in FIG. 5 and its classification code "1" (= B1)
(Steps S139 to S141).

Next, all connection destinations are obtained. Here, {COMP1 (1)} is obtained (step S142).
Next, {COMP1} is extracted in step S143,
The classification code “1” (= B2) is obtained (step S2).
144). In this case, since both B1 and B2 become "1", the wiring of {R5} and {COMP1} is executed on the window 2 according to the wiring information of the wiring table (not shown), and the next new resource is connected. Take out from the table (steps S145, S147, S148, S149, S1
50).

Hereinafter, the same processing as described above (step S14)
0 to S150) is repeated for all the resources of the connection table shown in FIG. 5 so that the hardware structure shown in FIG. 6 can be displayed in a window separately for the data system shown in FIG. 16 and the control system shown in FIG. become.

Accordingly, in this way, the hardware structure synthesized by the system can be displayed separately for the data system and the control system. Therefore, the designer pays attention to the data system or the control system and changes the hardware structure. In the case of checking, the desired hardware structure can be quickly taken out, and the connection error of each hardware resource can be greatly reduced. Further, since the system performs the placement / wiring processing for the hardware resources for the data system or the control system, the time required for drawing can be reduced, and the drawing target can be organized. The quality can be improved, and the efficiency of the checking operation can be improved. Further, the present invention is also useful in a case where a large-scale hardware structure synthesized by a system is interactively changed while paying attention to a data system or a control system.

The present invention is not limited to the above-described embodiment, and can be implemented with appropriate modifications without departing from the scope of the invention.
For example, in the above embodiment, the hardware structure of the data system and the hardware structure of the control system are displayed in separate windows, but the line type of the wiring between the resources is indicated by a solid line for the data system and a solid line for the control system. By displaying with a broken line, it is also possible to distinguish and display the hardware structure of the data system and the hardware structure of the control system on one window. For example, the hardware structure display unit 3 described in the above embodiment uses the hardware structure display unit 3 to execute step S shown in FIG.
By executing the processing flow of 181 to S194, FIG.
As shown in FIG. 9, a hardware structure in which the connection of the data system is indicated by a solid line and the connection of the control system is indicated by a broken line can be displayed. In this method, in addition to the distinction based on the solid line and the broken line, a distinction method using a color may be considered. Also,
When displaying the hardware structure of the data system and the control system on one window, the data system or the control system can be distinguished by hiding either the data system or the control system depending on the display mode. Can also. Furthermore, in this method, the data system and the control system are distinguished by paying attention to the wiring between the resources, but by paying attention to the display method of each resource, the display color of the resource shape is changed by the classification code and drawn. By doing so, a method of displaying the resources of the data system and the resources of the control system separately can be considered.

In the above-described embodiment, the relationship between the data hardware structure and the control hardware structure is established by attaching a tag with a unique number to the control signal generation portion and the MUX control input. As shown, by using the mouse to pick a control tag on the hardware structure of the data system or the hardware structure of the control system on the screen, the corresponding hardware structure of the control system or data system is displayed. It is also conceivable to display a window in which the hardware structure is drawn with the control tag at the center.

Further, in the above-described embodiment, a hardware structure having a relatively high degree of abstraction synthesized based on the description using an algorithm description in the operation specification description is displayed separately for the data system and the control system. However, the present invention can be applied to a case where a logic circuit synthesized from the description of the register transfer level using the description of the register transfer level as the operation specification description is displayed separately for the data system and the control system. Here, in order to distinguish the logic circuit shown in FIG. 20 into a data system and a control system, FIG. 21 shows a window display in which the wiring of the control system is indicated by broken lines.

[0040]

As described above, according to the present invention, the hardware structure synthesized by the system can be displayed separately for the data system and the control system. The hardware structure of the control system can be easily taken out and confirmed. Also, since the hardware structure is divided into two parts, a data system and a control system, the number of resources to be displayed per window can be reduced.
The speed of display is increased, and the load of placement / wiring is reduced by reducing the number of resources to be displayed, so that the quality of the hardware configuration diagram drawn in each window can be improved. Will be able to

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a hardware structure display device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of an operation specification description for explaining the embodiment shown in FIG. 1;

FIG. 3 is a view showing an example of a resource table used in the embodiment shown in FIG. 1;

FIG. 4 is a diagram showing an example of a classification code table used for FIG.

FIG. 5 is a view showing an example of a connection table used in the embodiment shown in FIG. 1;

6 is a diagram showing a display example of a hardware structure generated from the resource table shown in FIG. 3 and the connection table shown in FIG. 5;

FIG. 7 is a flowchart for explaining the operation of a hardware structure classification unit used in the embodiment shown in FIG. 1;

FIG. 8 is a flowchart showing a subroutine 1 called from the flowchart shown in FIG. 7;

FIG. 9 is a flowchart showing a subroutine 2 called from the flowchart shown in FIG. 8;

FIG. 10 is a view for explaining a state in which a classification code is set in each resource of the resource table by the processing of the flowchart shown in FIG. 7;

FIG. 11 is a diagram showing resource states classified by the processing of the flowchart shown in FIG. 7;

FIG. 12 is a diagram showing a resource table obtained by ending the processing of the flowchart shown in FIG. 7;

FIG. 13 is a flowchart for explaining the operation of a hardware structure display unit used in the embodiment shown in FIG. 1;

FIG. 14 is a flowchart for explaining the operation of a hardware structure display unit used in the embodiment shown in FIG. 1;

FIG. 15 is a flowchart for explaining the operation of a hardware structure display unit used in the embodiment shown in FIG. 1;

FIG. 16 is a view showing a window displayed for a data system in the hardware structure shown in FIG. 6;

FIG. 17 is a view showing a window displayed for a control system in the hardware structure shown in FIG. 6;

FIG. 18 is a flowchart for explaining the operation of a hardware structure display unit used in another embodiment of the present invention.

FIG. 19 is a view showing a window displaying a hardware structure obtained by the processing of the flowchart shown in FIG. 18;

FIG. 20 is a diagram showing an example in which the present invention is applied to a logic circuit.

FIG. 21 is a view showing a window in which the logic circuit shown in FIG. 18 is displayed separately for a data system and a control system.

[Explanation of symbols]

1. Hardware structure storage unit 2. Hardware structure classification unit 3. Hardware structure display unit 4. Bitmap display.

Claims (2)

(57) [Claims] 1. A system for synthesizing a hardware structure for realizing an operation specification by inputting an operation specification of hardware, wherein at least a resource table and a connection table are used as the hardware structure for realizing the operation specification synthesized by the system. A hardware structure storage unit that stores a code for classifying a data system and a control system for each resource of the resource table using the connection table of the hardware structure; and the classification code. Hardware structure display means for displaying the hardware structure by distinguishing between a data system hardware structure and a control system hardware structure by using the resource table in which is set and the connection table. Wear structure display device. 2. The hardware according to claim 1, wherein the hardware structure display means displays the hardware structure of the data system and the hardware structure of the control system in separate windows by using a multi-window. Structure display device.