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JP2833329B2 - Method for interstitial oxygen precipitation in semiconductor silicon wafer - Google Patents
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JP2833329B2 - Method for interstitial oxygen precipitation in semiconductor silicon wafer - Google Patents

Method for interstitial oxygen precipitation in semiconductor silicon wafer

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Publication number
JP2833329B2
JP2833329B2 JP7503592A JP7503592A JP2833329B2 JP 2833329 B2 JP2833329 B2 JP 2833329B2 JP 7503592 A JP7503592 A JP 7503592A JP 7503592 A JP7503592 A JP 7503592A JP 2833329 B2 JP2833329 B2 JP 2833329B2
Authority
JP
Japan
Prior art keywords
semiconductor silicon
silicon wafer
oxygen precipitation
interstitial oxygen
furnace
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP7503592A
Other languages
Japanese (ja)
Other versions
JPH05283417A (en
Inventor
秀明 早野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7503592A priority Critical patent/JP2833329B2/en
Publication of JPH05283417A publication Critical patent/JPH05283417A/en
Application granted granted Critical
Publication of JP2833329B2 publication Critical patent/JP2833329B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体シリコンウェハ
ース中の格子間酸素析出処理方法に関し、特に半導体製
造プロセスに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for interstitial oxygen precipitation in a semiconductor silicon wafer, and more particularly to a semiconductor manufacturing process.

【0002】[0002]

【従来の技術】従来の半導体シリコンウェハース中の格
子間酸素析出処理方法は、半導体製造プロセスの前熱処
理として、100〜200枚程度の半導体シリコンウェ
ハースを高純度石英ボートに乗せ、650℃の熱拡散炉
に20〜50cm/minのボートスピードにて入炉
後、窒素ガス雰囲気中で半導体シリコンウェハースを熱
拡散炉内で一定時間処理した後、熱拡散炉より20〜5
0cm/minのボートスピードにて出炉して行ってい
た。なお、半導体シリコンウェハースの熱拡散炉への入
炉に際し、熱拡散炉内は窒素ガスにて充分に置換してい
る。
2. Description of the Related Art A conventional method of interstitial oxygen precipitation in a semiconductor silicon wafer is to carry out thermal diffusion at 650 ° C. by placing about 100 to 200 semiconductor silicon wafers on a high-purity quartz boat as a pre-heat treatment in a semiconductor manufacturing process. After entering the furnace at a boat speed of 20 to 50 cm / min, the semiconductor silicon wafer is treated in a thermal diffusion furnace for a certain period of time in a nitrogen gas atmosphere, and then is heated for 20 to 5 cm.
The furnace was discharged at a boat speed of 0 cm / min. When the semiconductor silicon wafer enters the heat diffusion furnace, the inside of the heat diffusion furnace is sufficiently replaced with nitrogen gas.

【0003】[0003]

【発明が解決しようとする課題】上述した従来の半導体
シリコンウェハース中の格子間酸素析出処理方法は、1
00〜200枚程度の半導体シリコンウェハースを65
0℃の熱拡散炉に入炉しているため、図4に示す様に半
導体シリコンウェハース1の高純度石英ボート2に乗せ
た位置によって、半導体シリコンウェハース1が受ける
650℃での熱履歴が半導体シリコンウェハースAとB
とでは異なっている。即ち、半導体ウェハース内部に存
在する潜在欠陥密度が半導体シリコンウェハースAとB
とでは異なっており、N−MOS型DRAM(記憶保持
動作が必要な随時書き込み・読み出しメモリー)を形成
したときの半導体シリコンウェハース内部の酸素析出欠
陥密度は図5に示す様に高純度石英ボート2に乗せた半
導体シリコンウェハース1の位置が熱拡散炉側に近い半
導体シリコンウェハースA程、即ち650℃での熱履歴
が長い程高くなっており最大で4×107 コ/cm2
度の酸素析出欠陥密度差が生じている。半導体シリコン
ウェハース内部の酸素析出密度が高密度になることによ
って半導体活性領域への酸素析出欠陥の突き出しによ
り、又低密度であれば汚染不純物のゲッタリング効果不
足によって図5に示すようにリーク不良指数が増大しN
−MOS型DRAMの歩留に不安定さを生じさせるとい
う問題点を有していた。
The above-mentioned conventional method for interstitial oxygen precipitation in a semiconductor silicon wafer has the following problems.
65-200 semiconductor silicon wafers
As shown in FIG. 4, the heat history at 650 ° C. received by the semiconductor silicon wafer 1 at the temperature of 650 ° C. depends on the position of the semiconductor silicon wafer 1 on the high-purity quartz boat 2 because the semiconductor silicon wafer 1 enters the heat diffusion furnace at 0 ° C. Silicon wafers A and B
Is different. In other words, the latent defect density existing inside the semiconductor wafer is different from that of the semiconductor silicon wafers A and B.
The density of oxygen precipitation defects inside a semiconductor silicon wafer when an N-MOS type DRAM (a random write / read memory that requires a memory holding operation) is formed as shown in FIG. As the position of the semiconductor silicon wafer 1 placed on the substrate becomes closer to the semiconductor silicon wafer A closer to the heat diffusion furnace side, that is, the longer the heat history at 650 ° C., the higher is the oxygen precipitation of about 4 × 10 7 cells / cm 2. There is a defect density difference. Leakage defect index as shown in FIG. 5 due to protrusion of oxygen precipitation defects into the semiconductor active region when the oxygen precipitation density inside the semiconductor silicon wafer becomes high, or due to insufficient gettering effect of contaminant impurities when the density is low. Increases to N
-There is a problem that instability is caused in the yield of the MOS DRAM.

【0004】[0004]

【課題を解決するための手段】本発明の半導体シリコン
ウェハース中の格子間酸素析出処理方法は、熱拡散炉を
用いた650℃での半導体シリコンウェハース中の格子
間酸素析出処理方法において、高純度石英ボート2に乗
せた複数枚の半導体シリコンウェハースを450±10
℃の熱拡散炉3に入炉させた後、熱拡散炉の炉体温度を
650℃に昇温し、一定時間処理した後、熱拡散炉の炉
体温度を450±10℃に降温し、高純度石英ボートに
乗せた複数枚の半導体シリコンウェハース1を熱拡散炉
より出炉させることによって高純度石英ボートに乗せた
複数枚の半導体シリコンウェハースの位置によって生じ
る650℃での熱履歴差を解消することを特徴とする。
According to the present invention, there is provided a method for precipitating interstitial oxygen in a semiconductor silicon wafer at a temperature of 650 ° C. using a thermal diffusion furnace. A plurality of semiconductor silicon wafers placed on a quartz boat 2 are 450 ± 10
C., the furnace body temperature of the heat diffusion furnace is raised to 650.degree. C., and after a certain time treatment, the furnace body temperature of the heat diffusion furnace is lowered to 450. +-. 10.degree. A plurality of semiconductor silicon wafers 1 placed on a high-purity quartz boat were put out of a thermal diffusion furnace and put on the high-purity quartz boat.
It is characterized in that a difference in thermal history at 650 ° C. caused by positions of a plurality of semiconductor silicon wafers is eliminated.

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。図1は、本発明の半導体シリコンウェハース中の格
子間酸素析出処理方法の第1の実施例であり、N−MO
S型DRAM形成の前処理として利用する。高純度石英
ボート2に乗せた半導体シリコンウェハース1は熱拡散
炉内を窒素ガスで置換した炉体温度450±10℃の熱
拡散炉3にボートスピード50cm/minで入炉さ
せ、半導体シリコンウェハース1が熱拡散炉3に入炉し
終った後、熱拡散炉3の炉体温度をヒータ4の出力を上
げて0.5℃/minのレートで650℃まで昇温させ
る。熱拡散炉3の炉体温度を650℃に保った後、窒素
ガスを所定流量流しながら一定時間処理する。しかる
後、熱拡散炉3の炉体温度をヒータ4の出力を下げて
0.5℃/minのレートで450±10℃まで降温さ
せ、熱拡散炉3より高純度石英ボート2に乗せた半導体
シリコウェハース1をボートスピード50cm/min
で出炉させる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 shows a first embodiment of the method for interstitial oxygen precipitation in a semiconductor silicon wafer according to the present invention.
It is used as a pre-process for forming an S-type DRAM. The semiconductor silicon wafer 1 placed on the high-purity quartz boat 2 is introduced into the heat diffusion furnace 3 at a furnace temperature of 450 ± 10 ° C. at a boat speed of 50 cm / min by replacing the inside of the heat diffusion furnace with nitrogen gas. Is completed, the furnace body temperature of the heat diffusion furnace 3 is raised to 650 ° C. at a rate of 0.5 ° C./min by increasing the output of the heater 4. After maintaining the furnace body temperature of the thermal diffusion furnace 3 at 650 ° C., the processing is performed for a certain period of time while flowing a nitrogen gas at a predetermined flow rate. Thereafter, the temperature of the furnace body of the heat diffusion furnace 3 is lowered to 450 ± 10 ° C. at a rate of 0.5 ° C./min by lowering the output of the heater 4, and the semiconductor is placed on the high-purity quartz boat 2 from the heat diffusion furnace 3. Silico wafer 1 at boat speed 50cm / min
Let the furnace out.

【0006】本発明の第1の実施例の半導体シリコンウ
ェハース中の格子間酸素析出処理方法を用いた半導体シ
リコンウェハース1に1000〜1200℃の高温熱処
理を経ないN−MOS型DRAMの形成を行なった後の
半導体シリコンウェハース内部の酸素析出欠陥密度,リ
ーク不良指数と高純度石英ボート2に乗せた半導体シリ
コンウェハース1の位置との関係を図2に示す。
An N-MOS type DRAM which is not subjected to a high-temperature heat treatment at 1000 to 1200 ° C. is formed on a semiconductor silicon wafer 1 by using the method of interstitial oxygen precipitation treatment in a semiconductor silicon wafer according to the first embodiment of the present invention. FIG. 2 shows the relationship between the density of oxygen precipitation defects inside the semiconductor silicon wafer, the leak failure index, and the position of the semiconductor silicon wafer 1 placed on the high-purity quartz boat 2.

【0007】N−MOS型DRAMの形成を行なった半
導体シリコンウェハース内部の酸素析出欠陥密度は、第
1の実施例の半導体シリコンウェハース中の格子間酸素
析出処理方法における高純度石英ボート2に乗せた半導
体シリコンウェハース1の位置、即ち図1に示す半導体
シリコンウェハースCとDとの位置に依らず、650℃
での熱履歴が均一である為、ほぼ均一に保たれリーク不
良指数も低減、安定化される。
The oxygen precipitation defect density inside the semiconductor silicon wafer on which the N-MOS type DRAM was formed was put on the high purity quartz boat 2 in the interstitial oxygen precipitation treatment method in the semiconductor silicon wafer of the first embodiment. 650 ° C. regardless of the position of the semiconductor silicon wafer 1, that is, the positions of the semiconductor silicon wafers C and D shown in FIG.
, The heat history is kept uniform, and the leak failure index is reduced and stabilized.

【0008】次に本発明の半導体シリコンウェハース中
の格子間酸素析出処理方法の第2の実施例について説明
する。この実施例は熱拡散炉3の炉体温度の昇温,降温
レートを5.0℃/minにしたものであり、C−MO
S型DRAM形成の前処理として利用する。C−MOS
型DRAM形成の半導体製造プロセスにおける熱処理内
に1000〜1200℃の高温熱処理を有している為、
半導体シリコンウェハース内部に多くの潜在欠陥を必要
としない。即ち炉体温度の昇温,降温レートを高めるこ
とによって潜在欠陥を抑制する。この実施例の半導体シ
リコンウェハース中の格子間酸素析出処理を用いた半導
体シリコンウェハース1にC−MOS型DRAMの形成
を行なった後の半導体シリコンウェハース内部の酸素析
出欠陥密度、リーク不良指数と高純度石英ボート2に乗
せた半導体シリコンウェハース1の位置との関係を図3
に示す。C−MOS型DRAMの形成を行なった半導体
シリコンウェハース内部の酸素析出欠陥密度は、第2の
実施例の半導体シリコンウェハース中の格子間酸素析出
処理方法における高純度石英ボート2に乗せた半導体シ
リコンウェハース1の位置に依らず、650℃での熱履
歴が均一である為、ほぼ均一に保たれ、リーク不良指数
は安定化される。
Next, a description will be given of a second embodiment of the method for interstitial oxygen precipitation in a semiconductor silicon wafer according to the present invention. In this embodiment, the furnace body temperature of the thermal diffusion furnace 3 was raised and lowered at a rate of 5.0 ° C./min.
It is used as a pre-process for forming an S-type DRAM. C-MOS
Since it has a high-temperature heat treatment of 1000 to 1200 ° C. in the heat treatment in the semiconductor manufacturing process for forming the type DRAM,
Does not require many potential defects inside the semiconductor silicon wafer. That is, latent defects are suppressed by increasing the rate of temperature rise and fall of the furnace body temperature. Oxygen precipitation defect density, leak failure index and high purity inside a semiconductor silicon wafer after forming a C-MOS type DRAM on a semiconductor silicon wafer 1 using interstitial oxygen precipitation processing in the semiconductor silicon wafer of this embodiment. FIG. 3 shows the relationship with the position of the semiconductor silicon wafer 1 placed on the quartz boat 2.
Shown in The density of the oxygen precipitation defects inside the semiconductor silicon wafer on which the C-MOS type DRAM was formed is determined by the semiconductor silicon wafer placed on the high-purity quartz boat 2 in the interstitial oxygen precipitation treatment method in the semiconductor silicon wafer of the second embodiment. Irrespective of the position of 1, the heat history at 650 ° C. is uniform, so that the heat history is kept almost uniform, and the leak failure index is stabilized.

【0009】[0009]

【発明の効果】以上説明したように本発明は、熱拡散炉
を用いた650℃での半導体シリコンウェハース中の格
子間酸素析出処理方法において、高純度石英ボートに乗
せた半導体シリコンウェハースを炉体温度450±10
℃の熱拡散炉へ入炉し、また熱拡散炉より出炉させるこ
とにより、650℃での一定時間処理が高純度石英ボー
トに乗せた半導体シリコンウェハースの位置に依らず均
一化された。即ち、半導体製造プロセスにおける熱処理
を経た半導体シリコンウェハース内部に、一定密度の酸
素析出欠陥を得ることができ、この酸素析出欠陥が、適
正なゲッタリングを行なうことにより、リーク不良の原
因となる汚染不純物を除去し、その結果、安定した歩留
りを得る効果を有する。
As described above, according to the present invention, in a method for interstitial oxygen precipitation in a semiconductor silicon wafer at 650 ° C. using a thermal diffusion furnace, the semiconductor silicon wafer placed on a high-purity quartz boat is Temperature 450 ± 10
By entering the furnace into and out of the furnace, the treatment at 650 ° C. for a certain time was made uniform regardless of the position of the semiconductor silicon wafer placed on the high-purity quartz boat. In other words, a certain density of oxygen precipitation defects can be obtained inside the semiconductor silicon wafer that has undergone the heat treatment in the semiconductor manufacturing process, and the oxygen precipitation defects cause contaminant impurities that cause leak failure by performing proper gettering. Is removed, and as a result, a stable yield is obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例を説明するための図であ
る。
FIG. 1 is a diagram for explaining a first embodiment of the present invention.

【図2】本発明の第1の実施例の半導体シリコンウェハ
ースの位置と酸素析出欠陥密度およびリーク不良指数と
の関係を示す図である。
FIG. 2 is a diagram showing the relationship between the position of a semiconductor silicon wafer according to the first embodiment of the present invention and the oxygen precipitation defect density and the leak failure index.

【図3】本発明の第2の実施例の半導体シリコンウェハ
ースの位置と酸素析出欠陥密度およびリーク不良指数と
の関係を示す図である。
FIG. 3 is a diagram showing a relationship between a position of a semiconductor silicon wafer, an oxygen precipitation defect density, and a leak failure index according to a second embodiment of the present invention.

【図4】従来例を説明するための図である。FIG. 4 is a diagram for explaining a conventional example.

【図5】従来例の半導体シリコンウェハースの位置と酸
素析出欠陥密度およびリーク不良指数との関係を示す図
である。
FIG. 5 is a diagram showing the relationship between the position of a conventional semiconductor silicon wafer, the density of oxygen precipitation defects, and the leak failure index.

【符号の説明】[Explanation of symbols]

1 半導体シリコンウェハース 2 高純度石英ボート 3 熱拡散炉 4 ヒータ Reference Signs List 1 semiconductor silicon wafer 2 high-purity quartz boat 3 thermal diffusion furnace 4 heater

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 ボートに搭載した複数枚の半導体シリコ
ンウェハースを熱拡散炉に入出炉させ、熱処理を行い
導体シリコンウェハース中の格子間酸素を析出させる方
法において、前記ボートに搭載した複数枚の半導体シリ
コンウェハースを450±10℃の熱拡散炉に入炉した
後、0.5〜5.0℃/minのレートにて昇温させ6
50℃で一定時間処理した後、0.5〜5.0℃/mi
nのレートで降温させ450±10℃で出炉することを
特徴とする半導体シリコンウェハース中の格子間酸素析
出処理方法。
1. A plurality of semiconductor silicon mounted on a boat
In the heat diffusion furnace, heat treatment is performed to precipitate interstitial oxygen in the semiconductor silicon wafer, and a plurality of semiconductor silicon wafers mounted on the boat are heated to 450 ± 10 ° C. After entering the heat diffusion furnace, the temperature was raised at a rate of 0.5 to 5.0 ° C./min to 6
After treatment at 50 ° C. for a certain time, 0.5-5.0 ° C./mi
A method of precipitating interstitial oxygen in a semiconductor silicon wafer, wherein the temperature is lowered at a rate of n and the furnace is discharged at 450 ± 10 ° C.
JP7503592A 1992-03-31 1992-03-31 Method for interstitial oxygen precipitation in semiconductor silicon wafer Expired - Lifetime JP2833329B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7503592A JP2833329B2 (en) 1992-03-31 1992-03-31 Method for interstitial oxygen precipitation in semiconductor silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7503592A JP2833329B2 (en) 1992-03-31 1992-03-31 Method for interstitial oxygen precipitation in semiconductor silicon wafer

Publications (2)

Publication Number Publication Date
JPH05283417A JPH05283417A (en) 1993-10-29
JP2833329B2 true JP2833329B2 (en) 1998-12-09

Family

ID=13564543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7503592A Expired - Lifetime JP2833329B2 (en) 1992-03-31 1992-03-31 Method for interstitial oxygen precipitation in semiconductor silicon wafer

Country Status (1)

Country Link
JP (1) JP2833329B2 (en)

Also Published As

Publication number Publication date
JPH05283417A (en) 1993-10-29

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