JP2845991B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a highly integrated semiconductor device provided with an element having a three-dimensional structure such as a trench capacitor element and a stack capacitor element.

[Prior art]

Dynamic random access memory (DRAM)
And static random access memory (SRAM)
In such semiconductor devices, even if the cell area of the capacitor is reduced due to high integration, it is necessary to suppress a decrease in the capacitance of the capacitor due to the need to ensure soft error resistance. For this reason, the adoption of a trench type capacitor or a stacked type capacitor having a three-dimensional structure in place of the conventional planar structure is becoming indispensable. As a result, the step formed on the substrate surface in the process of element formation becomes steep, and the groove or The aspect ratio of the holes tends to increase. In order to realize a highly reliable and low-resistance electrical connection in such a steep step, a groove or a hole having a large aspect ratio, or an upper layer thereof, and to realize a highly reliable and high-performance semiconductor device, a step or a groove is required. Alternatively, the holes need to be made as flat as possible with a wiring conductor film. In particular, it is necessary to fill the above film almost completely with a groove such as an electrode forming region of a trench type capacitor element or a hole such as a contact hole and to planarize it. For this purpose, a wiring conductor film having excellent step coverage is indispensable. Conventionally, polycrystalline silicon formed by low-pressure chemical vapor deposition has been widely used as an electrode of a trench capacitor. It is a membrane.

[Problems to be solved by the invention]

In general, after forming a polycrystalline silicon film containing no dopant, a dopant is introduced into the polycrystalline silicon film by a well-known ion implantation technique. There is a drawback that the resistance is higher by one digit or more than that of a product. High resistance results in degradation of circuit performance. As the cross-sectional area of the current path is reduced due to higher integration, replacement with lower resistance materials is becoming indispensable. The fact that it is difficult to inject dopants into the bottom of a groove or a hole also poses a problem, particularly when the aspect ratio of the groove or hole is increased due to the progress of miniaturization. In addition, in this method, when applied to a general CMOS semiconductor device for a memory, it is necessary to separately implant p-type and n-type dopants, and there is a problem that the manufacturing process becomes complicated. Further, in order to eliminate the influence of diffusion and mixing of the dopant, there is a restriction that the p-type and n-type dopant regions cannot be directly connected, and the degree of freedom in wiring is significantly impaired. According to the method of forming a polycrystalline silicon film containing a dopant, some of the above problems can be solved, but such a film is inferior in step coverage than a film containing no dopant, so the application location is Limited. In some cases, tungsten can be used instead of the polycrystalline silicon film. The tungsten film is formed by a selective chemical vapor deposition method. If this method is realized, it is considered to be effective for flattening. However, tungsten has a drawback that it reacts with silicon at a relatively low temperature of about 600 ° C., which is a great limitation on a manufacturing process after film formation. In particular, the borrowing method widely used to improve the coverage of wiring layers
A major disadvantage is that it does not withstand heat treatment at about 850 ° C. for fluidization of the phosphosilicate glass (BPSG) film. Also, the aluminum alloy wiring layer formed on the upper layer
There is a drawback that it reacts at about 450 ° C. to increase wiring resistance. Furthermore, at present, there are process problems such as low reproducibility of film formation, difficulty in maintaining the selectivity, and a small upper limit of the film thickness that can be selectively formed, leading to practical use. Not in. The method of non-selectively forming tungsten by the low pressure chemical vapor deposition method solves some of the problems in the process, but the low heat resistance of the contact portion is similar to the case of the selective growth described above. It is. An object of the present invention is to solve the above-mentioned conventional problems and to provide a highly reliable, high-performance, highly integrated semiconductor device including an element having a three-dimensional structure such as a trench capacitor element or a stack capacitor element. is there.

[Means for Solving the Problems]

In order to achieve the above object, according to the present invention, an electrode or the like of a trench capacitor is manufactured using a film containing titanium nitride as a main component instead of a conventional polycrystalline silicon film. The formation of a titanium nitride film by a low pressure chemical vapor deposition method is described in U.S. Pat. No. 4,570,328 and Japanese Patent Application No. 63-91556. With reference to the above-mentioned prior art relating to the formation of a titanium nitride film by low pressure chemical vapor deposition, at least one of the grooves or holes having an aspect ratio of 2 or more is formed by forming a film containing titanium nitride as a main component. If the filling is 75% or more of the volume, it is found that the film is not suitable for manufacturing a highly reliable and high-performance semiconductor device because a fine crack is generated in the film or a gap is formed in the filling portion. It became clear that suitable special film forming conditions were necessary. In forming titanium nitride, the flow rate of titanium tetrachloride is 1/100 to 1/10 of the flow rate of ammonia, the substrate temperature is 650 to 800 ° C., and the pressure is 0.01 to 0.5 T.
Under conditions of orr, a film mainly composed of titanium nitride is formed by reduced pressure chemical vapor deposition, or the flow rate of titanium tetrachloride is 1/100 to 1/10 of the flow rate of ammonia, and the substrate temperature is 450-600 ° C and pressure 0.01-0.5Tor
Under conditions of r, a film mainly composed of titanium nitride is formed by bias plasma chemical vapor deposition, or the flow rate of titanium tetrachloride is 1/100 to 1/10 of the flow rate of nitrogen, and the substrate temperature is Is 500 to 850 ° C, and the pressure is 0.01 to 0.
A film mainly composed of titanium nitride is formed by a bias plasma chemical vapor deposition method under a condition of 5 Torr. As the apparatus, a cold wall type CVD apparatus in which the reaction chamber walls are cooled is used.

[Action]

The resistivity of the film formed by the implementation of the present invention is lower by one digit or more than that of polycrystalline silicon doped with impurities. As a result, the performance of the semiconductor device is improved as compared with a conventional semiconductor device using polycrystalline silicon. The film containing titanium nitride as a main component formed under the above-described method and conditions has no cracks and fills the grooves or holes without gaps. Since a contact hole, a via hole, an electrode of a trench capacitor element, and the like are formed by a film containing titanium nitride as a main component that is chemically stable and has high heat resistance, a highly reliable semiconductor device is realized. Further, by improving the coverage of the upper wiring layer, a highly reliable and high performance semiconductor device can be manufactured.

【Example】

Embodiment 1 A first embodiment will be described with reference to FIG. 1 and FIG. This embodiment is an embodiment in which the present invention is applied to a semiconductor device having a CMOS memory circuit having a stacked capacitor element. FIG. 1 is a view showing a semiconductor device of the present invention. In the figure, the surface of the silicon substrate 10 has a thickness of 0.3
μm field oxide film 11 is formed, and a gate and wiring layer 12 made of polycrystalline silicon doped with a dopant.
Is installed. The gate lengths are all 0.6 μm. A thin film 13 containing silicon dioxide as a main component was formed on the gate and wiring layer 12 and processed, and then a polycrystalline silicon thin film 14 doped with a dopant was formed. The thickness of the polycrystalline silicon thin film is 120 nm. Silicon dioxide thin film 1
5, a polycrystalline silicon thin film 16 doped with a dopant is formed and processed, and a laminated film of a silicon dioxide thin film and a silicon nitride thin film serving as a dielectric layer of a capacitor for storing electric charge on the polycrystalline silicon thin film 16 has a thickness of 30 nm. After forming and processing, a polycrystalline silicon thin film 17 doped with a dopant is formed and processed. As an interlayer insulating film, a film 18 containing silicon dioxide as a main component formed by plasma enhanced chemical vapor deposition is formed,
After a contact hole 19 having a diameter of 0.6 μm and a depth of 1.6 μm is opened almost perpendicular to the surface of the substrate 10 by a dry etching technique, a thin film containing titanium nitride as a main component is formed using a cold wall type low pressure chemical vapor deposition apparatus. Formed by a low pressure chemical vapor deposition method. The raw materials used were titanium tetrachloride and ammonia. Each flow rate is 7SCCM (Standard Cubic Centimeter Per Minute: Standard Cubic Ce)
ntimeter per Minute), 100 SCCM, the substrate temperature is 700 ° C., and the pressure in the reaction chamber during film formation is 0.2 Torr. 200 SCCM of hydrogen was used as a carrier gas. After forming a film containing titanium nitride as a main component with a thickness of 0.4 μm, a resist is applied, and etching is performed by a well-known etch-back technique under conditions that the etching rates of the titanium nitride and the resist are substantially equal. The films 20 and 21 containing titanium nitride as a main component remained only in the hole 19 and in the step. The thin film 21 filled up 85% of the volume of the contact hole 19. Next, after forming a tungsten wiring layer 22 by sputtering and patterning, a BPSG film 23 is formed by an atmospheric pressure chemical vapor deposition method as an interlayer insulating film, and heat-treated in nitrogen at 850 ° C. for 20 minutes. An aluminum alloy wiring layer 24 containing 0.5% copper was formed by sputtering and patterned. The film 21 containing titanium nitride as a main component is electrically kept floating. FIG. 2 is a view showing a conventional semiconductor device. On the surface of the silicon substrate 30, a field oxide film 31, a gate and wiring layer 32, a thin film 33 mainly composed of silicon dioxide, a polycrystalline silicon thin film 34,
Silicon dioxide thin film 35, polycrystalline silicon thin film 36, laminated film of silicon dioxide thin film and silicon nitride thin film to be a dielectric layer of capacitor, polycrystalline silicon thin film 37, silicon dioxide formed by plasma enhanced chemical vapor deposition A contact hole 39 having a diameter of 0.6 μm and a depth of 1.6 μm is formed. Next, tungsten 40 was grown only in the contact holes by selective chemical vapor deposition of tungsten.
The thickness of the tungsten 40 is 1.0 μm, which corresponds to 62.5% of the depth of the contact hole. 62.5% of the volume in the contact hole was filled with tungsten 40. Then, after forming a tungsten wiring layer 41 by sputtering and patterning, a BPSG film 42 is formed as an interlayer insulating film by atmospheric pressure chemical vapor deposition and subjected to a heat treatment in nitrogen at 850 ° C. for 20 minutes. An aluminum alloy wiring layer 43 containing 0.5% copper was formed thereon by sputtering and patterned. In the device shown in FIG. 1, the surface of the interlayer film 18 is flatter than the surface of the interlayer film 38 in the device shown in FIG. Therefore, the coverage of the tungsten wiring 22 is improved, and the average sheet resistance is 15% lower than the average sheet resistance of the wiring 41 of the apparatus shown in FIG.
%, And the performance of the semiconductor device has been improved. Further, in the device shown in FIG. 1, the surface of the interlayer film 23 is flatter than the surface of the interlayer film 42 in the device shown in FIG. As a result, the coverage of the aluminum alloy wiring 24 was also improved, and the average sheet resistance was reduced by 10% from the average sheet resistance of the wiring 43 of the apparatus shown in FIG. In addition, the wiring 24 has improved electromigration resistance and stress migration resistance by improving the above-mentioned coverage, and high reliability of the semiconductor device has been achieved. In this example, 85% of the contact hole volume was used.
Was filled with a thin film containing titanium nitride as a main component, and it was found that the above-described effect had the effect of the present invention when the thin film was filled to 75% or more of the internal volume. In addition, the method of the present invention, a conventionally known method regardless of the conditions,
Depending on the conditions, when a thin film containing titanium nitride as a main component is formed, cracks may occur in the film when the thickness is 100 nm or more on a flat portion, and a gap may remain inside the contact hole, resulting in reliability of the semiconductor device. However, it is inferior to the apparatus of the present embodiment according to the present invention. A film containing titanium nitride as a main component, the flow rate of titanium tetrachloride is 1/100 to 1/10 of the flow rate of ammonia, and the substrate temperature is 650 to 800 ° C., and the pressure is 0.01 to 0.5 Torr.
r is a film formed by a reduced pressure chemical vapor deposition method under the condition, or the flow rate of titanium tetrachloride is 1/100 to 1/10 of the flow rate of ammonia, and the substrate temperature is 450 to
A film formed by bias plasma chemical vapor deposition under a condition of 600 ° C. and a pressure of 0.01 to 0.5 Torr, or a flow rate of titanium tetrachloride is 1/100 to 1/10 of a flow rate of nitrogen. And a film formed by a bias plasma enhanced chemical vapor deposition method under the condition that the substrate temperature is 500 to 850 ° C. and the pressure is 0.01 to 0.5 Torr, a particularly excellent effect was obtained. . The contact resistance of the device of FIG. 1 is 40% lower than the contact resistance of the device of FIG. This is because the film 19 mainly composed of titanium nitride does not react with the polycrystalline silicon 14 during the heat treatment after the formation of the BPSG film 23. Tungsten 40 causes a silicide formation reaction with polycrystalline silicon during heat treatment,
As a result, the contact resistance increases. Embodiment 2 FIGS. 3 (a) and 3 (b) are diagrams showing a semiconductor device according to an embodiment of the present invention. This embodiment is an embodiment in which the present invention is applied to a semiconductor device having a trench circuit and a memory circuit. In FIG. 3A, a p region 51 is formed on the surface of the p ⁺ silicon substrate 50, and a trench hole 52 having a diameter of 0.3 μm and a depth of 7 μm is opened. The n ⁺ region 54 functioning as a bit line is an element isolation region 53 made of silicon dioxide.
Was formed by ion implantation. After forming the dielectric layer 55 of the capacitor made of silicon dioxide, n ⁺ polycrystalline silicon 56 was embedded as an electrode of the capacitor.
The capacitor was connected to the MOS transistor by a contact 57, and a titanium nitride film 58 was formed as a gate electrode of the transistor. The titanium nitride film was formed by the low pressure chemical vapor deposition method using titanium tetrachloride and ammonia as raw materials using a cold wall type low pressure chemical vapor deposition apparatus as in Example 1. The deep hole above the trench hole is completely filled with the thin film 58. The titanium nitride film 58 is stacked with an aluminum film containing 0.5% copper having a thickness of 0.5 μm and formed as an upper layer, and also functions as a word line. In the conventional device, a polycrystalline silicon film doped with a dopant is used as a gate electrode instead of the titanium nitride film 58. The polycrystalline silicon film has a higher resistance than the titanium nitride film, causing an increase in word line resistance. Further, since the polycrystalline silicon film reacts with aluminum at a relatively low temperature, aluminum having low resistance cannot be laminated on the upper layer as in the semiconductor device of this embodiment. In the device of this embodiment, the word line has a lower resistance than the conventional device, the signal delay is reduced, and as a result, the memory access time is 20% faster than that of the conventional device, and high performance is achieved. . In the device of the present invention shown in FIG. 3 (b), after a titanium nitride film 78 is formed as a gate electrode of a transistor, a flat portion is nitrided by a well-known etch-back technique in the same manner as in the first embodiment. Etching was performed until the titanium film was removed. 92% of the inner volume of the deep hole above the trench hole
Is filled with a titanium nitride film, and after the film is removed from the flat portion, an aluminum film 79 containing 0.5% of copper having the same thickness as that of the apparatus shown in FIG. The flatness of the surface of an interlayer insulating film (not shown) formed later on aluminum film 79 is improved. For this reason, the coverage of the bit line made of the aluminum film containing 0.5% copper, which is connected via the contact from the n ⁺ region 74 formed on the insulating film, is improved. Therefore, in the semiconductor device of FIG. 3B of the present invention, the access time is further reduced by 10% compared to the device of FIG. 3A, and the electromigration resistance and the stress migration resistance of the bit line are improved. Note that in Examples 1 and 2, silicon was not included in the film mainly containing aluminum in contact with the film mainly containing titanium nitride for the following reason. Although a film containing titanium nitride as a main component formed by a low-pressure chemical vapor deposition method has a relatively coarse columnar structure, when silicon is contained in a film containing aluminum as a main component which is in contact with the film, the silicon is not treated during heat treatment. This is because it has been found that silicon tends to precipitate at the boundary of the columnar structure. Therefore, when an aluminum film containing silicon is used, the sheet resistance of a film containing titanium nitride as a main component increases. Therefore, using a film containing no silicon is more desirable for higher performance of a semiconductor device. It is needless to say that the present invention includes, in addition to the metal used in the examples, a case where a wiring layer mainly containing copper is used in order to further reduce the sheet resistance of the wiring. Third Embodiment A description will be given with reference to FIGS. 4 and 5. This embodiment is an embodiment in which the present invention is applied to a semiconductor device having a two-layer aluminum wiring. FIG. 4 is a view showing a semiconductor device of the present invention. In FIG. 4, a thermal oxide film 81 having a thickness of 0.3 .mu.m is formed on the surface of a silicon substrate 80. On this thermal oxide film 81, a film mainly composed of aluminum containing 1% of copper is formed. Aluminum alloy wiring 82 is provided. The wiring width is 0.
5 μm, the interval between the wirings is 0.7 μm, and the thickness of the wiring is 0.7 μm. After forming a film 83 containing silicon dioxide as a main component formed by a bias ECR method, a film containing titanium nitride as a main component is formed in the same manner as in Example 1, and titanium nitride is used as a main component between wirings. Etching was performed so that the remaining film 84 remained. After the etch back, the film 84 was filled to 75% of the inner volume of the groove on the surface of the silicon dioxide film 83. Next, a film 85 containing silicon dioxide as a main component is formed by plasma enhanced chemical vapor deposition.
And a second layer of aluminum alloy wiring 86 is provided thereon. FIG. 5 is a view showing a conventional apparatus. In the apparatus shown in FIG. 5, a film 93 containing silicon dioxide as a main component is formed on an aluminum alloy wiring 92 by the same method as the apparatus shown in FIG. 4, and then a coating glass film 94 is applied and heat-treated. After the heat treatment, 70% of the inner volume of the groove on the surface of the silicon dioxide film 93 was filled with the glass film 94. Next, a film 95 containing silicon dioxide as a main component was formed by a plasma chemical vapor deposition method, and a second layer of aluminum alloy wiring 96 was provided thereon. The silicon dioxide-based film 85 of the device according to the invention of FIG. 4 has a flatter surface than the silicon dioxide-based film 95 of the device of FIG. The wiring coverage has been improved, and a higher performance due to a reduction in sheet resistance, and an improvement in electromigration resistance and stress migration resistance have been realized. Further, if the film 84 containing titanium nitride as a main component is kept at the ground potential in the apparatus shown in FIG. 4, crosstalk between the wiring layers is prevented, so that the period of the pulse current flowing in the wiring layers can be shortened. This has the effect that the performance of the semiconductor device can be further improved.

【The invention's effect】

As described in detail above, according to the present invention, a highly reliable, high-performance, highly integrated semiconductor device including an element having a three-dimensional structure such as a trench capacitor element or a stack capacitor element can be realized. .

[Brief description of the drawings]

1, 3 and 4 are cross-sectional views of a semiconductor device according to an embodiment of the present invention, and FIGS. 2 and 5 are cross-sectional views of a conventional semiconductor device. Reference numeral 12: a film mainly composed of titanium nitride 22: tungsten wiring 22: BPSG film 24: aluminum alloy wiring containing 0.5% copper 40: tungsten 41: tungsten wiring 42: BPSG film 43: Aluminum alloy wiring containing 0.5% copper 58: Film composed mainly of titanium nitride 59: Aluminum alloy wiring containing 0.5% copper 78: Film composed mainly of titanium nitride 79: 0.5 % Aluminum alloy wiring 84 ......... A film containing titanium nitride as a main component

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Shinichi Taji 1-280 Higashi Koikebo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. (56) References JP-A-63-174319 (JP, A) (58) Surveyed fields (Int.Cl. ⁶ , DB name) H01L 21/28-21/288 H01L 21/44-21/445 H01L 29/40-29/51 C23C 16/00-16/56

Claims (17)

(57) [Claims] A step of forming an insulating film on the substrate; a step of forming an opening in the insulating film; a step of placing the substrate having the opening formed therein in a reaction vessel; In the reaction vessel, titanium tetrachloride and ammonia are introduced such that the flow rate of titanium tetrachloride is 1/100 or more and 1/10 or less with respect to ammonia, and the temperature of the base is 650 ° C. or more.
Filling the opening with a titanium nitride film under the condition that the temperature is set to 00 ° C. or less and the pressure in the reaction vessel becomes 0.01 Torr or more and 0.5 Torr or less. . 2. The method according to claim 1, wherein the step of filling the opening with a titanium nitride film is a step of filling at least 85% of the internal volume of the opening. . 3. The method according to claim 1, further comprising the step of forming an aluminum film not containing silicon on said titanium nitride film. 4. The method according to claim 1, further comprising the step of forming a copper-aluminum alloy film on said titanium nitride film. 5. The method according to claim 1, wherein said titanium nitride film is formed to a thickness of 100 nm or more. 6. A step of forming an insulating film on a substrate, a step of forming an opening in the insulating film, and a flow rate of titanium tetrachloride is 1/100 or more with respect to ammonia.
Titanium tetrachloride and ammonia are flowed so as to be / 10 or less, the temperature of the base is set to 450 ° C. or more and 600 ° C. or less, the pressure is set to 0.01 Torr or more and 0.5 Torr or less, and plasma is used to open the opening. Filling a titanium nitride film. 7. The method according to claim 6, wherein the step of filling the opening with a titanium nitride film is a step of filling at least 85% of the internal volume of the opening. . 8. The method of manufacturing a semiconductor device according to claim 6, further comprising the step of forming an aluminum film not containing silicon on said titanium nitride film. 9. The method according to claim 6, further comprising the step of forming a copper-aluminum alloy film on said titanium nitride film. 10. The method according to claim 6, wherein said titanium nitride film is formed to a thickness of 100 nm or more. 11. A step of forming an insulating film on a substrate, a step of forming an opening in the insulating film, and a flow rate of titanium tetrachloride is 1/100 to 1/10 with respect to nitrogen. Titanium tetrachloride and ammonia are passed through, the temperature of the substrate is set at 500 ° C or more and 850 ° C or less,
Filling the opening with a titanium nitride film using plasma at a pressure of not less than Torr and not more than 0.5 Torr. 12. The method according to claim 11, wherein the step of filling the opening with a titanium nitride film is a step of filling at least 85% of the internal volume of the opening. . 13. The method of manufacturing a semiconductor device according to claim 11, further comprising a step of forming an aluminum film not containing silicon on said titanium nitride film. 14. The method according to claim 11, further comprising the step of forming a copper-aluminum alloy film on said titanium nitride film. 15. The method according to claim 11, wherein said titanium nitride film is formed to a thickness of 100 nm or more. 16. A step of forming a groove in a semiconductor substrate, a step of forming a first diffusion layer in a lower peripheral portion of the groove in the semiconductor substrate, and forming a gate insulating film on a side surface of the groove. A step of forming a second diffusion layer in the surface of the semiconductor substrate, and a step of filling the trench with a titanium nitride film to be a gate electrode using a cold-wall type CVD apparatus. A method for forming a MIS transistor, which is characterized by the following. 17. A step of forming a trench-type capacitor in a semiconductor substrate, and a step of forming a trench-type capacitor in an upper peripheral portion of the capacitor in the semiconductor substrate.
Forming a diffusion layer of: a step of forming a gate insulating film on a side surface of a groove of the semiconductor substrate on the capacitor; a step of forming a second diffusion layer in the surface of the semiconductor substrate; Filling a titanium nitride film to be a gate electrode by using a cold wall type CVD apparatus.