JP2852268B2 - Image forming device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus for an electrophotographic printing machine having a laser beam scanning unit.

[0002]

2. Description of the Related Art In an image forming apparatus for forming an image on a record carrier by scanning a laser beam, an auto power control (APC) is provided in order to keep a constant light amount of a laser diode light source. . APC of this type of conventional image forming apparatus is disclosed in, for example,
As in the prior art disclosed in Japanese Patent Application Laid-Open No. 207237, “Image Recording Apparatus”, input values of a plurality of
The LD drive current is controlled by changing the APC, and the APC is executed by interrupt processing of the CPU, so that the APC execution interval can be changed to control the optimal light amount and cope with sudden environmental changes. For example, a method using firmware (F / W) using a CPU, which keeps the light amount of a laser diode constant by software using a CPU, is generally adopted.

[0003]

In this type of electrophotographic printing machine, the printing speed and the resolution have been increasingly increased in recent years.
Although high-speed PCs have been demanded, APC is performed by the CPU in the conventional apparatus, so that C is capable of high-speed processing.
A PU is required, and APC is
Is performed, the load on the CPU becomes too large. Therefore, there has been a problem that a CPU dedicated to APC must be provided in addition to a CPU that performs other controls.

The present invention has been made to solve such a problem, and an object of the present invention is to provide an image forming apparatus capable of performing APC high-speed processing without using a CPU that performs high-speed processing.

[0005]

According to an image forming apparatus of the present invention, in an image forming apparatus having a laser beam scanning unit, a laser emission amount is controlled by an automatic power control of a laser diode used in the laser beam scanning unit. And a control means configured by hardware combining an addition / subtraction circuit and a sample-and-hold circuit for causing the voltage obtained by the photoelectric conversion means to convert the voltage to follow the reference voltage.

Further, the image forming apparatus of the present invention comprises at least
LD (laser diode) drive circuit for emitting a laser diode with a given drive voltage, PD (photodiode) circuit for converting the amount of light emitted from the laser diode into an analog voltage, analog voltage and reference from the PD circuit A subtraction circuit for subtracting an analog voltage (PD reference voltage) , a voltage holding output circuit for holding the analog voltage, a first adding circuit for adding the output of the voltage holding output circuit and the output of the subtraction circuit, A second adding circuit for adding an output of the voltage holding output circuit and a reference analog voltage (drive reference voltage) , a voltage holding synchronizing circuit for determining holding timing of the voltage holding output circuit, and the LD
An LD light emission signal generation circuit for determining whether the operation of the drive circuit is valid or invalid; an image signal generation unit for generating an image signal; a print start position synchronization circuit for detecting the position of light of the laser diode; includes an LD light amount stability determining circuit for determining the stability of the light amount, and a CPU for outputting a drive start signal of the laser diode, the subtraction times
The first addition so that the output (difference voltage) of the road approaches 0V.
Feedback system using a circuit and the second addition circuit
The LD driving voltage which is the output of the second adding circuit.
Is controlled .

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the image forming apparatus of the present invention, and 1 indicates the entire image forming apparatus. The LD emission signal generation circuit 9 includes an LD drive start signal and a print start signal from the CPU 12 that controls the entire apparatus, a print position signal from the print start position synchronization circuit 8,
An image signal from the image signal generator 13 is input, an LD drive signal is output to the LD drive circuit 6, and the voltage holding synchronous circuit 10
To output a light intensity setting start signal to

The voltage holding synchronizing circuit 10 includes a CPU 12
, And a light amount setting start signal from the LD light emission signal generation circuit 9, output a reset signal to the first addition circuit 3, and output a holding signal to the voltage holding output circuit 4. The subtraction circuit 2 converts the LD light from the PD (photodiode) circuit 7 into an analog voltage.
The PD reference voltage is subtracted from the voltage, and the difference voltage is output to the first adding circuit 3. The first addition circuit 3 adds the holding voltage from the voltage holding output circuit 4 and the difference voltage from the subtraction circuit 2 and outputs the added voltage to the voltage holding output circuit 4. The voltage holding output circuit 4 holds the added voltage from the first adding circuit 3 by a holding signal from the voltage holding synchronizing circuit 10, and sends the held voltage to the second adding circuit 5 and the first adding circuit 3. Is output.

The second adding circuit 5 adds the holding voltage from the voltage holding output circuit 4 and the driving reference voltage, and outputs a driving voltage to the LD driving circuit 6. LD drive circuit 6
Causes a laser diode (not shown) to emit light by the drive voltage from the second adder circuit. Also, the PD circuit 7
The light emission amount of the laser diode is converted into a voltage, and the PD voltage which is an analog voltage is output to the subtraction circuit 2. The print start position synchronizing circuit 8 outputs a print position signal serving as a reference for the print position by using the LD light.

The LD light amount stability determination circuit 11 determines whether or not the light amount of the laser diode is stable, based on the difference voltage from the subtraction circuit 2, and outputs a light amount stability signal to the CPU 12.
Output to Further, the CPU 12 outputs an LD drive start signal, which is a signal for starting the setting of the light amount of the laser diode, to the LD light emission signal generation circuit 9 and the voltage holding synchronization circuit 10, and receives the light amount stability signal from the LD light amount stability determination circuit 11. Then, a print start signal is output to the LD light emission signal generation circuit 9 and the image signal generation unit 13.

Next, the operation will be described with reference to the waveform time chart of FIG. The operation of setting the light amount of the laser diode before the start of printing is as follows. When the LD drive start signal from the CPU 12 becomes valid, the LD emission signal generation circuit 9 makes the LD drive signal and the light amount setting start signal valid, and the voltage holding synchronous circuit 10 Is performed by enabling the reset signal and the holding signal.

In the first stage shown in FIG. 2, the first adding circuit 3 resets the added voltage V1 to a reset state (V1 = 0 V) during a period in which the reset signal from the voltage holding synchronous circuit 10 is valid.
To At this time, the voltage holding output circuit 4 holds the reset addition voltage V1 (= 0V) from the first addition circuit 3 and changes the holding voltage V2 (= 0V) by the holding signal from the voltage holding synchronization circuit 10. Output. Then, the second adding circuit 5 adds the driving reference voltage V3 and the holding voltage V2 (= 0V) from the voltage holding output circuit 4 to obtain the driving voltage V4.
(= V2 + V3) is output. And LD drive circuit 6
Is the driving voltage V4 (= V2 + V) from the second adding circuit 5.
The laser diode emits light with the light quantity according to 3).

The PD circuit 7 converts the LD light of the laser diode into an analog voltage and outputs a PD voltage V5 to the subtraction circuit 2. The subtraction circuit 2 outputs the PD from the PD circuit 7
The reference voltage V6 is subtracted from the voltage V5, and the difference voltage V7 (= V
5-V6) to the first adder circuit 3.

Next, at the second stage, when the reset signal from the voltage holding synchronizing circuit 10 becomes invalid, the first adding circuit 3
The holding voltage V2 (= 0V) from the voltage holding output circuit 4 is added to the difference voltage V7, and the added voltage V1 (= V2 + V7) is output to the voltage holding output circuit 4. Then, the voltage holding output circuit 4 uses the holding signal from the voltage holding synchronization circuit 10 to output the reset added voltage V1 (=
V2 + V7) and the holding voltage V2 (= V1)
To the adder circuit 3 and the second adder circuit 5. Then, the second addition circuit 5 adds the drive reference voltage V3 and the hold voltage V2 (= V1) from the voltage hold output circuit 4, and outputs a drive voltage V4 (= V2 + V3) to the LD drive circuit 6.

Then, the LD drive circuit 6 causes the laser diode to emit light with a light amount corresponding to the drive voltage V4 (= V2 + V3) from the second adder circuit 5. And the PD circuit 7
The LD light from the laser diode is converted into an analog voltage and output to the subtraction circuit 2 as a PD voltage V5. Then, the subtraction circuit 2 subtracts the reference voltage V6 from the PD voltage V5 from the PD circuit 7, and outputs a difference voltage V7 (= V5−V6). In this way, after the third stage, the same control as in the second stage is performed, and the feedback control is performed so that the difference voltage V7 from the subtraction circuit 2 approaches 0V.

The LD light amount stability determination circuit 11 validates the light amount stable signal when the difference voltage V7 from the subtraction circuit 2 is equal to or more than a specified voltage value. Also, during printing, when the light amount setting start signal from the LD light emission signal generation circuit 9 is valid, the same operation as in the second stage is performed, and the operation is performed so that the difference voltage V7 from the subtraction circuit 2 approaches 0V.

Next, the operation of the LD light emission signal generation circuit 9 of FIG. 1 will be described with reference to the waveform time chart of FIG. The LD light emission signal generation circuit 9 enables the LD drive signal and the light amount setting start signal when the LD drive start signal from the CPU 12 becomes valid, and starts the LD drive signal and the light amount setting when the LD drive start signal from the CPU 12 becomes invalid. Signal and disable. Then, the print start signal from the CPU 12 is valid,
Further, after the print position signal from the print start position synchronizing circuit 8 becomes valid, the LD drive signal and the light amount setting start signal are invalidated after T1 second, and the LD drive signal and the light amount setting start signal are valid after T2 seconds. I do. Then, when the print start signal from the CPU 12 is valid and the image signal from the image signal generator 13 is valid, the LD drive signal is made valid.

Next, the operation of the voltage holding synchronous circuit 10 of FIG. 1 will be described with reference to the waveform time chart of FIG. When the LD drive start signal from the CPU 12 becomes valid, the voltage holding synchronous circuit 10 makes the reset signal valid for T5 seconds. Then, when the light amount setting start signal from the LD light emission signal generation circuit 9 becomes valid, a clock having a period of T4 seconds after T3 seconds,
Output as a holding signal. When the light amount setting start signal from the LD light emission signal generation circuit 9 becomes invalid, the holding signal is invalidated.

Next, the operation of the CPU 12 of FIG. 1 will be described with reference to the waveform time chart of FIG. The CPU 12 is an LD
In a state where the drive start signal is enabled, when the state in which the light amount stabilization signal from the LD light amount stability determination circuit 11 is enabled continues for T6 seconds, the print start signal is enabled. When invalidating the LD drive start signal, the print start signal is also invalidated.

[0020]

As described above, the image forming apparatus of the present invention uses a circuit composed of an H / W in which an addition / subtraction circuit and a sample hold circuit are combined with the APC of the laser diode used in the laser beam scanning unit. So,
Therefore, even when used in a high-speed electronic printer, there is no need for a CPU capable of high-speed processing or a CPU dedicated to APC, and there is an effect that a simple and low-cost apparatus can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a waveform time chart for explaining the operation of the present embodiment.

FIG. 3 is a waveform time chart illustrating an operation of the LD light emission signal generation circuit 9;

FIG. 4 is a waveform time chart illustrating an operation of the voltage holding synchronous circuit 10.

FIG. 5 is a waveform time chart showing the operation of the CPU 12;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image forming apparatus 2 Subtraction circuit 3 1st addition circuit 4 Voltage holding output circuit 5 2nd addition circuit 6 LD drive circuit 7 PD circuit 8 Printing start position synchronization circuit 9 LD light emission signal generation circuit 10 Voltage holding synchronization circuit 11 LD Light intensity stability determination circuit 12 CPU 13 Image signal generator

Claims (1)

(57) [Claims] (1)At least, given the drive voltage
LD that emits laser diode (laser diode
D) The drive circuit and the light emission amount of the laser diode are analyzed.
A PD (photodiode) circuit for converting to a log voltage,
Analog voltage from this PD circuit and reference analog
A subtraction circuit for subtracting a voltage (PD reference voltage) from the analog circuit;
Voltage holding output circuit for holding the
First addition for adding the output of the power circuit and the output of the subtraction circuit
A circuit and an output of the voltage holding output circuit and a reference analog.
Second adder circuit for adding a log voltage (drive reference voltage)
And the holding timing of the voltage holding output circuit is determined.
A voltage holding synchronous circuit, enabling the operation of the LD drive circuit,
An LD light emission signal generation circuit for determining invalidity and an image signal
An image signal generating section for generating the light of the laser diode;
A print start position synchronization circuit for detecting the position of
LD light quantity stability judgment cycle to judge the light quantity stability of diode
And a signal for starting driving of the laser diode.
CPU with The output (difference voltage) of the subtraction circuit approaches 0V.
Fees using a first adder and the second adder
By the feedback control, L which is the output of the second addition circuit
A configuration to control the D drive voltage Characteristic image forming apparatus.