JP2861337B2 - Constant current control circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a constant current source in a semiconductor device.

2. Description of the Related Art A conventional electric circuit that uses a constant current from a constant current source as a reference for operation has a circuit configuration that always receives a constant current from a constant current source, as shown in FIG. there were.

[Problem to be Solved by the Invention] However, in the above-described conventional technology, there is a problem that a constant current always flows through the electric circuit even when the electric circuit is not operated, thereby consuming extra current. Therefore, the present invention solves such a problem, and an object of the present invention is to provide a circuit that can stop current from a constant current source and reduce current consumption when an electric circuit is not used. An object of the present invention is to provide a semiconductor device characterized by the following.

[Means for Solving the Problems] A first transistor having one of the conduction paths connected to the power supply potential and the other connected to the gate of the second transistor, and a second transistor having one of the conduction paths connected to the power supply potential. A constant current control circuit which is controlled by a reference current from a constant current source applied to a gate of the first transistor and outputs a predetermined constant current to the other conduction path of the second transistor; One terminal is at the power supply potential and the other terminal is the first
A first switch circuit connected to the gate of the transistor; and a second switch circuit having one terminal connected to the gate of the first transistor and the other terminal connected to the constant current source. The two-switch circuit is complementarily opened and closed by a control signal for controlling whether the constant current control circuit is operated or not, and the control signal makes the constant current control circuit inoperable. In the case of a potential, the first switch circuit is turned on and the second switch circuit is turned off so that a constant current does not flow through either the first transistor or the second transistor.

[Operation] According to the above configuration of the present invention, the constant current supplied from the constant current source can be arbitrarily stopped by the control signal.

Embodiment FIG. 1 is a circuit diagram showing an embodiment of a CMOS voltage generating circuit using a constant current control circuit according to the present invention. The IC has a constant current source that supplies a constant current to the IREF terminal. When the constant current of the constant current source is cut, its potential becomes VDD potential due to the structure of the constant current source. 1 is a reference transistor (first transistor, 200 is an operation transistor (second transistor), 3 and 4 are switch circuits (constituted by transmission gates), and A terminal B terminal is turned on by applying L level potential to C terminal. Become),
7 is a resistor, 6 is an inverter.

L level potential (Less than GND potential)
The switch circuit 3 (first switch circuit) is turned off when a potential is applied, and the switch circuit 4 (second switch circuit)
Is turned on, a constant current supplied from the IREF terminal 10 flows to the reference transistor 1, the gate potential of the transistor 1 is determined, and a constant voltage is obtained when the current is constant. The constant voltage is supplied to the gate of the operation transistor 200. Assuming that the current capability of the operation transistor 200 is β, a current flows through the resistor 7 connected to GND according to the β, and a voltage is generated at the OUT terminal 13. However, OUT terminal 13 is open or high impedance. With the above configuration, by arbitrarily setting the resistor 7 and β of the operation transistor 200, the device operates as a voltage generator that outputs an arbitrary voltage.

In a normal operation, a constant current is always supplied from the IREF terminal 10, the reference transistor 1 and the operation transistor 200 always keep flowing a constant current, and in a conventional circuit having no constant current control circuit of the present invention, It consumed current even when not using it.

However, in the present embodiment, when the H potential is applied to the control terminal 11, the switch circuit 3 is turned on and the switch circuit 4 is turned off, so that the gate of the reference transistor 1 has the H level potential (VDD power supply potential or less). (Referred to as potential) and turned off. Also, due to the structure of the constant current source, the H potential is applied to the gate of the operating transistor,
I do. Therefore, the constant current supplied from the IREF terminal 10 is cut, and the reference transistor 1 and the operating transistor
No current flows through 200.

FIG. 3 is a circuit diagram showing one embodiment of a CMOS 4-bit D / A converter using the constant current control circuit of the present invention. A constant current is supplied to the IREF terminal from a constant current source outside the IC. When the constant current is cut, the potential becomes the GND potential due to the structure of the constant current source. 1 is a reference transistor (P channel), 240 to 243 are operation transistors (P channel),
3 and 4 are switch circuits (3 is a P-channel transistor, 4 is a transmission gate), 500, 501 to 53
0, 531 are signal switch transistors (P-channel), 6
Is an inverter, 7 is a resistor, 8 is a NAND gate, 9 is a VDD power input terminal, 10 is a constant current (IREF) input terminal, 11 is a control terminal, 12 is a GND terminal, 13 is an analog output terminal, 140
143 are data input terminals.

When an L potential is applied to the control terminal 11, the switch circuit 3 (P-channel transistor) is turned off, the switch circuit 4 (IREF-side transmission gate) is turned on, and IREF
A constant current supplied from the terminal 10 flows to the reference transistor 1, and its gate potential is determined. The constant voltage is supplied to the operation transistors 240 to 243. When the NAND gate 8 becomes active and a data signal is applied to the data input terminal, the circuit operates normally. The D0 data input terminal 140 is assigned the least significant bit D0 of the four data bits, the D1 data input terminal 141 has the next higher bit D1, the D2 data input terminal 142 has the higher bit D2, D3 data input terminal 1
43 is provided with the most significant bit D3. Taking the D0 bit as an example, when 0 (L potential) is given to the D0 data input terminal 140, the gate of the D0 signal switch transistor 500 has L
The potential is turned on and the D0 signal switch transistor 501 is turned on.
The gate of the transistor is turned off when the H potential is applied, and the constant current output from the operating transistor 240 having a constant voltage applied to the gate is supplied to the GND terminal via the D0 signal switch transistor 500.
The current flows from 12 to GND, and the potential of the OUT terminal 13 becomes GND due to the resistor 7 connected to GND. D0 data input terminal 140
, The D0 signal switch transistor 500 is turned off, as opposed to when 0 (L potential) is applied to
Since the D0 signal switch transistor 501 is turned on, the constant current output from the operation transistor 240 flows through the resistor 7, and a certain potential is output to the OUT terminal 13 according to Ohm's law. However, OUT terminal 13 is open or high impedance. The same operation is performed for the other bits.
However, the weight of each bit is D0 = 1, D1 = 2, D2 =
4, since D3 = 8, the operation transistor 24 in D0
Assuming that the current capability of 0 is β, β of the operating transistors of other bits is 2β for D1 and 4 for D2 according to the weighting.
β and D3 are 8β. The signal switch transistors 500, 501 to 530, and 531 corresponding to each are the same as β of each of the operation transistors 240 to 243. With the above configuration, by setting the resistor 7 and β of each transistor arbitrarily, it operates as a D / A converter that outputs an arbitrary voltage.

During normal operation, a current always flows from the IREF terminal 10, and the reference transistor 1, the operating transistors 240 to 243
In the conventional circuit which does not have the constant current control circuit of the present invention, a constant current always flows, and the current is consumed even when the circuit is not used.

However, in the present embodiment, the H potential (VDD potential) is applied to the gate of the reference transistor 1 by applying the H potential to the control terminal 11 to turn on the switch circuit 3 and turning off the switch circuit 4. Turn off. Therefore, the constant current supplied from the IREF terminal 10 is cut off, and the potential becomes L potential due to the structure of the constant current source. However, no matter what potential is applied to the IREF terminal and what potential is supplied to the operation transistor, the NAND gate 8 is all turned off by the control signal, and what kind of signal is applied to the data input terminals 140 to 143 Not accepted. Also, all signal switch transistors 50
H potential is supplied to the gates of 0, 501 to 530, 531 to turn off
Then, the current output from the operation transistors 240 to 243 is cut.

As described above, in this embodiment, the current consumption can be reduced to zero by applying the H potential to the control terminal.

In addition, it is needless to say that the present invention can be configured using transistors other than CMOS, and can be used for devices other than the voltage generating circuit and the D / A converter.

[Effects of the Invention] As described above, according to the invention, the constant current can be cut when the constant current is not required, so that the current consumption can be suppressed.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram according to the present invention. FIG. 2 is a diagram relating to a conventional example. FIG. 3 is a diagram related to the embodiment. 1 Reference transistor 200 Operation transistor 240 D0 operation transistor (1β) 241 D1 operation transistor (2β) 242 D2 operation transistor (4β) 243 D3 operation transistor (8β) 3 Switch Circuit (VDD side) 4 Switch circuit (IREF side) 500 D0 signal switch circuit 501 D0 signal switch circuit 510 D1 signal switch circuit 511 D1 signal switch circuit 520 D2 signal switch circuit 521 ... D2 signal switch circuit 530 ... D3 signal switch circuit 531 ... D3 signal switch circuit 6 ... Inverter 7 ... Resistance 8 ... NAND gate 9 ... VDD terminal 10 ... IREF terminal 11 ... Control terminal 12 ... … GND terminal 13… Analog output terminal 140… D0 data input terminal 141… D1 data input terminal 142… D2 data input terminal 143… D3 data input terminal

Claims (1)

(57) [Claims] A first transistor having one of the conduction paths connected to a power supply potential and the other connected to a gate of a second transistor; and the second transistor having one of the conduction paths connected to the power supply potential. Controlled by a reference current from a constant current source applied to the gate of one transistor,
In a constant current control circuit configured to output a predetermined constant current to the other conduction path of a transistor, a first switch circuit having one terminal connected to the power supply potential and the other terminal connected to the gate of the first transistor. And a second switch circuit having one terminal connected to the gate of the first transistor and the other terminal connected to the constant current source, wherein the first switch circuit and the second switch circuit control the constant current control circuit. Opening / closing control is performed complementarily by a control signal for controlling whether to operate or not to operate, and when the control signal has a potential at which the constant current control circuit is inoperable, the first switch circuit Is ON, the second
A constant current control circuit characterized in that a constant current does not flow through either the first transistor or the second transistor when the switch circuit is turned off.