JP2864992B2 - Hybrid integrated circuit device and method of manufacturing the same - Google Patents
Hybrid integrated circuit device and method of manufacturing the sameInfo
- Publication number
- JP2864992B2 JP2864992B2 JP6176648A JP17664894A JP2864992B2 JP 2864992 B2 JP2864992 B2 JP 2864992B2 JP 6176648 A JP6176648 A JP 6176648A JP 17664894 A JP17664894 A JP 17664894A JP 2864992 B2 JP2864992 B2 JP 2864992B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- hybrid integrated
- heat sink
- insulating plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、大電力半導体素子を回
路上の一構成素子とする混成集積回路装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device in which a high power semiconductor device is used as a component on a circuit.
【0002】[0002]
【従来の技術】従来の大電力半導体素子を回路上の一構
成素子とする集積回路装置としては、例えば日本電装公
開技報:整理番号24−095に示されるようなものが
ある。この回路装置は、金属製ケースに放熱特性を良好
にするようにして大電力半導体素子を固着する構造をも
っている。2. Description of the Related Art As a conventional integrated circuit device in which a high-power semiconductor element is used as one constituent element on a circuit, there is one disclosed in, for example, Nippon Denso Publication Technical Report No. 24-095. This circuit device has a structure in which a high-power semiconductor element is fixed to a metal case so as to improve heat radiation characteristics.
【0003】この混成集積回路装置を図に示すと、図5
に示すように、大電力半導体素子1と台座2、台座2と
アルミナ基板3、アルミナ基板3と金属性外囲器4をそ
れぞれ半田付けでき、熱伝導性、放熱特性の良好なもの
になっている。また、アルミナ基板3と金属性外囲器4
は接着剤により接着する構造のものもある。ここで、台
座2は良好な熱伝導性を有する金属(例えば銅)からな
り、アルミナ基板3はその両面または片面に厚膜導体印
刷法またはメタライズ法等によって半田付け可能な金属
被膜が施してある。金属性外囲器4は、混成集積回路装
置の取付性および熱伝導性を考慮してアルミダイキャス
ト等からなる。FIG. 5 shows this hybrid integrated circuit device.
As shown in (1), the high-power semiconductor element 1 and the pedestal 2, the pedestal 2 and the alumina substrate 3, the alumina substrate 3 and the metallic envelope 4 can be soldered respectively, and the thermal conductivity and the heat radiation characteristics are good. I have. Also, an alumina substrate 3 and a metallic envelope 4
May have a structure of bonding with an adhesive. Here, the pedestal 2 is made of a metal (for example, copper) having good thermal conductivity, and the alumina substrate 3 has a metal film which can be soldered on both sides or one side thereof by a thick film conductor printing method or a metallizing method. . The metallic envelope 4 is made of aluminum die cast or the like in consideration of the mountability and thermal conductivity of the hybrid integrated circuit device.
【0004】[0004]
【発明が解決しようとする課題】ところで、大電力半導
体素子を含む半導体装置のアルミナ基板等の絶縁板に
は、従来より、一般に、Ag導体を膜形成した厚膜の
絶縁基板が用いられてきた。また、この種の公知の他の
絶縁基板としては、タングステンメタライズした絶縁
基板がある。As an insulating plate such as an alumina substrate of a semiconductor device including a high-power semiconductor element, a thick insulating substrate formed with an Ag conductor has been generally used. . As another known insulating substrate of this type, there is an insulating substrate formed by tungsten metallization.
【0005】しかし、前記のAg導体を印刷焼成した
厚膜基板では、組付けのさいの半田付け時にAgは半田
中に含まれるSn等との合金層の成長が速いため、大電
力半導体素子の接合側面の高温半田をリフロー組付する
260℃以上の温度では、前述のAgとSnとの合金層
の成長が著しく速くなるために安定した半田付け状態が
確保できない。このため製造工程を大電力半導体素子の
接合面側の半田付けとAg厚膜絶縁基板の半田付けとの
2回に半田付け工程を分けなければならない。しかも、
半導体装置の使用環境により前述の合金層の成長がさら
に進むことが懸念される。However, in the case of a thick film substrate in which the Ag conductor is printed and baked, Ag grows rapidly in an alloy layer with Sn or the like contained in the solder at the time of soldering at the time of assembling. At a temperature of 260 ° C. or higher at which the high-temperature solder on the joint side surface is reflow-assembled, a stable soldering state cannot be secured because the growth of the alloy layer of Ag and Sn becomes extremely fast. For this reason, the soldering process must be divided into two, that is, soldering of the bonding surface side of the high power semiconductor element and soldering of the Ag thick film insulating substrate. Moreover,
There is a concern that the growth of the alloy layer described above may further progress depending on the usage environment of the semiconductor device.
【0006】この例を図6に基づいて説明すると、アル
ミナ基板3の一方の面3aにAgペーストを印刷し焼成
し、アルミナ基板3の面3aにAg導体10を形成す
る。このAg導体10の表面に半田Pb−Sn系合金を
置いて温度260℃以上で高温リフローするとき、半田
Pb−Sn中のSn合金層が成長してしまい、この合金
層が半田付けを阻害するという問題がある。Referring to FIG. 6, an Ag paste is printed on one surface 3a of the alumina substrate 3 and baked to form an Ag conductor 10 on the surface 3a of the alumina substrate 3. When a solder Pb-Sn based alloy is placed on the surface of the Ag conductor 10 and reflowed at a high temperature of 260 ° C. or higher, a Sn alloy layer in the solder Pb—Sn grows, and this alloy layer hinders soldering. There is a problem.
【0007】一方、前記のタングステンメタライズさ
れた絶縁基板は、前記の高温半田リフローする場合の
半田付け状態の不安定さを解消するための一手段として
考えられる。この場合、例えば図7に示すように、アル
ミナ基板3の両面3a、3bにタングステン層11、1
2が同時焼成されて形成される。一方のタングステン層
11の表面にはNiめっき層13が形成され、他方のタ
ングステン層12の表面には絶縁膜14が形成される。
Niめっき層13が形成されるのは半田付けを可能にす
るためであり、絶縁膜14が形成されるのは金属製ケー
スとの接着性を高めるためである。しかし、こののタ
ングステンメタライズ基板によると、アルミナ基板3の
両面にタングステン層11、12、Niめっき層13な
らびに絶縁膜14を形成する等の複雑な表面処理した構
造になるためコストアップになるという問題がある。On the other hand, the above-mentioned tungsten metallized insulating substrate is considered as one means for eliminating the instability of the soldering state in the case of the high-temperature solder reflow. In this case, for example, as shown in FIG.
2 are formed by simultaneous firing. On the surface of one tungsten layer 11, a Ni plating layer 13 is formed, and on the surface of the other tungsten layer 12, an insulating film 14 is formed.
The Ni plating layer 13 is formed to enable soldering, and the insulating film 14 is formed to enhance adhesion to a metal case. However, according to this tungsten metallized substrate, a complicated surface treatment such as formation of the tungsten layers 11 and 12, the Ni plating layer 13 and the insulating film 14 on both surfaces of the alumina substrate 3 results in an increase in cost. There is.
【0008】本発明は、安定した半田付けが得られ低コ
ストで製作可能な混成集積回路装置を提供することを目
的とする。An object of the present invention is to provide a hybrid integrated circuit device which can be manufactured at low cost with stable soldering.
【0009】[0009]
【課題を解決するための手段】前記目的を達成するため
の本発明による内燃機関用混成集積回路装置は、請求項
1では、導電性ケースと大電力半導体素子との間に、C
u厚膜を有する絶縁板を設け、該Cu厚膜に前記大電力
半導体素子を、260℃以上の温度で高温半田をリフロ
ー組み付けすることにより得られることを特徴とする。
請求項2の混成集積回路は、前記大電力半導体素子と前
記絶縁板との間にヒートシンクが介在しており、前記大
電力半導体素子と前記ヒートシンクとの間および前記ヒ
ートシンクと前記絶縁板との間が半田付けされてなるこ
とを特徴とする。請求項3の混成集積回路装置は、前記
Cu厚膜が、前記絶縁板の片面に形成されることを特徴
とする。According to a first aspect of the present invention, there is provided a hybrid integrated circuit device for an internal combustion engine according to the present invention, wherein C is provided between a conductive case and a high-power semiconductor element.
An insulating plate having a u-thick film is provided , and the high power is applied to the Cu thick film.
High temperature solder reflow at 260 ° C or higher
-It is characterized by being obtained by assembling .
3. The hybrid integrated circuit according to claim 2, wherein a heat sink is interposed between the high-power semiconductor element and the insulating plate, and between the high-power semiconductor element and the heat sink and between the heat sink and the insulating plate. Are soldered . According to a third aspect of the present invention, in the hybrid integrated circuit device, the Cu thick film is formed on one surface of the insulating plate.
【0010】請求項4の混成集積回路装置の製造方法
は、前記大電力半導体素子と前記ヒートシンクの間およ
び前記ヒートシンクと前記絶縁板との間が同時に半田付
けされることを特徴とする。According to a fourth aspect of the present invention, there is provided a method of manufacturing a hybrid integrated circuit device, wherein a portion between the high power semiconductor element and the heat sink and a portion between the heat sink and the insulating plate are simultaneously soldered.
【0011】[0011]
【作用および発明の効果】本発明の請求項1記載の混成
集積回路装置によると、導電性ケースと大電力半導体素
子との間に、Cu厚膜を有する絶縁板を設けた構成であ
るから、半田中に半田付けを不安定にする合金層を作り
出さないため、半田付けが安定した混成集積回路装置を
得ることができるという効果がある。大電力半導体素子
と絶縁板間の安定した半田リフローを可能にし、製造時
にも使用時にも安定した接合状態が確保できる。According to the hybrid integrated circuit device of the first aspect of the present invention, an insulating plate having a Cu thick film is provided between the conductive case and the high-power semiconductor element. Since an alloy layer that makes soldering unstable is not created in the solder, there is an effect that a hybrid integrated circuit device with stable soldering can be obtained. A stable solder reflow between the high-power semiconductor element and the insulating plate is enabled, and a stable bonding state can be ensured both during manufacturing and during use.
【0012】請求項2の混成集積回路装置によると、前
記大電力半導体素子と前記絶縁板との間にヒートシンク
が介在している構成であるから、このヒートシンクによ
る放熱性が良好であるので、この種の大熱量を発生する
大電力半導体素子の回路装置として適している。請求項
3の混成集積回路装置によると、Cu厚膜が絶縁板の片
面に形成することで前記片面と反対面の導電性ケースと
の接合を行いやすくする。According to the hybrid integrated circuit device of the second aspect, since the heat sink is interposed between the high-power semiconductor element and the insulating plate, the heat dissipation by the heat sink is good. It is suitable as a circuit device for a high-power semiconductor element that generates a large amount of heat. According to the hybrid integrated circuit device of the third aspect, by forming the Cu thick film on one surface of the insulating plate, it is easy to bond the one surface to the conductive case on the opposite surface.
【0013】請求項4の混成集積回路装置の製造方法に
よると、大電力半導体素子とヒートシンクの間およびヒ
ートシンクと絶縁板との間が同時に半田付けされるた
め、一工程にして回路装置を製作することができるので
工程コストダウンが図れるという効果がある。According to the method of manufacturing a hybrid integrated circuit device of the present invention, since the high power semiconductor element and the heat sink and between the heat sink and the insulating plate are simultaneously soldered, the circuit device is manufactured in one step. Therefore, there is an effect that the process cost can be reduced.
【0014】[0014]
【実施例】以下、本発明の実施例を図面に基づいて説明
する。本発明による大電力半導体素子を含む半導体装置
の絶縁板にはCu導体を印刷焼成した厚膜基板(以下
「Cu厚膜基板」と称する)を使用している。これは、
Cu導体を絶縁板に膜形成しておくと、その後工程で半
田付けする際に半田中に含まれるSn等の合金層の成長
が遅いために半田付けを不安定にする生成物が生成され
難く、半田付けを安定にするという特性を利用したもの
である。Embodiments of the present invention will be described below with reference to the drawings. As the insulating plate of the semiconductor device including the high-power semiconductor element according to the present invention, a thick film substrate obtained by printing and firing a Cu conductor (hereinafter referred to as “Cu thick film substrate”) is used. this is,
If a Cu conductor is formed on the insulating plate, a product that makes soldering unstable becomes less likely to be generated due to the slow growth of an alloy layer such as Sn contained in the solder when soldering in a subsequent process. It utilizes the property of stabilizing soldering.
【0015】図1において、1は大電力半導体素子で、
例えば内燃機関用点火装置のイグナイタに用いられる大
電流を駆動する素子である。20は良好な熱伝導性を有
する金属例えばMoからなるヒートシンク、21はアル
ミナ基板で、その片面21aにCuが印刷焼成されて形
成されている。4は熱伝導姓の良好な金属、例えばA
l、Cu等からなる導電性ケースとしての金属性ケース
である。図1において、23、24は半田であり、25
はSi系接着剤でなる。In FIG. 1, 1 is a high power semiconductor device,
For example, it is an element for driving a large current used in an igniter of an ignition device for an internal combustion engine. Reference numeral 20 denotes a heat sink made of a metal having good thermal conductivity, for example, Mo, and reference numeral 21 denotes an alumina substrate, which is formed by printing and firing Cu on one surface 21a. 4 is a metal having good thermal conductivity, for example, A
This is a metallic case as a conductive case made of l, Cu, or the like. In FIG. 1, reference numerals 23 and 24 denote solder, and 25
Is a Si-based adhesive.
【0016】このCu厚膜基板の構造については、図2
に示すようなものである。アルミナ基板21の片面21
aにCu導体26が形成されている。このCu導体26
は、アルミナ基板21の片面21aにCuペーストを印
刷し焼成して形成される。半導体装置の製造時、Cu導
体26の表面上に半田を置いてヒートシンク20と半田
付けされる。The structure of the Cu thick film substrate is shown in FIG.
It is as shown in. One side 21 of alumina substrate 21
The Cu conductor 26 is formed on a. This Cu conductor 26
Is formed by printing and baking a Cu paste on one surface 21a of the alumina substrate 21. When manufacturing the semiconductor device, solder is placed on the surface of the Cu conductor 26 and soldered to the heat sink 20.
【0017】次に、大電力半導体素子を含む半導体装置
の製造工程の一例(1) と他の例(2)を図3及び図4に基
づいて説明する。この図3に示す製造工程(1) は、組付
リフロー1回の場合のものである。大電力半導体素子
1、半田23、放熱板としてのヒートシンク20、半田
24、絶縁板21を組合わせて高温状態に保って半田が
溶融する温度に保持することで半田付けして半導体装置
30が得られる。半導体装置30は、その後に、図1に
示すように、Si系接着剤25等により前記金属性ケー
ス4等に接着される。Next, an example (1) and another example (2) of a manufacturing process of a semiconductor device including a high-power semiconductor element will be described with reference to FIGS. The manufacturing process (1) shown in FIG. 3 is for a single assembly reflow. The semiconductor device 30 is obtained by combining the high-power semiconductor element 1, the solder 23, the heat sink 20 as a heat sink, the solder 24, and the insulating plate 21 and keeping them at a high temperature and keeping them at a temperature at which the solder melts. Can be Thereafter, the semiconductor device 30 is bonded to the metallic case 4 or the like with a Si-based adhesive 25 or the like as shown in FIG.
【0018】この図4に示す製造工程(2) は組付リフロ
ー2回の場合の例である。まず、第1の温度T1 で大電
力半導体素子1、半田23、ヒートシンク20を第1回
リフローして半導体装置32を形成し、次いでヒートシ
ンク20の片面20bに半導体24、絶縁板21を順に
組合わせて第2の温度T2 (T2 <T1 )で第2回リフ
ローし半田付けし半導体装置33を得る。半導体装置3
3は、図3に示す符号30で示される半導体装置と同様
のものである。この半導体装置33は絶縁板21の片側
の面に接着剤によって金属性ケース等に固定される。The manufacturing process (2) shown in FIG. 4 is an example in the case of two reflows. First, the semiconductor device 32 is formed by first reflowing the high-power semiconductor element 1, the solder 23, and the heat sink 20 at the first temperature T 1 to form a semiconductor device 32. At the same time, the semiconductor device 33 is obtained by performing a second reflow at a second temperature T 2 (T 2 <T 1 ) and soldering. Semiconductor device 3
3 is similar to the semiconductor device indicated by reference numeral 30 shown in FIG. The semiconductor device 33 is fixed to a metal case or the like on one surface of the insulating plate 21 by an adhesive.
【0019】前記(1) の製造工程では、大電力半導体素
子1、ヒートシンク20、絶縁板21を一工程で同時焼
成固定できるため、工程コストの低減が図れる。この
(1) の製造工程例では、製造工程例(2) の工程例に比
べ、半田付け工程を2回に分ける必要もなく焼成できる
し、また各半田を同時リフローできるため、コストダウ
ンに有効である。In the manufacturing process (1), the high-power semiconductor element 1, the heat sink 20, and the insulating plate 21 can be simultaneously fired and fixed in one step, so that the process cost can be reduced. this
In the example of the manufacturing process (1), compared to the example of the manufacturing process (2), firing can be performed without having to divide the soldering process into two, and since each solder can be reflowed simultaneously, cost reduction is effective. is there.
【0020】前記(2) の製造工程では、第1回目のリフ
ローを高温T1 で焼成し、第2回目のリフローを低温T
2 で行なうため2回操作による2回焼成による温度別の
適切な半田付け工程が行なえるという利点がある。本実
施例によると、Cu厚膜基板は半田付け特性を悪化させ
るSn系合金層の成長が遅いため、使用環境に左右され
ずに安定した半田付け状態が保持できる。In the manufacturing process (2), the first reflow is fired at a high temperature T 1 , and the second reflow is fired at a low temperature T 1.
Since it is performed in step 2, there is an advantage that an appropriate soldering step for each temperature can be performed by two firings by two operations. According to the present embodiment, since the growth of the Sn-based alloy layer that deteriorates the soldering characteristics of the Cu thick film substrate is slow, a stable soldering state can be maintained regardless of the use environment.
【0021】また、本実施例による大電力半導体素子
は、例えばイグナイタ等の大電流を駆動する素子等に適
用した場合、ヒートシンク20、金属性ケース4が効果
的に放熱性を良好に保つという効果がある。またヒート
シンク20による熱伝導性はモリブデンを使用している
ことから良好であり、また金属ケース4はアルミを使っ
ていることから、熱伝導性、放熱性も良好であるという
効果がある。Further, when the high power semiconductor device according to the present embodiment is applied to a device which drives a large current such as an igniter, the heat sink 20 and the metal case 4 can effectively maintain good heat radiation. There is. The heat conductivity of the heat sink 20 is good because molybdenum is used, and the metal case 4 is good in heat conductivity and heat radiation because it uses aluminum.
【0022】更に本実施例では、ヒートシンク20は例
えばイグナイタがオン状態を継続するような異常な過渡
状態の場合に効果的な放熱作用を果たす。また前記金属
性ケース4は、定常状態で効果的な放熱作用を果たす。
本発明では、絶縁板と金属性ケースの接合は、Si系接
着剤以外の接着剤でも良く、接着剤による接着以外に半
田付けによる接合であってもよい。また本発明では、図
1における符号20で示すヒートシンクを省略した構造
であってもよい。Further, in this embodiment, the heat sink 20 has an effective heat radiation function in an abnormal transient state in which the igniter keeps on, for example. In addition, the metal case 4 performs an effective heat radiation action in a steady state.
In the present invention, the bonding between the insulating plate and the metallic case may be performed with an adhesive other than the Si-based adhesive, or may be performed by soldering instead of bonding with the adhesive. Further, in the present invention, a structure in which the heat sink indicated by reference numeral 20 in FIG. 1 may be omitted.
【図1】本発明の実施例による混成集積回路装置の模式
的断面図である。FIG. 1 is a schematic sectional view of a hybrid integrated circuit device according to an embodiment of the present invention.
【図2】本発明の実施例による接着前の絶縁板の構造を
示す模式的断面図である。FIG. 2 is a schematic sectional view showing a structure of an insulating plate before bonding according to an embodiment of the present invention.
【図3】図1に示す混成集積回路装置を製造する製造工
程の一例を示す説明図である。FIG. 3 is an explanatory diagram showing an example of a manufacturing process for manufacturing the hybrid integrated circuit device shown in FIG.
【図4】図1に示す混成集積回路装置を製造する製造工
程の他の一例を示す説明図である。FIG. 4 is an explanatory view showing another example of the manufacturing process for manufacturing the hybrid integrated circuit device shown in FIG. 1;
【図5】従来技術の混成集積回路装置を示す模式的断面
図である。FIG. 5 is a schematic sectional view showing a hybrid integrated circuit device according to the prior art.
【図6】従来技術のアルミナ基板の一例を示す模式的断
面図である。FIG. 6 is a schematic sectional view showing an example of a conventional alumina substrate.
【図7】従来技術のアルミナ基板の他の一例を示す模式
的断面図である。FIG. 7 is a schematic cross-sectional view showing another example of the alumina substrate of the related art.
1 大電力半導体素子 4 金属性ケース(導電性ケース) 20 ヒートシンク 21 アルミナ基板(絶縁板) 23、24 半田 25 Si系接着剤 26 Cu導体 DESCRIPTION OF SYMBOLS 1 High power semiconductor element 4 Metallic case (conductive case) 20 Heat sink 21 Alumina substrate (insulating plate) 23, 24 Solder 25 Si adhesive 26 Cu conductor
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平4−273155(JP,A) 特開 平2−7454(JP,A) 特開 平4−150091(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 23/12 H01L 25/04────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-273155 (JP, A) JP-A-2-7454 (JP, A) JP-A-4-15091 (JP, A) (58) Field (Int.Cl. 6 , DB name) H01L 23/12 H01L 25/04
Claims (4)
に、Cu厚膜を有する絶縁板を設け、該Cu厚膜に前記
大電力半導体素子を、260℃以上の温度で高温半田を
リフロー組み付けすることにより得られる内燃機関用混
成集積回路装置。An insulating plate having a Cu thick film is provided between a conductive case and a high-power semiconductor element , and the Cu thick film has
For high-power semiconductor devices, solder at high temperatures of 260 ° C or higher.
A hybrid integrated circuit device for an internal combustion engine obtained by reflow assembly .
間にヒートシンクが介在しており、前記大電力半導体素
子と前記ヒートシンクとの間および前記ヒートシンクと
前記絶縁板との間が半田付けされてなることを特徴とす
る請求項1記載の内燃機関用混成集積回路装置。2. A heat sink is interposed between the high-current semiconductor device and the insulating plate, and the space between the high-power semiconductor device and the heat sink and the space between the heat sink and the insulating plate are soldered. 2. The hybrid integrated circuit device for an internal combustion engine according to claim 1, wherein:
成されることを特徴とする請求項2記載の内燃機関用混
成集積回路装置。3. The hybrid integrated circuit device for an internal combustion engine according to claim 2, wherein said Cu thick film is formed on one surface of said insulating plate.
との間が同時に半田付けされることを特徴とする請求項
2記載の内燃機関用混成集積回路装置の製造方法。4. A method for manufacturing a hybrid integrated circuit device for an internal combustion engine according to claim 2, wherein said high current semiconductor element and said heat sink are soldered simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6176648A JP2864992B2 (en) | 1994-07-28 | 1994-07-28 | Hybrid integrated circuit device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6176648A JP2864992B2 (en) | 1994-07-28 | 1994-07-28 | Hybrid integrated circuit device and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0846080A JPH0846080A (en) | 1996-02-16 |
| JP2864992B2 true JP2864992B2 (en) | 1999-03-08 |
Family
ID=16017261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6176648A Expired - Lifetime JP2864992B2 (en) | 1994-07-28 | 1994-07-28 | Hybrid integrated circuit device and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2864992B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH027454A (en) * | 1988-06-27 | 1990-01-11 | Hitachi Ltd | Mounting structure of electronic component |
| JP2674336B2 (en) * | 1991-02-27 | 1997-11-12 | 日本電気株式会社 | Method for manufacturing hybrid integrated circuit for power |
-
1994
- 1994-07-28 JP JP6176648A patent/JP2864992B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0846080A (en) | 1996-02-16 |
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