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JP2866982B2 - Solar cell element - Google Patents
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JP2866982B2 - Solar cell element - Google Patents

Solar cell element

Info

Publication number
JP2866982B2
JP2866982B2 JP2226944A JP22694490A JP2866982B2 JP 2866982 B2 JP2866982 B2 JP 2866982B2 JP 2226944 A JP2226944 A JP 2226944A JP 22694490 A JP22694490 A JP 22694490A JP 2866982 B2 JP2866982 B2 JP 2866982B2
Authority
JP
Japan
Prior art keywords
region
silicon substrate
surface side
light receiving
receiving surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2226944A
Other languages
Japanese (ja)
Other versions
JPH04107881A (en
Inventor
勝彦 白沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2226944A priority Critical patent/JP2866982B2/en
Publication of JPH04107881A publication Critical patent/JPH04107881A/en
Application granted granted Critical
Publication of JP2866982B2 publication Critical patent/JP2866982B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00Individual photovoltaic cells, e.g. solar cells
    • H10F10/10Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/146Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/20Electrodes
    • H10F77/206Electrodes for devices having potential barriers
    • H10F77/211Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219Arrangements for electrodes of back-contact photovoltaic cells
    • H10F77/227Arrangements for electrodes of back-contact photovoltaic cells for emitter wrap-through [EWT] photovoltaic cells, e.g. interdigitated emitter-base back-contacts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/70Surface textures, e.g. pyramid structures
    • H10F77/703Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

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  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は太陽電池素子に関し、特にシリコン基板の裏
面側にのみ電極を形成した太陽電池素子に関する。
Description: TECHNICAL FIELD The present invention relates to a solar cell element, and more particularly, to a solar cell element having an electrode formed only on the back side of a silicon substrate.

(従来の技術およびその問題点) 太陽電池素子は、第3図に示すように、p型シリコン
基板31内の一主面側にn+領域32を形成してp−n接合部
を形成し、このシリコン基板31の一主面側のn+領域32上
と他の主面側にそれぞれ電極33、34を形成したものが一
般的である。なお、第3図中、35は反射防止膜である。
ところが、このような太陽電池素子では、受光面側に電
極33があるために、この受光面側電極33によって入射光
が遮られて影によるロスが発生するとともに、この受光
面側電極33部や受光面側高濃度層32部分でキャリアの再
結合損失が発生するという問題がある。
(Prior Art and Problems Thereof) As shown in FIG. 3, a solar cell element has an n + region 32 formed on one principal surface side in a p-type silicon substrate 31 to form a pn junction. Generally, electrodes 33 and 34 are formed on n + region 32 on one main surface side of silicon substrate 31 and on the other main surface side, respectively. In FIG. 3, reference numeral 35 denotes an antireflection film.
However, in such a solar cell element, since the electrode 33 is provided on the light receiving surface side, the incident light is blocked by the light receiving surface side electrode 33 and a loss due to shadow occurs, and the light receiving surface side electrode 33 and There is a problem that carrier recombination loss occurs in the high concentration layer 32 on the light receiving surface side.

そこで、受光面側の光影面積を減少させるとともに受
光面側電極部でのキャリアの再結合を抑制するために、
第4図に示すような太陽電池素子も提案されている。す
なわち、p型シリコン基板41の一主面側には凹凸部42と
反射防止膜43だけを形成して、シリコン基板41内の他の
主面側にn+領域44とp+領域45を形成し、このn+領域44部
分とp+領域45部分と点状に接触する電極46、47をそれぞ
れ形成したものである。このように構成することによ
り、受光面側には電極がないことから光影面積はゼロと
なり、また電極との接触面積を減少させることでキャリ
アの再結合も抑制できるようになる。ところが、この太
陽電池素子では、シリコン基板の比抵抗が大きいと太陽
電池素子を形成した場合に直列抵抗が増大し、集光タイ
プでない場合には効率が大きく低下するという問題があ
る。
Therefore, in order to reduce the light shadow area on the light receiving surface side and to suppress the recombination of carriers at the light receiving surface side electrode portion,
A solar cell element as shown in FIG. 4 has also been proposed. That is, only the concave and convex portions 42 and the antireflection film 43 are formed on one main surface side of the p-type silicon substrate 41, and the n + region 44 and the p + region 45 are formed on the other main surface side in the silicon substrate 41. Then, electrodes 46 and 47 are formed, which are in point contact with the n + region 44 and the p + region 45, respectively. With this configuration, since there is no electrode on the light receiving surface side, the light shadow area becomes zero, and recombination of carriers can be suppressed by reducing the contact area with the electrode. However, this solar cell element has a problem that when the specific resistance of the silicon substrate is large, the series resistance increases when the solar cell element is formed, and when the solar cell element is not a condensing type, the efficiency is greatly reduced.

また、第5図に示すように、p型シリコン基板51内に
貫通孔52を形成するとともに、このシリコン基板51の受
光面側と貫通孔52内にn+領域53を連続して形成し、裏面
側のp+領域54と貫通孔部分の裏面側のn+領域55部分にそ
れぞれ電極56、57を形成することによって受光面側の光
影面積を減少させるようにした太陽電池素子も提案され
ている(例えば特開平2−51282号公報参照)。ところ
が、この太陽電池素子では、シリコン基板51の表面およ
び貫通孔52部分にn+領域53を形成するために800℃以上
の高温プロセスが必要なことと受光面側にn+の高濃度層
を形成するためにこの受光面側高濃度層でキャリアの再
結合損失が発するという問題があった。なお、第5図
中、58はp型シリコン基板の受光面側に形成された反射
防止膜である。
Further, as shown in FIG. 5, a through hole 52 is formed in the p-type silicon substrate 51, and an n + region 53 is continuously formed in the light receiving surface side of the silicon substrate 51 and in the through hole 52. A solar cell element has also been proposed in which electrodes 56 and 57 are formed in the p + region 54 on the back side and the n + region 55 on the back side of the through hole portion to reduce the light shadow area on the light receiving surface side. (See, for example, JP-A-2-51282). However, in this solar cell element, a high-temperature process of 800 ° C. or more is required to form the n + region 53 on the surface of the silicon substrate 51 and the through hole 52, and a high concentration layer of n + is formed on the light receiving surface side. There is a problem that recombination loss of carriers occurs in the high concentration layer on the light receiving surface side due to the formation. In FIG. 5, reference numeral 58 denotes an antireflection film formed on the light receiving surface side of the p-type silicon substrate.

本発明は、このような従来装置の問題点に鑑みて提案
されたものであり、光影面積による効率低下を防止する
とともにキャリアの再結合損失を防止した太陽電池素子
を提供することを目的とするものである。
The present invention has been proposed in view of such a problem of the conventional device, and an object of the present invention is to provide a solar cell element that prevents a reduction in efficiency due to a shadow area and prevents a recombination loss of carriers. Things.

(発明の構成) 本発明によれば、受光面側に凹凸部を有するp型シリ
コン基板内に傾斜した貫通孔を多数形成するとともに、
このシリコン基板裏面側の貫通孔近傍にn+領域を形成し
て、シリコン基板内の受光面側から貫通孔部分を経由し
てn+4領域に連続する反転層を形成し、シリコン基板の
受光面側と貫通孔内に反射防止膜を形成して、シリコン
基板裏面側のn+領域が形成された部分以外の部分にp+
域を形成し、上記n+領域とp+領域上に電極を形成して成
る太陽電池素子が提供され、そのことにより上記目的が
達成される。
(Constitution of the Invention) According to the present invention, a large number of inclined through holes are formed in a p-type silicon substrate having an uneven portion on the light receiving surface side,
An n + region is formed in the vicinity of the through hole on the back side of the silicon substrate, and an inversion layer is formed continuously from the light receiving surface side of the silicon substrate to the n + 4 region via the through hole portion. forming a reflection preventing film on the side with the through hole, a p + region is formed in a portion other than the portion n + regions are formed in the silicon substrate backside, the electrode on the n + region and p + region Is provided, whereby the above object is achieved.

(作用) 上記のようにシリコン基板の受光面側には電極が存在
しないことから、光影損失とキャリアの再結合損失とは
発生せず、また受光面側にn+領域がないことからも受光
面側高濃度層によるキャリアの再結合損失も発生しな
い。さらに、シリコン基板の受光面側に凹凸部形成する
とともにシリコン基板内に傾斜した貫通孔を多数形成す
ることによてシリコン基板の表面積を増大させている。
したがって、高効率の太陽電池素子を提供できるように
なる。
(Operation) As described above, since there is no electrode on the light receiving surface side of the silicon substrate, no light shadow loss and carrier recombination loss occur, and light is received because there is no n + region on the light receiving surface side. No recombination loss of carriers is caused by the surface side high concentration layer. Furthermore, the surface area of the silicon substrate is increased by forming a concave and convex portion on the light receiving surface side of the silicon substrate and forming a large number of inclined through holes in the silicon substrate.
Therefore, a highly efficient solar cell element can be provided.

(実施例) 以下、本発明の添付図面に基づき詳細に説明する。(Example) Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

第1図は、本発明に係る太陽電池素子の一実施例を示
す斜視図であり、1は全体としてp型シリコン基板を示
す。
FIG. 1 is a perspective view showing one embodiment of a solar cell element according to the present invention, wherein 1 shows a p-type silicon substrate as a whole.

前記シリコン基板1は、例えばボロンなどのp型不純
物を含有させた0.4Ωcm程度の比抵抗を有する厚み50〜2
00μm程度のシリコン基板で構成される。このシリコン
基板1は、引き上げ法などによって形成した単結晶シリ
コン基板でもよく、また鋳込み法などによって形成した
多結晶シリコン基板でもよい。
The silicon substrate 1 has a thickness of 50 to 2 having a specific resistance of about 0.4 Ωcm containing a p-type impurity such as boron.
It is composed of a silicon substrate of about 00 μm. This silicon substrate 1 may be a single crystal silicon substrate formed by a pulling method or the like, or may be a polycrystalline silicon substrate formed by a casting method or the like.

前記シリコン基板1内には、多数の貫通孔1aが形成さ
れている。この貫通孔1aは、シリコン基板1の表面積
(受光面積)を増大させるとともに、後述する反転層7
をシリコン基板1の裏面側に導くために形成される。こ
の貫通孔1aは、直径50μm程度に形成される。なお、こ
の貫通孔1aは、入射光をシリコン基板1内に効率良く取
り入れるために傾斜して形成するのが好ましい。
A large number of through holes 1a are formed in the silicon substrate 1. This through-hole 1a increases the surface area (light receiving area) of the silicon substrate 1 and the inversion layer 7 described later.
Is formed to guide to the back side of the silicon substrate 1. This through hole 1a is formed to have a diameter of about 50 μm. It is preferable that the through-hole 1a is formed to be inclined in order to efficiently take incident light into the silicon substrate 1.

前記シリコン基板1の受光面側には、テキスチャー処
理によるピラミッド状凹凸部1bが形成されている。この
ピラミッド状凹凸部1bは、シリコン基板1の表面での照
射光の反射ロスを低減させるために形成される。なお、
ピラミッド状凹凸部に限らず、V字溝などを多数形成す
るようにしてもよい。シリコン基板1の表面にV字溝を
形成する場合は、水酸化ナトリウム溶液などを使用した
フォトリソグラフィー技術により形成される。
On the light receiving surface side of the silicon substrate 1, a pyramid-shaped uneven portion 1b is formed by texture processing. The pyramid-shaped uneven portion 1b is formed to reduce the reflection loss of irradiation light on the surface of the silicon substrate 1. In addition,
Not only the pyramid-shaped uneven portion but also a large number of V-shaped grooves may be formed. When a V-shaped groove is formed on the surface of the silicon substrate 1, it is formed by a photolithography technique using a sodium hydroxide solution or the like.

なお、第1図において、3はn+領域の電極、4はp+
域の電極である。
In FIG. 1, reference numeral 3 denotes an electrode in an n + region, and reference numeral 4 denotes an electrode in a p + region.

第2図は、本発明に係る太陽電池素子の部分断面図で
ある。
FIG. 2 is a partial sectional view of the solar cell element according to the present invention.

前記シリコン基板1内には、貫通孔1aが傾斜して形成
されている。
In the silicon substrate 1, a through hole 1a is formed to be inclined.

このシリコン基板1の裏面側の貫通孔1aの近傍には、
選択的にn+領域5が形成されている。このn+領域5は、
Pなどの不純物を高濃度に含有している。
In the vicinity of the through hole 1a on the back side of the silicon substrate 1,
An n + region 5 is selectively formed. This n + region 5 is
It contains a high concentration of impurities such as P.

また、シリコン基板1裏面側のn+領域5が形成された
部分以外の部分には、n+領域5部分から適当な距離を隔
ててBSF(裏面電界)層となるp+領域6が形成されてい
る。このp+領域6は、アルミニウム元素などを高濃度に
含有して構成される。
In a portion other than the portion where the n + region 5 is formed on the back surface side of the silicon substrate 1, ap + region 6 serving as a BSF (back surface electric field) layer is formed at an appropriate distance from the n + region 5 portion. ing. The p + region 6 is configured to contain a high concentration of an aluminum element or the like.

前記シリコン基板1の受光面側および貫通孔1a内の表
面側には、Ceなどのイオンを低濃度に含有する反転層7
が、裏面側に形成されたn+領域5に接続されるように形
成されている。この反転層7は、表面近傍で発生した電
子・正孔を反転層で形成された電界により分離するた
め、および表面へ導かれた電子をn+領域5へ導くために
形成される。
On the light receiving surface side of the silicon substrate 1 and on the surface side in the through hole 1a, an inversion layer 7 containing ions such as Ce at a low concentration is provided.
Are formed so as to be connected to n + region 5 formed on the back surface side. The inversion layer 7 is formed to separate electrons and holes generated near the surface by an electric field formed in the inversion layer, and to guide electrons guided to the surface to the n + region 5.

前記シリコン基板1の貫通孔1a内を含む表面側には酸
化シリコン(SiOx)膜などから成るパシベーション膜2
が厚み50Å程度に形成されている。
A passivation film 2 made of a silicon oxide (SiO x ) film or the like is formed on the surface of the silicon substrate 1 including the inside of the through hole 1a.
Is formed to a thickness of about 50 mm.

このパシベーション膜2上の受光面側および貫通孔1a
には、Ceなどのイオンを含む屈折率nが2.4程度の窒化
シリコン膜(SixNy)膜8およびCeなどのイオンを含ま
ない屈折率nが1.4程度のフッ化マグネシウム(MgF2
膜9などから成る多層反射防止膜が形成されている。こ
の多層反射防止膜8、9は、それぞれ厚み600Å、およ
び1000Å程度に形成される。
The light receiving surface side of this passivation film 2 and through hole 1a
Are a silicon nitride film (Si x N y ) film 8 having a refractive index n of about 2.4 containing ions such as Ce and magnesium fluoride (MgF 2 ) having a refractive index n of about 1.4 not containing ions such as Ce.
A multilayer antireflection film made of a film 9 and the like is formed. The multilayer antireflection films 8 and 9 are formed to have a thickness of about 600 ° and 1000 °, respectively.

また、シリコン基板1の裏面側に形成されたn+領域5
上には、n+領域5と点状に接触するAlなどから成る電極
3、およびp+領域6と点状に接触するAlなどから成る電
極4がそれぞれ形成されている。なお、n+領域5と電極
3とp+領域6の電極4とは、シリコン基板1の裏面側の
対向部でそれぞれ合流するように櫛歯状に形成すればよ
い。また、このn+領域5の電極3とp+領域6の電極4と
は、BSR(裏面側反射防止層)を兼ねるものである。
Further, an n + region 5 formed on the back side of the silicon substrate 1 is formed.
An electrode 3 made of Al or the like in contact with the n + region 5 in a point-like manner and an electrode 4 made of Al or the like in contact with the p + region 6 in a point-like manner are formed thereon. The n + region 5, the electrode 3, and the electrode 4 of the p + region 6 may be formed in a comb-tooth shape so as to merge at the opposing portions on the back surface side of the silicon substrate 1. The electrode 3 in the n + region 5 and the electrode 4 in the p + region 6 also serve as a BSR (backside antireflection layer).

上述のような太陽電池素子は以下のような工程で形成
される。
The solar cell element as described above is formed by the following steps.

まず、p型シリコン基板1をHClなどで清浄化する。 First, the p-type silicon substrate 1 is cleaned with HCl or the like.

次に、10μm程度に絞られたYAGなどのレーザを用い
て多数の貫通孔1aを傾斜して形成する。
Next, a large number of through-holes 1a are formed to be inclined using a laser such as YAG narrowed to about 10 μm.

次に、ダメージ層を除去するために、フッ酸・硝酸の
混合溶液などを用いてシリコン基板1の表面を軽くエッ
チングする。
Next, in order to remove the damaged layer, the surface of the silicon substrate 1 is lightly etched using a mixed solution of hydrofluoric acid and nitric acid.

次に、シリコン基板1の受光面側に、ピラミッド状の
凹凸部1bを形成する。このピラミッド状凹凸部1bは、水
酸化ナトリウム溶液を用いたテキスチャー処理により形
成される。
Next, a pyramid-shaped uneven portion 1b is formed on the light receiving surface side of the silicon substrate 1. The pyramid-shaped uneven portion 1b is formed by a texturing process using a sodium hydroxide solution.

次に、酸化シリコン膜などから成るパシベーション膜
2をプラズマCVD法により形成して、裏面側の所定部分
(n+領域とp+領域とを形成する部分)をエッチング除去
する。
Next, a passivation film 2 made of a silicon oxide film or the like is formed by a plasma CVD method, and a predetermined portion (a portion where an n + region and a p + region are formed) on the back surface is etched away.

次に、シリコン基板1の裏面側にn+領域5とp+領域6
とをイオン注入法または熱拡散法により形成する。
Next, an n + region 5 and a p + region 6 are formed on the back side of the silicon substrate 1.
Are formed by ion implantation or thermal diffusion.

次に、シリコン基板1の受光面側と貫通孔1a内のパシ
ベーション膜2上に、Ceイオンなどを含有する窒化シリ
コン膜8をプラズマCVD法などにより形成する。
Next, a silicon nitride film 8 containing Ce ions or the like is formed on the light receiving surface side of the silicon substrate 1 and the passivation film 2 in the through hole 1a by a plasma CVD method or the like.

なお、この反転層7は、n+層を形成した後にエッチン
グによってn層とする。
The inversion layer 7 is formed into an n layer by etching after forming an n + layer.

次に、n+領域5およびp+領域6上にAlなどから成る電
極3、4をスクリーン印刷法または蒸着法により形成す
る。
Next, electrodes 3 and 4 made of Al or the like are formed on n + region 5 and p + region 6 by screen printing or vapor deposition.

最後に、窒化シリコン膜8のフッ化マグネシウム膜9
をプラズマCVD法などで形成することにより多層反射防
止膜を形成して完成する。
Finally, the magnesium fluoride film 9 of the silicon nitride film 8
Is formed by a plasma CVD method or the like to form a multilayer antireflection film, thereby completing the process.

(発明の効果) 以上のように、本発明に係る太陽電池素子では、受光
面側に凹凸部を有するp型シリコン基板内に傾斜した貫
通孔を多数形成するとともに、このシリコン基板裏面側
の貫通孔近傍にn+領域を形成して、シリコン基板内の受
光面側から貫通孔部分を経由してn+領域に連続する反転
層を形成し、シリコン基板の受光面側と貫通孔内に反射
防止膜を形成して、シリコン基板裏面側のn+領域が形成
された部分以外の部分にp+領域を形成し、上記n+領域と
p+領域上に電極を形成して成り、受光面に電極がないこ
とから、シャドウイングロスはゼロになるとともに、電
極近傍でのキャリアの再結合損失が無くなる。
(Effects of the Invention) As described above, in the solar cell element according to the present invention, a large number of inclined through holes are formed in the p-type silicon substrate having the concave and convex portions on the light receiving surface side, and the through holes on the back side of the silicon substrate are formed. An n + region is formed in the vicinity of the hole, an inversion layer is formed from the light-receiving surface side of the silicon substrate to the n + region via the through-hole portion, and reflected on the light-receiving surface side of the silicon substrate and in the through-hole. forming a barrier layer, a p + region is formed in a portion other than the portion n + regions are formed in the silicon substrate backside, and the n + region
Since the electrode is formed on the p + region and there is no electrode on the light receiving surface, the shadowing loss becomes zero and the recombination loss of carriers near the electrode is eliminated.

また、シリコン基板の受光面側にn+層がないことか
ら、n+によるキャリアの再結合損失がなくなる。
Further, since there is no n + layer on the light receiving surface side of the silicon substrate, recombination loss of carriers due to n + is eliminated.

さらに、反転層(n層)が存在するので、効果的な集
電ができる。
Further, the presence of the inversion layer (n layer) enables effective current collection.

以上により、従来の構成に比較して電圧・電流特性が
向上する。
As described above, the voltage / current characteristics are improved as compared with the conventional configuration.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明に係る太陽電池素子の一実施例を示す斜
視図、第2図は第2図は同じく断面図、第3図は従来の
太陽電池素子を示す図、第4図は従来の他の太陽電池素
子を示す図、第5図は従来のその他の太陽電池素子を示
す図である。 1:p型シリコン基板 1a:貫通孔 1b:凹凸部、2:反射防止膜 3:n+領域の電極 4:p+領域の電極 5:n+領域 6:p+領域 8、9:反射防止膜
FIG. 1 is a perspective view showing an embodiment of a solar cell element according to the present invention, FIG. 2 is a sectional view of FIG. 2 similarly, FIG. 3 is a view showing a conventional solar cell element, and FIG. FIG. 5 is a view showing another conventional solar cell element, and FIG. 5 is a view showing another conventional solar cell element. 1: p-type silicon substrate 1a: through-hole 1b: uneven portion, 2: antireflection film 3: electrode in n + region 4: electrode in p + region 5: n + region 6: p + region 8, 9: antireflection film

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】受光面側に凹凸部を有するp型シリコン基
板内に傾斜した貫通孔を多数形成するとともに、このシ
リコン基板裏面側の貫通孔近傍にn+領域を形成して、シ
リコン基板内の受光面側から貫通孔部分を経由してn+
域に連続する反転層を形成し、シリコン基板の受光面側
と貫通孔内に反射防止膜を形成して、シリコン基板裏面
側のn+領域が形成された部分以外の部分にp+領域を形成
し、上記n+領域とp+領域上に電極を形成して成る太陽電
池素子。
1. A semiconductor device comprising : a plurality of inclined through holes formed in a p-type silicon substrate having an uneven portion on a light receiving surface side; and an n + region formed near a through hole on a back surface side of the silicon substrate. Forming an inversion layer continuous from the light receiving surface side of the silicon substrate to the n + region via the through hole portion, forming an antireflection film on the light receiving surface side of the silicon substrate and in the through hole, and forming the n + region and p + region formed in a portion other than the formed portion, the solar cell element obtained by forming an electrode on the n + region and p + region.
JP2226944A 1990-08-28 1990-08-28 Solar cell element Expired - Fee Related JP2866982B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2226944A JP2866982B2 (en) 1990-08-28 1990-08-28 Solar cell element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2226944A JP2866982B2 (en) 1990-08-28 1990-08-28 Solar cell element

Publications (2)

Publication Number Publication Date
JPH04107881A JPH04107881A (en) 1992-04-09
JP2866982B2 true JP2866982B2 (en) 1999-03-08

Family

ID=16853064

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2866982B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
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JPWO2013014860A1 (en) * 2011-07-26 2015-02-23 パナソニック株式会社 Plasma processing apparatus and plasma processing method

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JP4540447B2 (en) * 2004-10-27 2010-09-08 シャープ株式会社 Solar cell and method for manufacturing solar cell
JP5025184B2 (en) * 2006-07-28 2012-09-12 京セラ株式会社 Solar cell element, solar cell module using the same, and manufacturing method thereof
JP5103038B2 (en) * 2007-03-14 2012-12-19 シャープ株式会社 Photoelectric conversion element, solar cell module, solar power generation system
JP4902472B2 (en) * 2007-09-18 2012-03-21 三洋電機株式会社 Solar cell and solar cell module
JP5073103B2 (en) 2009-09-28 2012-11-14 京セラ株式会社 Solar cell element and manufacturing method thereof
WO2013042222A1 (en) * 2011-09-21 2013-03-28 三洋電機株式会社 Solar cell manufacturing method, and solar cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2013014860A1 (en) * 2011-07-26 2015-02-23 パナソニック株式会社 Plasma processing apparatus and plasma processing method

Also Published As

Publication number Publication date
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