JP2896972B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art In a conventional semiconductor device, as shown in FIG. 4, a scribe line 52 is provided between integrated circuits 51 on a semiconductor substrate. When dicing, a scribe line 52 is provided along the scribe line 52 with a cutter. The semiconductor substrate was being cut.

[0003]

However, in the prior art, the gap between the integrated circuits 51 is set narrow to improve the productivity.
There was a problem of cutting to 1

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device in which cutting into an integrated circuit during dicing is prevented.

[0005]

A plurality of guide patterns each including a pair of opposing wall portions are provided at portions corresponding to portions other than the intersections of scribe lines formed between the integrated circuits.
The above object is achieved by a semiconductor device in which the wall is formed along the scribe line direction and has both ends open outward.

It is preferable that the guide pattern is formed from layers such as an insulating layer and a wiring layer which constitute each of the integrated circuits.

A plurality of first guide patterns each comprising a pair of opposing walls are provided in a first portion corresponding to portions other than the intersections of the scribe lines formed between the integrated circuits, and the wall portions are provided with scribe lines. It is formed along the direction and its both ends are open toward the outside,
A second portion corresponding to the intersection of the scribe line includes a second wall including four walls extending from the center to the four corners of the intersection except for the center of the intersection. The above object can also be achieved by a semiconductor device provided with the guide pattern described above.

It is preferable that the first and second guide patterns are formed from layers such as an insulating layer and a wiring layer which constitute each of the integrated circuits.

[0009]

Next, a semiconductor device according to an embodiment of the present invention will be described. 1A and 1B are explanatory diagrams for explaining the configuration of the present example. FIG. 1A shows a plan view of a semiconductor device, and FIG. 1B shows a cross section taken along line A-A of FIG. Show. In FIG. 1A, reference numeral 1 denotes an integrated circuit, which is provided on a semiconductor substrate (not shown here). Reference numeral 2 denotes a scribe line, which is provided between the integrated circuits 1.
Reference numerals 3 and 4 are guide patterns. The guide pattern 3 is a first portion 2 corresponding to a portion other than the intersection of the scribe line 2.
0 is provided in plurality. The guide pattern 3 includes a pair of opposing wall portions 30 to 30. The wall portion 30 is formed along the direction of the scribe line 2 and has both ends open outward. That is, as shown in FIG. 2 showing a perspective view of the guide pattern 3, the wall portion 30 includes a parallel portion 31 along the scribe line 2 direction and an open portion 32 that opens outward. The guide pattern 4 is provided in the second portion 21 corresponding to the intersection of the scribe line 2. As shown in FIG. 3, which shows a perspective view of the guide pattern 4, the guide pattern 4 extends from the center to the four corners 22 to 22 of the intersection except for the center of the intersection. Four walls 41
~ 41. These guide patterns 3 and 4 are shown in FIG.
As shown in (b), the integrated circuit 1 is formed from layers such as an insulating layer 10, a wiring layer 11, and a final protective film 12 on a semiconductor substrate 13 constituting the integrated circuit 1. That is, although not specifically shown,
A guide pattern 3 is used as a transfer mask pattern when processing an insulating layer or the like in a semiconductor device manufacturing process and when processing a final protective film.
4 patterns are provided. Therefore, it is not necessary to add a special process for forming the guide patterns 3 and 4.

In the semiconductor device of the present embodiment configured as described above, the space between the guide patterns 3 and 4 is cut by a cutter (not shown) at the time of dicing. At this time, the cutter is guided in the scribe line 2 direction by the guide patterns 3 and 4. That is, in the guide pattern 3,
The cutter whose traveling direction is shifted due to various factors
As the cutter advances from the open section 32 to the parallel section 31, the traveling direction of the cutter is corrected to the scribe line 2 direction. In the guide pattern 4, since the central portion of the intersection is removed, the cutter can be guided to the center of the intersection by the walls 41 to 41, and the cutter can be guided in any two scribe line 2 directions that intersect. Thus, cutting of the cutter into the integrated circuit 1 is prevented.

Also, with this, the guide pattern 3,
4 prevents the cutter from directly cutting into the integrated circuit 1 and prevents the integrated circuit 1 from being chipped. That is, when the cutter misalignment occurs due to various factors, the chipping of the integrated circuit 1 occurs in the conventional method, but in this example, the chipping of the integrated circuit 1 due to the cutting of the cutter stops at the guide patterns 3 and 4. , Does not reach the integrated circuit 1. Further, since a plurality of guide patterns 3 and 4 are provided, even if a cut occurs in one guide pattern, the other guide patterns are not chipped, which is advantageous in this respect.

[0012]

According to the present invention, by providing a plurality of guide patterns on a scribe line, the direction of travel of the cutter can be guided in the direction along the scribe line at the time of dicing, thereby preventing cutting into an integrated circuit. Becomes possible. For this reason, defects due to chipping of the integrated circuit can be reduced, and there is an effect that a stable operation and an improved yield at the time of chip processing.

Since the guide pattern is formed from layers such as an insulating layer and a wiring layer that constitute the integrated circuit, it is not necessary to add a special step, and an increase in cost due to the provision of the guide pattern can be suppressed.

In particular, a first portion corresponding to a portion other than the intersection of the scribe lines is provided with a first portion comprising a pair of opposed wall portions.
A plurality of guide patterns are provided, and the wall portion is formed along the scribe line direction and has both ends opened outward, so that the traveling direction of the cutter can be guided in the direction along the scribe line, A second portion corresponding to the intersection of the scribe line includes a second wall including four walls extending from the center to the four corners of the intersection except for the center of the intersection. Is provided, the cutter can be guided in any intersecting scribe line directions.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram for describing a configuration of a semiconductor device according to one embodiment of the present invention;

FIG. 2 is an explanatory diagram showing a configuration of a main part of FIG. 1;

FIG. 3 is an explanatory diagram showing a configuration of a main part of FIG. 1;

FIG. 4 is an explanatory diagram for explaining a configuration of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Integrated circuit 2 Scribe line 3, 4 Guide pattern 20 1st part 21 2nd part 30 Wall part 41 Wall part

Claims (4)

(57) [Claims] A plurality of guide patterns each comprising a pair of opposing walls are provided at portions corresponding to portions other than the intersections of scribe lines formed between integrated circuits, and the walls are provided along the scribe line direction. A semiconductor device which is formed and has both ends open outward. 2. The semiconductor device according to claim 1, wherein said guide pattern is formed of a layer such as an insulating layer and a wiring layer constituting each of said integrated circuits. 3. A plurality of first guide patterns each comprising a pair of opposing wall portions are provided in a first portion corresponding to a portion other than an intersection of a scribe line formed between each integrated circuit, It is formed along the scribe line direction and has both ends open outward, and a second portion corresponding to the intersection of the scribe line, except for the center of the intersection. A second wall comprising four walls extending from the center toward the four corners of the intersection
A semiconductor device provided with the guide pattern of (1). 4. The semiconductor device according to claim 3, wherein said first and second guide patterns are formed from layers such as an insulating layer and a wiring layer constituting each of said integrated circuits.