JP2901546B2 - Semiconductor device manufacturing equipment - Google Patents
Semiconductor device manufacturing equipmentInfo
- Publication number
- JP2901546B2 JP2901546B2 JP19099196A JP19099196A JP2901546B2 JP 2901546 B2 JP2901546 B2 JP 2901546B2 JP 19099196 A JP19099196 A JP 19099196A JP 19099196 A JP19099196 A JP 19099196A JP 2901546 B2 JP2901546 B2 JP 2901546B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- silicon
- susceptor
- cover
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体装置の製造装
置に関し、特にシリコン基板を加熱し、あるいはシリコ
ン基板を加熱しながら気相蒸着により薄膜を形成する等
の各種処理を行うための装置におけるシリコン基板の加
熱装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for manufacturing a semiconductor device, and more particularly to an apparatus for performing various processes such as heating a silicon substrate or forming a thin film by vapor deposition while heating the silicon substrate. The present invention relates to a substrate heating device.
【0002】[0002]
【従来の技術】一般に半導体装置の製造工程では、その
前処理としてシリコン基板の表面に各種の薄膜を形成す
る工程が必要とされる。このような薄膜の形成工程とし
て、例えば、CVD法がある。従来の超高真空CVD装
置の一例を図5に示す。チャンバは成長室8とヒーター
室9とで構成されており、両者は被成長基板である単結
晶シリコン基板4と、これを支えるサセプタ10とで仕
切られている。そして、成長室8とヒーター室9はそれ
ぞれターボポンプ7A,7Bで1E−8Torr以下の
高真空に設定される。また、シリコン基板4の下側には
ヒーター5が配置され、このヒーター5の熱によってシ
リコン基板4は所望の温度に加熱される。さらに、前記
成長室8にはガス導入管6が接続されており、各種のガ
スが導入される。2. Description of the Related Art Generally, in a process of manufacturing a semiconductor device, a process of forming various thin films on the surface of a silicon substrate is required as a pretreatment. As a process for forming such a thin film, for example, there is a CVD method. FIG. 5 shows an example of a conventional ultra-high vacuum CVD apparatus. The chamber is composed of a growth chamber 8 and a heater chamber 9, both of which are separated by a single crystal silicon substrate 4 as a substrate to be grown and a susceptor 10 supporting the single crystal silicon substrate. Then, the growth chamber 8 and the heater chamber 9 are set to a high vacuum of 1E-8 Torr or less by the turbo pumps 7A and 7B, respectively. Further, a heater 5 is disposed below the silicon substrate 4, and the heat of the heater 5 heats the silicon substrate 4 to a desired temperature. Further, a gas introduction pipe 6 is connected to the growth chamber 8, and various gases are introduced.
【0003】このようなCVD装置では、シリコン膜成
長は、ガス導入管6よりシランやジシラン等の成長ガス
を導入して行う。また、成長ガスにジシランと同時にゲ
ルマンを加えることで、SiGe合金のエピタキシャル
膜も単結晶シリコン基板4上に成長できている。成長膜
のドーピングは、P型なら成長ガスと同時にジボラン
を、N型ならフォスフォンを導入することで行う。In such a CVD apparatus, a silicon film is grown by introducing a growth gas such as silane or disilane from a gas introduction pipe 6. By adding germane to the growth gas simultaneously with disilane, an epitaxial film of the SiGe alloy can be grown on the single crystal silicon substrate 4. The doping of the grown film is performed by introducing diborane at the same time as the growth gas in the case of the P type, and by introducing phosphone in the case of the N type.
【0004】ところで、このようなシリコン成長の際に
は、シリコン基板4と同時にサセプタ10の内側領域は
高温になるため、シリコン基板4に近いサセプタ10の
内側領域にも膜堆積が起こる。サセプタが石英であると
サセプタ10上に堆積した膜は、多結晶シリコンとな
る。この多結晶シリコンは、成長を繰り返していくと剥
がれが起こり、サセプタ10とシリコン基板4の間に隙
間を生じたり、ゴミの原因となる。これを避けるため
に、従来から図6(a),(b)にその平面図と断面図
を示すように、サセプタ10は内部サセプタ1と外部サ
セプタ2とで構成されており、内部サセプタ1はシリコ
ンで構成される。これにより、内部サセプタ1に多結晶
シリコンが形成されても、これの剥離が防止され、前記
した問題が解消される。During the silicon growth, the temperature inside the susceptor 10 is high at the same time as the silicon substrate 4, so that film deposition also occurs in the area inside the susceptor 10 near the silicon substrate 4. If the susceptor is quartz, the film deposited on the susceptor 10 will be polycrystalline silicon. This polycrystalline silicon peels off as the growth is repeated, which causes a gap between the susceptor 10 and the silicon substrate 4 and causes dust. In order to avoid this, the susceptor 10 is conventionally composed of an internal susceptor 1 and an external susceptor 2 as shown in plan and sectional views in FIGS. 6 (a) and 6 (b). It is composed of silicon. Thereby, even if polycrystalline silicon is formed on internal susceptor 1, peeling thereof is prevented, and the above-mentioned problem is solved.
【0005】[0005]
【発明が解決しようとする課題】このようにサセプタを
利用してシリコン基板を加熱しながら処理を行う構成
は、前記した超高真空CVD装置に限らず、種々の加熱
処理装置で行われているが、このようなシリコン基板の
周辺部をサセプタによって支持しながらシリコン基板を
加熱する構造では、シリコン基板の周囲側面部分の熱が
サセプタを介して熱放射されるため、周辺部での温度低
下が著しいものとなる。図7に従来の6インチシリコン
基板の温度分布を示す。この温度分布は中央部を620
℃としたときに、中央部から周辺部に向けての温度勾配
を等温線で示したものであり、シリコン酸化膜上に多結
晶シリコン膜の成長速度より求めた。成長は、成長速度
が温度に敏感である条件で行った。等温線の1つの幅
は、1℃を表している。この図を見てもわかるように、
周辺部で急激に温度が減少するのがわかる。中心部と外
側から1cmの周辺部とでは、10℃も温度が異なって
いる。The structure for performing the processing while heating the silicon substrate using the susceptor is not limited to the above-mentioned ultra-high vacuum CVD apparatus, but is performed by various heat processing apparatuses. However, in such a structure that heats the silicon substrate while supporting the peripheral portion of the silicon substrate with the susceptor, the heat of the peripheral side surface of the silicon substrate is radiated through the susceptor, so that the temperature drop in the peripheral portion is reduced. It will be significant. FIG. 7 shows a temperature distribution of a conventional 6-inch silicon substrate. This temperature distribution is 620
The temperature gradient from the center to the periphery is shown by an isotherm when the temperature is set to ° C., and was determined from the growth rate of the polycrystalline silicon film on the silicon oxide film. The growth was performed under conditions where the growth rate was sensitive to temperature. One width of the isotherm represents 1 ° C. As you can see from this figure,
It can be seen that the temperature sharply decreases in the peripheral part. The temperature differs by as much as 10 ° C. between the center and the periphery 1 cm from the outside.
【0006】このようなシリコン基板の周辺部における
温度低下により、シリコン基板の面内温度分布が不均一
なものになると、シリコン基板の全面内における成長膜
厚、ドーピング濃度にバラツキが生じ、シリコン基板の
中心部と周辺部のそれぞれにおいて製造される半導体素
子の特性が不均一なものとなり、製造歩留りが低下され
ることになる。If the in-plane temperature distribution of the silicon substrate becomes non-uniform due to such a temperature drop in the peripheral portion of the silicon substrate, the growth thickness and the doping concentration in the entire surface of the silicon substrate vary, and the silicon substrate becomes uneven. The characteristics of the semiconductor element manufactured in each of the central part and the peripheral part of the semiconductor device become uneven, and the manufacturing yield is reduced.
【0007】なお、特開平3−148829号公報に
は、シリコン基板の周辺部に、シリコン基板の温度と近
似した温度となるガード部材を設けることにより、サセ
プタとシリコン基板との間の温度差に基づく熱処理のバ
ラツキを防止する技術が記載されているが、この技術は
あくまでもサセプタとシリコン基板との間の温度差を緩
和するためのものであり、シリコン基板の面内温度分布
を均一にする点ではあまり有効ではない。Japanese Patent Application Laid-Open No. 3-148829 discloses that a guard member having a temperature close to the temperature of the silicon substrate is provided around the silicon substrate to reduce the temperature difference between the susceptor and the silicon substrate. A technique for preventing variations in the heat treatment based on the temperature is described, but this technique is only for reducing the temperature difference between the susceptor and the silicon substrate, and is intended to make the in-plane temperature distribution of the silicon substrate uniform. Then it is not very effective.
【0008】本発明の目的は、シリコン基板の面内温度
分布の均一化を可能にした半導体装置の製造装置を提供
することにある。It is an object of the present invention to provide an apparatus for manufacturing a semiconductor device capable of making the in-plane temperature distribution of a silicon substrate uniform.
【0009】[0009]
【課題を解決するための手段】本発明は、単結晶のシリ
コン基板の周辺部をサセプタによってチャンバ内に支持
し、かつこのシリコン基板に対して加熱を行う製造装置
において、前記サセプタは外周側の外部サセプタと、前
記シリコン基板に直接接してこれを支持する内周側の内
部サセプタとで構成され、前記内部サセプタがシリコン
で構成されるとともに、前記シリコン基板の周囲を囲う
ようにシリコンカバーを配置したことを特徴とする。こ
の場合、シリコンカバーは内部サセプタに接触した構成
とすることが好ましい。また、シリコンカバーは円環状
に形成されてシリコン基板の周囲にシリコン基板の周辺
部とは所定の間隔を置いて配置することが好ましい。ま
た、シリコンカバーは円周方向に分割形成されることが
好ましい。According to the present invention, there is provided a manufacturing apparatus for supporting a peripheral portion of a single crystal silicon substrate in a chamber by a susceptor and heating the silicon substrate, wherein the susceptor is located on an outer peripheral side. External susceptor and front
The inside of the inner peripheral side that directly contacts and supports the silicon substrate
And the internal susceptor is made of silicon.
And surrounds the periphery of the silicon substrate.
The silicon cover is arranged as described above . In this case, the silicon cover is in contact with the internal susceptor
It is preferable that Further, it is preferable that the silicon cover is formed in an annular shape and is disposed around the silicon substrate at a predetermined distance from the peripheral portion of the silicon substrate. Further, it is preferable that the silicon cover is divided and formed in the circumferential direction.
【0010】また、本発明においては、内部サセプタの
内周部に板厚方向の段部が形成され、シリコン基板はこ
の段部内に収納された状態で支持される構成とすること
が好ましい。[0010] In the present invention, the stepped portion in the thickness direction is formed on the inner peripheral portion of the inner susceptor, the silicon substrate is preferably configured to be supported in a state of being housed in the step portion.
【0011】[0011]
【発明の実施の形態】次に、本発明の実施形態を図面を
参照して説明する。図1(a),(b)は本発明の第1
の実施形態における要部の平面図と断面図であり、例え
ば、図5に示した超高真空CVD装置に適用するとし
て、シリコン基板をその周辺部においてサセプタによっ
て支持した状態でシリコン基板を加熱するための構造で
ある。図1において、4は単結晶の円形ウェハとしての
シリコン基板、10はこのシリコン基板4の周辺部を支
持してCVD装置のチャンバに固定支持させるためのサ
セプタである。このサセプタ10は、図6に示した従来
構成のサセプタと同様に、それぞれ径寸法が相違する円
環状の内部サセプタ1と外部サセプタ2とで構成されて
おり、外部サセプタ2の内周部に段部を設けてここに内
部サセプタ1の外周部を支持させ、この内部サセプタ1
の内周部の表面上にシリコン基板4の外周部の裏面を接
触させた状態で支持させている。そして、内部サセプタ
1はシリコンで構成され、外部サセプタ2は石英で構成
されている。Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1A and 1B show a first embodiment of the present invention.
FIGS. 6A and 6B are a plan view and a cross-sectional view of a main part of the embodiment. For example, assuming that the silicon substrate is applied to the ultrahigh vacuum CVD apparatus shown in FIG. For the structure. In FIG. 1, reference numeral 4 denotes a silicon substrate as a single-crystal circular wafer, and reference numeral 10 denotes a susceptor for supporting the peripheral portion of the silicon substrate 4 to be fixedly supported in a chamber of a CVD apparatus. The susceptor 10 is composed of an annular inner susceptor 1 and an outer susceptor 2 having different diameters, similarly to the conventional susceptor shown in FIG. The inner susceptor 1 has an outer peripheral portion supported by the inner susceptor 1.
The silicon substrate 4 is supported in a state where the rear surface of the outer peripheral portion thereof is in contact with the inner peripheral surface of the silicon substrate 4. The internal susceptor 1 is made of silicon, and the external susceptor 2 is made of quartz.
【0012】そして、この実施形態においては、前記シ
リコン基板4の周辺外側領域のサセプタの表面上に、蓄
熱カバーとして円環状をしたシリコンカバー3を配設し
ている。このシリコンカバー3とシリコン基板4との径
方向の間隔は、ここではシリコン基板の直径6インチに
対して5mmとした。In this embodiment, an annular silicon cover 3 is provided as a heat storage cover on the surface of the susceptor in the outer peripheral region of the silicon substrate 4. Here, the radial distance between the silicon cover 3 and the silicon substrate 4 was set to 5 mm with respect to the silicon substrate having a diameter of 6 inches.
【0013】このような構成によれば、この構成を図5
に示したような超高真空CVD装置に設置した上で、ヒ
ーター5によって加熱し、その際におけるシリコン基板
4の面内温度分布を測定した結果は図2に示す通りとな
る。ここではシリコン基板4の中央部を620℃とし、
周辺部に向けた温度勾配を等温線で示している。等温線
の1つの幅は、1℃を表している。なお、この場合も、
温度の測定はシリコン酸化膜上に多結晶シリコン膜の成
長速度より求めている。この結果から、従来では10℃
あった中央部と周辺部(外側から1cm)との温度差は
5℃となり、周辺部での温度低下は改善されたことが確
認された。According to such a configuration, this configuration is shown in FIG.
After being set in an ultra-high vacuum CVD apparatus as shown in FIG. 1 and heated by the heater 5, the in-plane temperature distribution of the silicon substrate 4 at that time is shown in FIG. Here, the central part of the silicon substrate 4 is set to 620 ° C.
The temperature gradient towards the periphery is indicated by isotherms. One width of the isotherm represents 1 ° C. In this case,
The temperature is measured from the growth rate of the polycrystalline silicon film on the silicon oxide film. From this result, conventionally, 10 ° C.
The temperature difference between the central portion and the peripheral portion (1 cm from the outside) was 5 ° C., confirming that the temperature drop in the peripheral portion was improved.
【0014】このようなシリコン基板の面内温度の不均
一が緩和されたのは、次の理由による。すなわち、シリ
コンカバー3はシリコン基板4の周辺部から放射される
熱を吸収し、これにより徐々にシリコン基板4の温度に
近い温度まで加熱される。そして、一旦加熱されると、
今度はシリコンカバー3が熱源となり、シリコンカバー
3からの熱輻射によりシリコン基板4の周辺部が加熱さ
れ、かつ同時にサセプタ10を加熱する。したがって、
シリコン基板4の周辺部の熱がサセプタ10を通して放
熱されるのと同程度の熱がシリコンカバー3からシリコ
ン基板4の周辺部に加えられることになり、結局シリコ
ン基板4がほぼ均一な状態に加熱されることになる。こ
こで、蓄熱カバーとしてシリコンを用いたのは、熱輻射
の程度をシリコン基板と同じにするためである。すなわ
ち、蓄熱カバーの比熱程度がシリコンよりも小さいと所
期の効果が得られ難く、逆に大きいとシリコンの周辺部
が過度に加熱されるおそれがある。The reason why the in-plane temperature non-uniformity of the silicon substrate is reduced is as follows. That is, the silicon cover 3 absorbs heat radiated from the peripheral portion of the silicon substrate 4 and is thereby gradually heated to a temperature close to the temperature of the silicon substrate 4. And once heated,
This time, the silicon cover 3 serves as a heat source, and heat radiation from the silicon cover 3 heats the peripheral portion of the silicon substrate 4 and simultaneously heats the susceptor 10. Therefore,
As much heat as the heat in the peripheral portion of the silicon substrate 4 is radiated through the susceptor 10 is applied from the silicon cover 3 to the peripheral portion of the silicon substrate 4, and eventually the silicon substrate 4 is heated to a substantially uniform state. Will be done. Here, the reason why silicon is used as the heat storage cover is to make the degree of heat radiation the same as that of the silicon substrate. That is, if the specific heat of the heat storage cover is smaller than that of silicon, it is difficult to obtain the desired effect.
【0015】なお、シリコン基板4とシリコンカバー3
との間隔は大きいとシリコンカバー3によるシリコン基
板4の周辺部の放熱による温度上昇効果が小さくなり、
逆に間隔が小さいと加熱効果が大きくなり、温度上昇が
過度なものとなる。本発明者の実験によれば、シリコン
カバー3の厚さや径方向の寸法によっても多少の変動は
あるが、間隔が1cmよりも大きいと、シリコンカバー
3による前記した効果が殆ど期待することが困難になる
ため、1cmよりも小さい間隔内で設定することが必要
なことが確認されている。The silicon substrate 4 and the silicon cover 3
Is large, the effect of the silicon cover 3 on the temperature rise due to heat radiation around the silicon substrate 4 becomes small,
Conversely, if the interval is small, the heating effect increases, and the temperature rise becomes excessive. According to the experiment of the present inventor, although there are some fluctuations depending on the thickness and the radial dimension of the silicon cover 3, if the interval is larger than 1 cm, it is difficult to expect the above-mentioned effects by the silicon cover 3. It has been confirmed that it is necessary to set the distance within an interval smaller than 1 cm.
【0016】図3(a),(b)は本発明の第2の実施
形態の平面図と断面図である。この実施形態では、内部
サセプタ1と外部サセプタ2の厚さをシリコン基板3の
厚さよりも厚く形成するとともに、内部サセプタ1の下
面が外部サセプタ2の下面と同一面となるように形成
し、さらに内部サセプタ1の上面に段部1aを設けてこ
の部分を薄肉とし、この段部1aにおいてシリコン基板
4の外周部の下面を接触状態で支持させている。この場
合、シリコン基板4の上面は内部サセプタ1の上面より
も低い位置にすることが好ましい。そして、蓄熱カバー
としてシリコンカバー3Aを設けているが、ここではシ
リコンカバー3Aは円周方向に4分割し、かつ隣接する
シリコンカバー間に適宜の間隔を設けている。なお、内
部サセプタ1の段部1aの内側壁とシリコン基板4との
間隔を5mmとした。また、シリコン基板4とシリコン
カバー3Aとの間の間隔は第1の実施形態と同じであ
る。FIGS. 3A and 3B are a plan view and a sectional view of a second embodiment of the present invention. In this embodiment, the thickness of the internal susceptor 1 and the external susceptor 2 is formed to be thicker than the thickness of the silicon substrate 3, and the lower surface of the internal susceptor 1 is formed to be flush with the lower surface of the external susceptor 2. A step portion 1a is provided on the upper surface of the internal susceptor 1 to make this portion thinner, and the lower surface of the outer peripheral portion of the silicon substrate 4 is supported in contact with the step portion 1a. In this case, it is preferable that the upper surface of the silicon substrate 4 be lower than the upper surface of the internal susceptor 1. The silicon cover 3A is provided as a heat storage cover. In this case, the silicon cover 3A is divided into four in the circumferential direction, and an appropriate space is provided between adjacent silicon covers. The distance between the inner wall of the step 1a of the internal susceptor 1 and the silicon substrate 4 was 5 mm. The distance between the silicon substrate 4 and the silicon cover 3A is the same as in the first embodiment.
【0017】図4はこの第2の実施形態におけるシリコ
ン基板内の面内温度分布を示す図である。シリコン基板
4の中央部の温度は620℃であり、等温線の1つの幅
は、1℃を表している。この結果、シリコン基板4の中
心部と周辺部(外側から1cm)との温度差は2℃とな
り、第1の実施形態よりもさらに温度分布が改善された
のがわかる。これはシリコン基板4の外周部を支持する
内部サセプタ1が段部1aによって薄肉とされているた
めに内部サセプタ1を通しての放熱が抑制され、かつシ
リコン基板4の表面高さがシリコンカバー3Aの表面高
さよりも低い位置にあるためにシリコン基板4の周辺部
からの直接的な放熱が抑制されるためであると考えられ
る。また、シリコンカバー3Aを周方向に4分割したこ
とで、熱歪による変形を防ぐことも可能となる。FIG. 4 is a diagram showing an in-plane temperature distribution in the silicon substrate according to the second embodiment. The temperature at the center of the silicon substrate 4 is 620 ° C., and one width of the isotherm represents 1 ° C. As a result, the temperature difference between the central portion and the peripheral portion (1 cm from the outside) of the silicon substrate 4 was 2 ° C., which indicates that the temperature distribution was further improved as compared with the first embodiment. This is because the internal susceptor 1 supporting the outer peripheral portion of the silicon substrate 4 is made thin by the stepped portion 1a, so that heat radiation through the internal susceptor 1 is suppressed, and the surface height of the silicon substrate 4 is reduced to the surface of the silicon cover 3A. It is considered that this is because direct heat radiation from the peripheral portion of the silicon substrate 4 is suppressed because it is at a position lower than the height. Further, by dividing the silicon cover 3A into four parts in the circumferential direction, it is possible to prevent deformation due to thermal strain.
【0018】なお、本発明は前記した各実施形態に限ら
れるものではなく、蓄熱カバーの素材はシリコンに限ら
れるものではなく、シリコン基板の面内温度の不均一の
程度に応じてシリコンよりも比熱が大きなもの、あるい
は小さなものを適宜に選択することができる。また、蓄
熱カバーの径方向の寸法や分割数も、適宜に調整するこ
とが可能である。さらに、場合によっては、内部サセプ
タと蓄熱カバーを共にシリコンで構成し、かつ加工が可
能である場合には、両者を一体に形成することも可能で
ある。The present invention is not limited to the above embodiments, and the material of the heat storage cover is not limited to silicon, but may be made of silicon depending on the degree of unevenness of the in-plane temperature of the silicon substrate. A material having a large specific heat or a material having a small specific heat can be appropriately selected. Also, the radial dimension and the number of divisions of the heat storage cover can be appropriately adjusted. Further, in some cases, when both the internal susceptor and the heat storage cover are made of silicon and can be processed, both can be formed integrally.
【0019】[0019]
【発明の効果】以上説明したように本発明は、シリコン
基板の周辺部をサセプタによってチャンバ内に支持した
状態で加熱を行う製造装置において、サセプタを外周側
の外部サセプタと、シリコン基板に直接接してこれを支
持する内周側の内部サセプタとで構成し、かつ内部サセ
プタをシリコンで構成するとともに、シリコン基板の周
囲を囲うようにシリコンカバーを配置しているので、シ
リコン基板とシリコンカバーとの間の熱の授受が可能と
なり、シリコン基板の周辺部が中央部に対して温度低下
されることによるシリコン基板の面内温度分布の不均一
を抑制し、シリコン基板に対する各種処理を面内におい
て均一化することができ、製造歩留りの高い半導体装置
を製造することが可能となる。因みに、本発明によれ
ば、6インチのシリコン基板の中心部と周辺部の温度差
が10℃から2℃に改善できた。As described above, the present invention relates to a manufacturing apparatus for performing heating while a peripheral portion of a silicon substrate is supported in a chamber by a susceptor.
External susceptor and directly in contact with the silicon substrate
And an internal susceptor on the inner peripheral side
Is made of silicon and the periphery of the silicon substrate
Since the silicon cover is arranged so as to surround the enclosure, heat can be transferred between the silicon substrate and the silicon cover, and the temperature of the peripheral portion of the silicon substrate becomes lower than that of the central portion of the silicon substrate. Non-uniformity of the in-plane temperature distribution can be suppressed, and various processes for the silicon substrate can be uniformed in the plane, so that a semiconductor device with a high production yield can be manufactured. Incidentally, according to the present invention, the temperature difference between the central part and the peripheral part of the 6-inch silicon substrate could be improved from 10 ° C. to 2 ° C.
【図1】本発明の第1の実施形態の平面図と断面図であ
る。FIG. 1 is a plan view and a cross-sectional view of a first embodiment of the present invention.
【図2】第1の実施形態のシリコン基板の面内温度分布
を示す図である。FIG. 2 is a diagram illustrating an in-plane temperature distribution of the silicon substrate according to the first embodiment.
【図3】本発明の第2の実施形態の平面図と断面図であ
る。FIG. 3 is a plan view and a cross-sectional view of a second embodiment of the present invention.
【図4】第2の実施形態のシリコン基板の面内温度分布
を示す図である。FIG. 4 is a diagram illustrating an in-plane temperature distribution of a silicon substrate according to a second embodiment.
【図5】本発明が適用される熱処理装置の一例としての
超高真空CVD装置の概略構成図である。FIG. 5 is a schematic configuration diagram of an ultra-high vacuum CVD apparatus as an example of a heat treatment apparatus to which the present invention is applied.
【図6】従来のサセプタの構成を示す平面図と断面図で
ある。FIG. 6 is a plan view and a cross-sectional view showing a configuration of a conventional susceptor.
【図7】従来におけるシリコン基板の面内温度分布を示
す図である。FIG. 7 is a diagram showing a conventional in-plane temperature distribution of a silicon substrate.
1 内部サセプタ 2 外部サセプタ 3,3A 蓄熱カバー(シリコンカバー) 4 シリコン基板 5 ヒーター 6 ガス導入管 7A,7B ターボポンプ 8 成長室 9 ヒーター室 10 サセプタ DESCRIPTION OF SYMBOLS 1 Internal susceptor 2 External susceptor 3, 3A Heat storage cover (silicon cover) 4 Silicon substrate 5 Heater 6 Gas introduction pipe 7A, 7B Turbo pump 8 Growth chamber 9 Heater chamber 10 Susceptor
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平7−245264(JP,A) 特開 平4−211117(JP,A) 特開 平5−70287(JP,A) 特開 平5−90165(JP,A) ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-245264 (JP, A) JP-A-4-211117 (JP, A) JP-A-5-70287 (JP, A) JP-A-5-27087 90165 (JP, A)
Claims (6)
タによってチャンバ内に支持し、前記シリコン基板に対
して加熱を行う半導体装置の製造装置において、前記サ
セプタは、外周側の外部サセプタと、前記シリコン基板
に直接接してこれを支持する内周側の内部サセプタとで
構成され、前記内部サセプタがシリコンで構成されると
ともに、前記シリコン基板の周囲を囲うようにシリコン
カバーを配置したことを特徴とする半導体装置の製造装
置。The method according to claim 1 peripheral portion of a single crystal silicon substrate is supported in the chamber by the susceptor, in the apparatus for manufacturing a semiconductor device for heating with respect to the silicon substrate, the support
The sceptor is composed of an outer susceptor on the outer peripheral side and an inner susceptor on the inner peripheral side which directly contacts and supports the silicon substrate.
And the internal susceptor is made of silicon.
Both apparatus for manufacturing a semiconductor device characterized by placing the silicon <br/> cover so as to surround the periphery of the silicon substrate.
とが接触されている請求項1に記載の半導体装置の製造
装置。2. The internal susceptor and the silicon cover.
2. The apparatus for manufacturing a semiconductor device according to claim 1, wherein
れ、前記シリコン基板の周囲にシリコン基板の周辺部と
は所定の間隔を置いて配置される請求項1又は2に記載
の半導体装置の製造装置。Wherein the silicon cover is formed in an annular shape, a semiconductor according <br/> to claim 1 or 2 and the peripheral portion of the silicon substrate are disposed at predetermined intervals around the silicon substrate Equipment manufacturing equipment.
隔が1cm以内である請求項3に記載の半導体装置の製
造装置。4. The apparatus for manufacturing a semiconductor device according to claim 3 distance between the silicon substrate and the silicon cover is within 1 cm.
成されてなる請求項1ないし4のいずれかに記載の半導
体装置の製造方法。 5. The method for manufacturing a semiconductor device according to claim 1, wherein said silicon cover is formed so as to be divided in a circumferential direction.
段部が形成され、前記シリコン基板は前記段部内に収納
された状態で支持される請求項1ないし5のいずれかに
記載の半導体装置の製造装置。6. A stepped portion in the thickness direction on the inner peripheral portion of the internal susceptor is formed, the silicon substrate in any of claims 1 to 5 is supported in a state of being housed in the step portion
An apparatus for manufacturing a semiconductor device as described in the above .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19099196A JP2901546B2 (en) | 1996-07-19 | 1996-07-19 | Semiconductor device manufacturing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19099196A JP2901546B2 (en) | 1996-07-19 | 1996-07-19 | Semiconductor device manufacturing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1041235A JPH1041235A (en) | 1998-02-13 |
| JP2901546B2 true JP2901546B2 (en) | 1999-06-07 |
Family
ID=16267055
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19099196A Expired - Lifetime JP2901546B2 (en) | 1996-07-19 | 1996-07-19 | Semiconductor device manufacturing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2901546B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11244839B2 (en) | 2018-08-27 | 2022-02-08 | Samsung Electronics Co., Ltd. | Plasma processing apparatus |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002158178A (en) | 2000-11-21 | 2002-05-31 | Hitachi Kokusai Electric Inc | Substrate processing apparatus and semiconductor device manufacturing method |
| JP6013155B2 (en) * | 2012-11-28 | 2016-10-25 | 大陽日酸株式会社 | Vapor growth equipment |
| CN112992743B (en) * | 2021-05-17 | 2021-09-17 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process equipment |
-
1996
- 1996-07-19 JP JP19099196A patent/JP2901546B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11244839B2 (en) | 2018-08-27 | 2022-02-08 | Samsung Electronics Co., Ltd. | Plasma processing apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1041235A (en) | 1998-02-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6301434B1 (en) | Apparatus and method for CVD and thermal processing of semiconductor substrates | |
| US4986215A (en) | Susceptor for vapor-phase growth system | |
| JP3586031B2 (en) | Susceptor, heat treatment apparatus and heat treatment method | |
| US5685906A (en) | Method and apparatus for configuring an epitaxial reactor for reduced set-up time and improved layer quality | |
| JP3167964B2 (en) | Gas injection system and gas injection method for CVD reactor | |
| KR102370949B1 (en) | Method for depositing an epitaxial layer on the front surface of a semiconductor wafer and apparatus for performing the method | |
| JP3076791B2 (en) | Semiconductor manufacturing equipment | |
| US20080032036A1 (en) | Manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device | |
| JP7778150B2 (en) | Systems and methods for preheating rings in semiconductor wafer reactors | |
| JP3004846B2 (en) | Susceptor for vapor phase growth equipment | |
| CN110998787B (en) | Epitaxially coated semiconductor wafer composed of single crystal silicon and method of manufacturing same | |
| EP0872878A1 (en) | Heat-treating apparatus | |
| JP2020096181A (en) | Susceptor and chemical vapor deposition equipment | |
| JP3297288B2 (en) | Apparatus and method for manufacturing semiconductor device | |
| US6099650A (en) | Structure and method for reducing slip in semiconductor wafers | |
| WO2003073486A1 (en) | Heat treatment device and heat treatment method | |
| JP2901546B2 (en) | Semiconductor device manufacturing equipment | |
| JP2785614B2 (en) | Cylinder type epitaxial layer growth equipment | |
| TWI851023B (en) | Method and apparatus for back-sealing silicon wafers | |
| JPH04133417A (en) | Heat-treatment device | |
| WO2020158657A1 (en) | Film forming apparatus and film forming method | |
| JPH07245264A (en) | Vapor phase growth equipment | |
| JP3603216B2 (en) | Thin film growth equipment | |
| JPH02174114A (en) | Susceptor | |
| JPH0727870B2 (en) | Low pressure vapor deposition method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080319 Year of fee payment: 9 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080319 Year of fee payment: 9 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080319 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090319 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100319 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100319 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110319 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110319 Year of fee payment: 12 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110319 Year of fee payment: 12 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110319 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120319 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120319 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130319 Year of fee payment: 14 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130319 Year of fee payment: 14 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140319 Year of fee payment: 15 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |