Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP2905331B2 - Double-sided board - Google Patents
[go: Go Back, main page]

JP2905331B2 - Double-sided board - Google Patents

Double-sided board

Info

Publication number
JP2905331B2
JP2905331B2 JP10928592A JP10928592A JP2905331B2 JP 2905331 B2 JP2905331 B2 JP 2905331B2 JP 10928592 A JP10928592 A JP 10928592A JP 10928592 A JP10928592 A JP 10928592A JP 2905331 B2 JP2905331 B2 JP 2905331B2
Authority
JP
Japan
Prior art keywords
insulating film
double
layer
sided
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP10928592A
Other languages
Japanese (ja)
Other versions
JPH05283835A (en
Inventor
周 望月
雅子 前田
一美 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP10928592A priority Critical patent/JP2905331B2/en
Priority to US07/945,929 priority patent/US5374469A/en
Priority to EP19920116025 priority patent/EP0533198A3/en
Publication of JPH05283835A publication Critical patent/JPH05283835A/en
Application granted granted Critical
Publication of JP2905331B2 publication Critical patent/JP2905331B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は両面基板に関し、詳しく
は両面に形成された導電層と絶縁性フィルムとの界面で
の接着強度に優れた両面基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a double-sided substrate, and more particularly to a double-sided substrate having excellent adhesive strength at an interface between a conductive layer formed on both sides and an insulating film.

【0002】[0002]

【従来の技術】近年、電子機器が軽量化や薄型化、小型
化するのに伴い、半導体素子や半導体装置を搭載する回
路基板の薄型化や高密度化が要望されている。このよう
な要望に応えるために、フレキシブルな配線基板も高性
能化が図られ、銅箔と絶縁性フィルムとの接着に接着剤
を用いない2層構造の片面基板や両面基板が数多く上市
されている。また、両面基板においては絶縁性フィルム
の厚み方向にスルーホールメッキによる導通路を形成
し、さらに高性能化するために両面の銅箔を導通させる
ことも行われている。
2. Description of the Related Art In recent years, as electronic devices have become lighter, thinner, and smaller, there has been a demand for thinner and higher density circuit boards on which semiconductor elements and semiconductor devices are mounted. In order to respond to such demands, flexible wiring boards have also been improved in performance, and many single-sided boards and double-sided boards having a two-layer structure that do not use an adhesive for bonding a copper foil and an insulating film have been put on the market. I have. In a double-sided board, a conductive path is formed by through-hole plating in the thickness direction of an insulating film, and copper foil on both sides is electrically connected to further improve performance.

【0003】このような両面基板を両面に導通させるた
めには、一般的にまず絶縁性フィルムの両面に銅箔を加
熱圧着などの手段によって積層して両面基板を作製した
のち、ドリルなどを用いた機械的方法や、薬液によるウ
エットエッチングや感光性樹脂のフォトリソグラフィー
などを用いた化学的方法などによって絶縁性フィルムに
スルーホールを形成している。そして、形成したスルー
ホール内壁面に無電解メッキや蒸着などの手法によって
薄膜層(種層)を形成したのち、さらに電解メッキなど
によってこの薄膜層を厚膜化して導通路を形成するとい
う煩雑な方法が採用されている。
In order to conduct such a double-sided board to both sides, generally, first, a copper foil is laminated on both sides of an insulating film by means of heat and pressure to form a double-sided board, and then a drill or the like is used. Through holes are formed in the insulating film by a conventional mechanical method or a chemical method using wet etching with a chemical solution or photolithography of a photosensitive resin. Then, a thin film layer (seed layer) is formed on the inner wall surface of the formed through-hole by a method such as electroless plating or vapor deposition, and then the thin film layer is thickened by electrolytic plating or the like to form a conductive path. The method has been adopted.

【0004】このような方法ではスルーホールの孔径が
小さい場合、スルーホール内壁面への薄膜形成不良が生
じたり、また製造工程も煩雑となる。特に、スルーホー
ルの孔径があまりに微細であると、導通路形成時に用い
るメッキ液が充分にスルーホール内に浸透せず、導通が
確実にとれないだけでなく、スルーホール内壁面とメッ
キによって形成される金属の薄膜層との界面での密着性
が充分でなかったり、導通路の電気抵抗値が大きくなる
傾向を示す。さらに、スルーホールの形成を両面基板の
作製後に行うために、スルーホールの形成精度の確認検
査が全製造工程の後半となるため、不良品チェックが遅
くなり製造効率の点でも決して良好なものとは云えな
い。
[0004] In such a method, when the diameter of the through hole is small, the formation of a thin film on the inner wall surface of the through hole may occur, and the manufacturing process may be complicated. In particular, if the diameter of the through-hole is too small, the plating solution used for forming the conductive path does not sufficiently penetrate into the through-hole, not only does not ensure the conduction, but also is formed by plating the inner wall surface of the through-hole. In this case, the adhesiveness at the interface with the metal thin film layer is not sufficient, and the electrical resistance of the conductive path tends to increase. Furthermore, since the formation of through-holes is performed after the production of the double-sided board, the confirmation inspection of through-hole formation accuracy is performed in the latter half of the entire manufacturing process, so that defective product checking is delayed and the efficiency of manufacturing is never good. I can't say.

【0005】また、上記スルーホールメッキ法を用いた
場合、両面に形成された銅箔と絶縁性フィルムとの界面
での接着強度をさらに向上させることがあまり期待でき
ず、両面基板作製時の加熱圧着条件によっては界面剥離
を生じることもある。
Further, when the above-mentioned through-hole plating method is used, it is not expected that the adhesive strength at the interface between the copper foil formed on both sides and the insulating film is further improved, so that the heating during the production of the double-sided board is difficult. Interfacial peeling may occur depending on the pressure bonding conditions.

【0006】[0006]

【発明が解決しようとする課題】本発明は上記従来の問
題に鑑みてなされたものであって、両面に導体層を有す
る両面基板に導通路を形成するに当たり、絶縁性フィル
ムにのみ金属物質を充填した導通路を形成して電気抵抗
値を小さくし、さらに導通路端部には絶縁性フィルム表
面から突出させた金属突出を形成して、この突出部を導
電層内に埋設接触する構造とすることによって、上記従
来の両面基板が有する問題点を一挙に解決するに至っ
た。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems. In forming a conductive path in a double-sided substrate having a conductor layer on both sides, a metal substance is applied only to an insulating film. A structure in which a filled conductive path is formed to reduce the electric resistance value, and a metal protrusion protruding from the surface of the insulating film is formed at the end of the conductive path, and the protruding part is buried in the conductive layer and in contact with the conductive layer. By doing so, the problems of the conventional double-sided board have been solved at once.

【0007】[0007]

【課題を解決するための手段】即ち、本発明は絶縁性フ
ィルムとその両面に形成された導電層からなる両面基板
であって、絶縁性フィルムには厚み方向に独立する貫通
孔内に金属物質を充填してなる導通路が電解メッキによ
り形成されていると共に、該導通路の少なくとも片端部
には上記導電層内に埋設して接触し、貫通孔径よりも大
きな突起径を有する金属突起が形成されていることを特
徴とする両面基板を提供するものである。
That is, the present invention relates to a double-sided substrate comprising an insulating film and conductive layers formed on both sides of the insulating film. Is formed by electrolytic plating, and a metal projection having a projection diameter larger than the diameter of the through hole is formed at least at one end of the conduction path by being buried in and contacting the conductive layer. It is intended to provide a double-sided substrate characterized in that:

【0008】本発明の両面基板に用いる絶縁性フィルム
としては実質的に電気絶縁性を有するものであればよい
が、耐熱性や加熱による寸法安定性、機械的強度などの
点からはポリイミド樹脂から形成することが好ましく、
特に両面に形成する導電層との密着性の点から加熱圧着
によって加熱流動して確実に接着できる熱可塑性ポリイ
ミド樹脂を用いることが好ましい。また、絶縁性フィル
ムの厚みは通常、5〜200μm程度に設定する。な
お、本発明における「熱可塑性」とは、ガラス転移温度
が200℃以上であって、しかもガラス転移温度よりも
100℃高い温度での溶融粘度が1×108 ポイズ以下
の値を有するものと定義される。
The insulating film used for the double-sided substrate of the present invention may be any one which has substantially electric insulation. However, from the viewpoints of heat resistance, dimensional stability by heating, and mechanical strength, polyimide resin is used. Is preferably formed,
In particular, it is preferable to use a thermoplastic polyimide resin which can be heated and flowed by heating and pressing to surely adhere to the conductive layers formed on both surfaces, from the viewpoint of adhesion. The thickness of the insulating film is usually set to about 5 to 200 μm. The term “thermoplastic” in the present invention means that the glass transition temperature is 200 ° C. or higher, and the melt viscosity at a temperature 100 ° C. higher than the glass transition temperature has a value of 1 × 10 8 poise or less. Defined.

【0009】上記熱可塑性ポリイミド樹脂は、例えば下
記のテトラカルボン酸二無水物またはその誘導体と、下
記ジアミン成分との縮重合反応によって得られるポリア
ミド酸をイミド化することによって得ることができる。
The thermoplastic polyimide resin can be obtained, for example, by imidizing a polyamic acid obtained by a polycondensation reaction between the following tetracarboxylic dianhydride or a derivative thereof and the following diamine component.

【0010】テトラカルボン酸二無水物またはその誘導
体としては、具体的にはビス(3,4−ジカルボキシフ
ェニル)エーテル二無水物、ビス(3,4−ジカルボキ
シフェニル)スルホン二無水物、ビス(3,4−ジカル
ボキシフェニル)ヘキサフルオロプロパン二無水物、
3,3’,4,4’−ベンゾフェノンテトラカルボン酸
二無水物、2,2−ビス(3,4−ジカルボキシフェニ
ル)プロパン二無水物、ビス(3,4−ジカルボキシフ
ェニル)ジフルオロメタン二無水物など、およびこれら
の誘導体のうち少なくとも一種を用いることができる。
Examples of the tetracarboxylic dianhydride or a derivative thereof include bis (3,4-dicarboxyphenyl) ether dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride, (3,4-dicarboxyphenyl) hexafluoropropane dianhydride,
3,3 ', 4,4'-benzophenonetetracarboxylic dianhydride, 2,2-bis (3,4-dicarboxyphenyl) propane dianhydride, bis (3,4-dicarboxyphenyl) difluoromethane dianhydride An anhydride or the like, and at least one of these derivatives can be used.

【0011】一方、ジアミン成分としてはビス〔4−
(3−アミノフェノキシ)フェニル〕スルホン、ビス
〔4−(4−アミノフェノキシ)フェニル〕スルホン、
ビス〔4−(4−アミノフェノキシ)フェニル〕ヘキサ
フルオロプロパン、3,3’−ジアミノジフェニルスル
ホン、3,4’−ジアミノジフェニルスルホン、4,
4’−ジアミノジフェニルスルホン、ビス〔4−(3−
アミノフェノキシ)フェニル〕エーテル、ビス〔4−
(4−アミノフェノキシ)フェニル〕エーテル、ビス
〔4−(3−アミノフェノキシ)フェニル〕プロパン、
ビス〔4−(4−アミノフェノキシ)フェニル〕プロパ
ン、3,3’−ジアミノジフェニルプロパン、3,3’
−ジアミノベンゾフェノンなどのうち少なくとも一種を
用いることができる。
On the other hand, bis [4-
(3-aminophenoxy) phenyl] sulfone, bis [4- (4-aminophenoxy) phenyl] sulfone,
Bis [4- (4-aminophenoxy) phenyl] hexafluoropropane, 3,3'-diaminodiphenylsulfone, 3,4'-diaminodiphenylsulfone, 4,
4'-diaminodiphenyl sulfone, bis [4- (3-
Aminophenoxy) phenyl] ether, bis [4-
(4-aminophenoxy) phenyl] ether, bis [4- (3-aminophenoxy) phenyl] propane,
Bis [4- (4-aminophenoxy) phenyl] propane, 3,3'-diaminodiphenylpropane, 3,3 '
-At least one of diaminobenzophenone and the like can be used.

【0012】また、本発明における上記絶縁性フィルム
は、上記熱可塑性ポリイミド樹脂層を両面外層に有し、
内層には例えば低線膨張性ポリイミド樹脂層などの絶縁
性樹脂層を積層して3層以上の多層構造としておくこと
もできる。このように低線膨張性を有する層を内層に形
成することによって、銅箔などの導電層との積層工程に
おいて導電層と絶縁性フィルムとの線膨張係数が近似す
るので、得られる両面基板がカールや反りを起こすこと
が防止できて好ましいものである。
The insulating film of the present invention has the thermoplastic polyimide resin layer on both outer layers,
As the inner layer, for example, an insulating resin layer such as a low linear expansion polyimide resin layer may be laminated to form a multilayer structure of three or more layers. By forming the layer having a low linear expansion property as the inner layer in this manner, the linear expansion coefficients of the conductive layer and the insulating film are approximated in the step of laminating the conductive layer such as a copper foil, so that the obtained double-sided substrate is formed. It is preferable because curling and warping can be prevented.

【0013】このような低線膨張性ポリイミド樹脂と
は、線膨張係数が2.0×10-5cm/cm/℃以下の
値を有するポリイミド樹脂であって、具体的にはテトラ
カルボン酸成分として3,3’,4,4’−ビフェニル
テトラカルボン酸二無水物、ピロメリット酸二無水物、
ビス(3,4−ジカルボキシフェニル)スルホン二無水
物、2,2’3,3’−ビフェニルテトラカルボン酸二
無水物、3,3’,4,4’−ベンゾフェノンテトラカ
ルボン酸二無水物の少なくとも一種を用い、ジアミン成
分としてはp−フェニレンジアミン、4,4’−ジアミ
ノジフェニルエーテル、m−フェニレンジアミン、3,
4’−ジアミノジフェニルエーテル、3,3’−ジアミ
ノジフェニルエーテル、4,4’−ジアミノビフェニル
の少なくとも一種を用いて重合反応させたものを用いる
ことが好ましい。
The low linear expansion polyimide resin is a polyimide resin having a linear expansion coefficient of 2.0 × 10 −5 cm / cm / ° C. or less, and specifically, a tetracarboxylic acid component. 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride, pyromellitic dianhydride as
Bis (3,4-dicarboxyphenyl) sulfone dianhydride, 2,2′3,3′-biphenyltetracarboxylic dianhydride, 3,3 ′, 4,4′-benzophenonetetracarboxylic dianhydride At least one kind is used, and as a diamine component, p-phenylenediamine, 4,4′-diaminodiphenyl ether, m-phenylenediamine,
It is preferable to use a polymer obtained by performing a polymerization reaction using at least one of 4′-diaminodiphenyl ether, 3,3′-diaminodiphenyl ether, and 4,4′-diaminobiphenyl.

【0014】本発明の両面基板は上記絶縁性フィルムの
両面に銅箔などの導電層が形成され、絶縁性フィルム内
には厚み方向に独立する導通路を有するものである。絶
縁性フィルムと導電層を積層する方法としては、銅箔な
どの導電層の片面にポリイミド樹脂の溶液もしくはその
前駆体であるポリアミド酸の溶液をロールコーターやコ
ンマコーター、ナイフコーター、ドクターブレードなど
を用いて塗布、乾燥することによって絶縁性フィルムと
することができる。その他の方法としては予め作製した
絶縁性フィルムの片面もしくは両面に金属などの導電体
を蒸着法やメッキ法などによって層状に形成したり、導
電層としての銅箔などを加熱圧着する方法などが採用で
きる。
The double-sided substrate of the present invention has a conductive layer such as a copper foil formed on both sides of the above-mentioned insulating film, and has an independent conductive path in the thickness direction in the insulating film. As a method of laminating an insulating film and a conductive layer, a solution of a polyimide resin or a solution of a polyamic acid which is a precursor of the solution on one side of a conductive layer such as a copper foil is applied using a roll coater, a comma coater, a knife coater, a doctor blade, or the like. It can be used as an insulating film by coating and drying. Other methods such as forming a conductor such as metal in a layer on one or both sides of an insulating film prepared in advance by vapor deposition or plating, or applying heat and pressure to a copper foil or the like as a conductive layer are adopted. it can.

【0015】一方、 導通路は、絶縁性フィルムの所定
の位置に通常5〜200μm程度、好ましくは10〜1
00μm程度の孔径の貫通孔を形成して、この貫通孔に
金属物質を充填することによって形成される。
On the other hand, the conducting path is usually formed at a predetermined position on the insulating film at about 5 to 200 μm, preferably 10 to 1 μm.
It is formed by forming a through hole having a diameter of about 00 μm and filling the through hole with a metal substance.

【0016】貫通孔の形成方法としては、アルカリ溶液
などによるウエットエッチング法、レーザーやプラズマ
などによるドライエッチング法、パンチングやドリルな
どによる機械的加工法などが挙げられる。これらのう
ち、加工精度や加工速度、加工形状の多様性などを考慮
すると、レーザー加工法が好ましく、特に400nm以
下の発振波長を有する紫外光レーザーによるアブレーシ
ョンが好ましい。このような紫外光レーザーとしてはエ
キシマレーザーやYAGレーザーの第3高調波などを用
いることができる。
Examples of the method of forming the through holes include a wet etching method using an alkali solution or the like, a dry etching method using a laser or plasma, and a mechanical processing method using punching or a drill. Among these, in consideration of processing accuracy, processing speed, variety of processing shapes, and the like, a laser processing method is preferable, and ablation using an ultraviolet laser having an oscillation wavelength of 400 nm or less is particularly preferable. As such an ultraviolet light laser, an excimer laser or a third harmonic of a YAG laser can be used.

【0017】上記のようにして形成した貫通孔に充填さ
れる金属物質としては、金、銀、銅、ニッケル、コバル
ト、錫、鉛、インジウムなどの金属、もしくはこれらを
主成分とする各種合金などが挙げられ、これらの金属物
質はメッキ法によって充填することが好ましい。
Examples of the metal substance to be filled in the through-hole formed as described above include metals such as gold, silver, copper, nickel, cobalt, tin, lead, and indium, and various alloys containing these as main components. These metal substances are preferably filled by a plating method.

【0018】上記導通路は少なくともその片端部には上
記金属物質からなる金属突起が導電層と接するように形
成されており、しかもこの金属突起は導電層内に埋設さ
れている。埋設の程度は接する導電層の厚みの2〜50
%程度にすることによって、確実な導通と導電層と絶縁
性フィルムとの密着性の点から好ましい。このような金
属突起は貫通孔への上記金属物質のメッキ充填において
メッキ時間を調整することによって形成することができ
る。突出高さは通常、1〜20μm程度に調整し、突起
径を貫通孔径よりも大きくすることで導通路を絶縁性フ
ィルム内に確実に保持することができるので好ましい。
At least one end of the conduction path is formed with a metal projection made of the above-mentioned metal substance so as to be in contact with the conductive layer, and the metal projection is embedded in the conductive layer. The degree of embedding is 2 to 50 of the thickness of the conductive layer in contact.
% Is preferable in terms of reliable conduction and adhesion between the conductive layer and the insulating film. Such a metal projection can be formed by adjusting the plating time when filling the through hole with the metal substance. The height of the protrusion is usually adjusted to about 1 to 20 μm, and the diameter of the protrusion is preferably larger than the diameter of the through-hole, so that the conduction path can be reliably held in the insulating film.

【0019】[0019]

【実施例】本発明の両面基板は上記構成からなるもので
あるが、例えば、下記実施例に示す方法によって得るこ
とができる。なお、本発明の両面基板は下記実施例に限
定されるものではなく、本発明の技術的思想を逸脱しな
い範囲で種々の変形は可能である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The double-sided substrate of the present invention has the above-mentioned structure, and can be obtained, for example, by the method shown in the following embodiment. The double-sided board of the present invention is not limited to the following embodiments, and various modifications can be made without departing from the technical idea of the present invention.

【0020】実施例1(図1参照) 3,3’,4,4’−ビフェニルテトラカルボン酸二無
水物とp−フェニレンジアミンをN−メチル−2−ピロ
リドン中にて重合して得たポリアミド酸溶液を銅箔上に
塗布乾燥、イミド化処理して、30μm厚の絶縁性フィ
ルム1と18μm厚の導電層2とからなる片面基板を作
製した。
Example 1 (See FIG. 1) Polyamide obtained by polymerizing 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride and p-phenylenediamine in N-methyl-2-pyrrolidone The acid solution was applied onto a copper foil, dried and imidized to prepare a single-sided substrate comprising an insulating film 1 having a thickness of 30 μm and a conductive layer 2 having a thickness of 18 μm.

【0021】得られた基板の絶縁性フィルム1表面にK
rFエキシマレーザー光を照射して絶縁性フィルム1の
みをドライエッチングして60μm径、ピッチ200μ
mの微細な貫通孔を20個形成した。
K is applied to the surface of the insulating film 1 of the obtained substrate.
Irradiation of rF excimer laser light is performed, and only the insulating film 1 is dry-etched to have a diameter of 60 μm and a pitch of 200 μm.
m fine through holes were formed.

【0022】次いで、他面側の銅箔2表面にメッキレジ
ストを塗工し、銅箔2を陰極として銅メッキ浴中に浸漬
して銅メッキを施し、先に形成した貫通孔内に銅を充填
して導通路4を作製した。メッキ処理は充填した銅が絶
縁性フィルム1表面から5μm突出したときに中断して
導通路4片面に銅突起3を形成した。形成した銅突起3
の径は72μmであった。
Next, a plating resist is applied to the surface of the copper foil 2 on the other side, immersed in a copper plating bath using the copper foil 2 as a cathode to perform copper plating, and copper is formed in the through-hole formed earlier. The conductive path 4 was formed by filling. The plating process was interrupted when the filled copper protruded 5 μm from the surface of the insulating film 1 to form a copper projection 3 on one surface of the conduction path 4. Copper protrusion 3 formed
Was 72 μm.

【0023】次に、塗工レジストを剥離し、絶縁性フィ
ルム1表面をアルカリ性薬液にて表面処理を行なったの
ち、この表面に無電解メッキにて3μm厚の銅を析出さ
せ、さらに銅を電解メッキすることによって、導電層2
として15μm厚の銅層を形成して図1に示す本発明の
両面基板を得た。
Next, the coating resist is peeled off, the surface of the insulating film 1 is subjected to a surface treatment with an alkaline chemical solution, and then a 3 μm thick copper is deposited on the surface by electroless plating. By plating, the conductive layer 2
Then, a copper layer having a thickness of 15 μm was formed to obtain a double-sided substrate of the present invention shown in FIG.

【0024】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1kg/cmであ
った。両面基板に形成された導通路20個はすべて表裏
面に導通接続しており、導通路1個の接続抵抗値は0.
5mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board was 1 kg / cm. All of the 20 conductive paths formed on the double-sided board are conductively connected to the front and back surfaces, and the connection resistance value of one conductive path is 0.1.
It was 5 mΩ or less.

【0025】実施例2 絶縁性フィルムを3,3’,4,4’−ビフェニルテト
ラカルボン酸二無水物とp−フェニレンジアミン/4,
4’−ジアミノジフェニルエーテル(60/40モル
比)とを重合してなる50μm厚のポリイミド樹脂層か
ら形成し、実施例1と同様に導通路を作製した。導通路
作製後、イオンプレーティング法によって3μm厚のニ
ッケル層からなる導電層を絶縁性フィルム表面に形成し
て本発明の両面基板を得た。
Example 2 An insulating film was prepared using 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride and p-phenylenediamine / 4,4
It was formed from a 50 μm thick polyimide resin layer obtained by polymerizing 4′-diaminodiphenyl ether (60/40 molar ratio), and a conduction path was produced in the same manner as in Example 1. After the formation of the conduction path, a conductive layer made of a nickel layer having a thickness of 3 μm was formed on the surface of the insulating film by an ion plating method, to obtain a double-sided substrate of the present invention.

【0026】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.1kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
1mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 1.1 kg / cm.
Met. All of the 20 conductive paths formed on the double-sided board were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 1 mΩ or less.

【0027】実施例3 絶縁性フィルムを実施例1に用いたポリイミド樹脂層
と、ビス(3,4−ジカルボキシフェニル)スルホン二
無水物とビス〔4−(4−アミノフェノキシ)フェニ
ル〕ヘキサフルオロプロパンとを重合して得た熱可塑性
ポリイミド樹脂層との積層フィルム(30μm厚)とし
た以外は、実施例1と同様にして本発明の両面基板を作
製した。
Example 3 A polyimide resin layer using an insulating film in Example 1, bis (3,4-dicarboxyphenyl) sulfone dianhydride and bis [4- (4-aminophenoxy) phenyl] hexafluoro A double-sided substrate of the present invention was produced in the same manner as in Example 1, except that a laminated film (thickness: 30 μm) with a thermoplastic polyimide resin layer obtained by polymerizing propane was used.

【0028】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.5kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
0.5mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 1.5 kg / cm.
Met. All the 20 conductive paths formed on the double-sided substrate were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 0.5 mΩ or less.

【0029】比較例1 実施例1において貫通孔への銅の充填および銅突起の形
成を行なわない以外は、実施例1と同様にして両面基板
を得た。
Comparative Example 1 A double-sided substrate was obtained in the same manner as in Example 1 except that the filling of the through holes with copper and the formation of copper protrusions were not performed.

【0030】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1kg/cmであ
り、貫通孔20個のうち18個は導通不良であった。な
お、残りの2個はスルーホールメッキされて導通接続し
ていたが、接続抵抗値は5mΩであった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board was 1 kg / cm, and 18 out of 20 through holes had poor conduction. The remaining two were plated through-hole and were connected electrically, but the connection resistance value was 5 mΩ.

【0031】比較例2 実施例2において貫通孔への銅の充填および銅突起の形
成を行なわない以外は、実施例2と同様にして両面基板
を得た。
Comparative Example 2 A double-sided board was obtained in the same manner as in Example 2 except that the filling of the through holes with copper and the formation of copper projections were not performed.

【0032】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.1kg/cm
であり、貫通孔20個のうち13個は導通不良であっ
た。なお、残りの7個はスルーホールメッキされて導通
接続していたが、接続抵抗値は7mΩであった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 1.1 kg / cm.
13 out of the 20 through holes had poor conduction. The remaining seven electrodes were plated through-holes and electrically connected, but the connection resistance was 7 mΩ.

【0033】実施例4(図2参照) ビス(3,4−ジカルボキシフェニル)エーテル二無水
物とビス〔4−(4−アミノフェノキシ)フェニル〕ス
ルホンとを重合して得た熱可塑性ポリアミド酸溶液を銅
箔2上に塗布乾燥、イミド化処理して、20μm厚の絶
縁性フィルム1と35μm厚の導電層2とからなる片面
基板を作製した。なお、この熱可塑性ポリイミド樹脂の
ガラス転移温度は275℃であり、375℃での溶融粘
度は4×106 ポイズであった。
Example 4 (See FIG. 2) Thermoplastic polyamic acid obtained by polymerizing bis (3,4-dicarboxyphenyl) ether dianhydride and bis [4- (4-aminophenoxy) phenyl] sulfone The solution was applied on a copper foil 2, dried and imidized to prepare a single-sided substrate comprising an insulating film 1 having a thickness of 20 μm and a conductive layer 2 having a thickness of 35 μm. The glass transition temperature of this thermoplastic polyimide resin was 275 ° C., and the melt viscosity at 375 ° C. was 4 × 10 6 poise.

【0034】得られた基板の絶縁性フィルム1表面にK
rFエキシマレーザー光を照射して絶縁性フィルムのみ
をドライエッチングして60μm径、ピッチ200μm
の微細な貫通孔を20個形成した。
On the surface of the insulating film 1 of the obtained substrate, K
Irradiation with rF excimer laser light is performed, and only the insulating film is dry-etched to have a diameter of 60 μm and a pitch of 200 μm.
20 fine through-holes were formed.

【0035】次いで、他面側の銅箔2表面にメッキレジ
ストを塗工し、貫通孔底部に露出した銅箔表面を化学研
磨剤溶液にて半球状に研磨して、そののち銅箔部を陰極
として金メッキ浴中に浸漬して金メッキを施し、先に形
成した貫通孔内に金を充填して導通路4を作製した。メ
ッキ処理は充填した金が絶縁性フィルム1表面から5μ
m突出したときに中断して導通路4に金突起3を形成し
た。形成した金突起3の径は70μmであった。
Next, a plating resist is applied to the surface of the copper foil 2 on the other side, and the surface of the copper foil exposed at the bottom of the through hole is polished in a hemispherical shape with a chemical polishing agent solution. The conductive path 4 was prepared by immersing in a gold plating bath as a cathode to perform gold plating, and filling the previously formed through holes with gold. In the plating process, the filled gold is 5μ from the surface of the insulating film 1.
When the protrusions m protruded, the gold protrusions 3 were formed in the conduction path 4. The diameter of the formed gold projection 3 was 70 μm.

【0036】次に、金突起3を形成した側の絶縁性フィ
ルム1表面に18μm厚の銅箔2を加熱圧着して図2に
示す本発明の両面基板を得た。
Next, a copper foil 2 having a thickness of 18 μm was heated and pressed on the surface of the insulating film 1 on which the gold protrusions 3 were formed, to obtain a double-sided substrate of the present invention shown in FIG.

【0037】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.4kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
0.1mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 1.4 kg / cm.
Met. All of the 20 conductive paths formed on the double-sided board were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 0.1 mΩ or less.

【0038】実施例5 絶縁性フィルムを3,3’,4,4’−ビフェニルテト
ラカルボン酸二無水物と3,3’−ジアミノジフェニル
スルホンとを重合してなる熱可塑性ポリイミド樹脂から
形成した以外は、実施例4と同様にして本発明の両面基
板を得た。なお、この熱可塑性ポリイミド樹脂のガラス
転移温度は275℃であり、375℃での溶融粘度は7
×106 ポイズであった。
Example 5 Except that an insulating film was formed from a thermoplastic polyimide resin obtained by polymerizing 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride and 3,3'-diaminodiphenyl sulfone. In the same manner as in Example 4, a double-sided substrate of the present invention was obtained. The glass transition temperature of this thermoplastic polyimide resin is 275 ° C., and the melt viscosity at 375 ° C. is 7
× 10 6 poise.

【0039】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は2.1kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
0.1mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 2.1 kg / cm.
Met. All of the 20 conductive paths formed on the double-sided board were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 0.1 mΩ or less.

【0040】比較例3 実施例4において貫通孔への金の充填は行ない、金突起
の形成を行なわなかった以外は、実施例4と同様にして
両面基板を得た。
Comparative Example 3 A double-sided substrate was obtained in the same manner as in Example 4, except that the through holes were filled with gold and no gold protrusions were formed.

【0041】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.4kg/cm
であったが、導通路20個のうち3個しか導通接続して
いなかった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board is 1.4 kg / cm.
However, only three out of the twenty conductive paths were conductively connected.

【0042】実施例6(図3参照) 低線膨張性ポリイミド樹脂として3,3’,4,4’−
ビフェニルテトラカルボン酸二無水物とp−フェニレン
ジアミンとの重合物(線膨張係数0.6×10-5cm/
cm/℃)を、熱可塑性ポリイミド樹脂としてビス
(3,4−ジカルボキシフェニル)エーテル二無水物と
ビス〔4−(4−アミノフェノキシ)フェニル〕スルホ
ンとの重合物(ガラス転移温度250℃、350℃での
溶融粘度4×106 ポイズ)を用いて、35μm厚の銅
箔2上に熱可塑性ポリイミド樹脂層12(10μm
厚)、低線膨張性ポリイミド樹脂層11(30μm
厚)、熱可塑性ポリイミド樹脂層12(10μm厚)を
順次積層して3層構造の絶縁性フィルム1を有する片面
基板を得た。
Example 6 (see FIG. 3) As a low linear expansion polyimide resin, 3,3 ′, 4,4′-
Polymer of biphenyltetracarboxylic dianhydride and p-phenylenediamine (linear expansion coefficient: 0.6 × 10 −5 cm /
cm / ° C) as a thermoplastic polyimide resin with a polymer of bis (3,4-dicarboxyphenyl) ether dianhydride and bis [4- (4-aminophenoxy) phenyl] sulfone (glass transition temperature 250 ° C, Using a melt viscosity of 4 × 10 6 poise at 350 ° C., a thermoplastic polyimide resin layer 12 (10 μm
Thickness), low linear expansion polyimide resin layer 11 (30 μm
Thickness) and a thermoplastic polyimide resin layer 12 (10 μm thickness) were sequentially laminated to obtain a single-sided substrate having an insulating film 1 having a three-layer structure.

【0043】得られた基板の絶縁性フィルム1表面にK
rFエキシマレーザー光を照射して絶縁性フィルム1の
みをドライエッチングして60μm径、ピッチ200μ
mの微細な貫通孔を20個形成した。
On the surface of the insulating film 1 of the obtained substrate, K
Irradiation of rF excimer laser light is performed, and only the insulating film 1 is dry-etched to have a diameter of 60 μm and a pitch of 200 μm.
m fine through holes were formed.

【0044】次いで、他面側の銅箔2表面にメッキレジ
ストを塗工し、貫通孔底部に露出した銅箔2表面を化学
研磨剤溶液にて半球状に研磨して、そののち銅箔2を陰
極として金メッキ浴中に浸漬して金メッキを施し、先に
形成した貫通孔内に金を充填して導通路4を作製した。
メッキ処理は充填した金が絶縁性フィルム表面から5μ
m突出したときに中断して導通路4に金突起3を形成し
た。形成した金突起3の径は68μmであった。
Next, a plating resist is applied to the surface of the copper foil 2 on the other side, and the surface of the copper foil 2 exposed at the bottom of the through hole is polished in a hemispherical shape with a chemical polishing agent solution. Was used as a cathode, immersed in a gold plating bath to perform gold plating, and gold was filled in the through-hole formed earlier to form a conductive path 4.
In the plating process, the filled gold is 5μ from the surface of the insulating film.
When the protrusions m protruded, the gold protrusions 3 were formed in the conduction path 4. The diameter of the formed gold projection 3 was 68 μm.

【0045】次に、金突起3を形成した側の絶縁性フィ
ルム1表面に18μm厚の銅箔2を加熱圧着して図3に
示す本発明の両面基板を得た。
Next, a copper foil 2 having a thickness of 18 μm was heated and pressed on the surface of the insulating film 1 on which the gold protrusions 3 were formed, to obtain a double-sided substrate of the present invention shown in FIG.

【0046】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は1.4kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
0.1mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board was 1.4 kg / cm.
Met. All of the 20 conductive paths formed on the double-sided board were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 0.1 mΩ or less.

【0047】実施例7 低線膨張性ポリイミド樹脂として3,3’,4,4’−
ビフェニルテトラカルボン酸二無水物とp−フェニレン
ジアミン/4,4’−ジアミノジフェニルエーテル(6
0/40モル比)との重合物(線膨張係数1.7×10
-5cm/cm/℃)を、熱可塑性ポリイミド樹脂として
ビス(3,4−ジカルボキシフェニル)エーテル二無水
物とビス〔4−(4−アミノフェノキシ)フェニル〕ス
ルホンとの重合物(ガラス転移温度250℃、350℃
での溶融粘度5×106 ポイズ)を用いて、35μm厚
の銅箔上に熱可塑性ポリイミド樹脂層(20μm厚)、
低線膨張性ポリイミド樹脂層(50μm厚)、熱可塑性
ポリイミド樹脂層(20μm厚)を順次積層して3層構
造の絶縁性フィルムを有する片面基板を用いた以外は、
実施例6と同様にして本発明の両面基板を得た。
Example 7 As a low linear expansion polyimide resin, 3,3 ′, 4,4′-
Biphenyltetracarboxylic dianhydride and p-phenylenediamine / 4,4'-diaminodiphenyl ether (6
(0/40 molar ratio) (linear expansion coefficient 1.7 × 10
−5 cm / cm / ° C.) as a thermoplastic polyimide resin, a polymer (glass transition) of bis (3,4-dicarboxyphenyl) ether dianhydride and bis [4- (4-aminophenoxy) phenyl] sulfone Temperature 250 ° C, 350 ° C
Using a melt viscosity of 5 × 10 6 poise), a thermoplastic polyimide resin layer (20 μm thick) on a 35 μm thick copper foil,
A low linear expansion polyimide resin layer (50 μm thickness) and a thermoplastic polyimide resin layer (20 μm thickness) were sequentially laminated, and a single-sided substrate having a three-layer insulating film was used.
A double-sided substrate of the present invention was obtained in the same manner as in Example 6.

【0048】得られた両面基板における銅箔と絶縁性フ
ィルムとの界面での引き剥がし強度は2.1kg/cm
であった。両面基板に形成された導通路20個はすべて
表裏面に導通接続しており、導通路1個の接続抵抗値は
0.1mΩ以下であった。
The peel strength at the interface between the copper foil and the insulating film in the obtained double-sided board was 2.1 kg / cm.
Met. All of the 20 conductive paths formed on the double-sided board were conductively connected to the front and back surfaces, and the connection resistance value of one conductive path was 0.1 mΩ or less.

【0049】[0049]

【発明の効果】以上のように、本発明の両面基板は絶縁
性フィルム内の導通路が金属物質の充填によって形成さ
れているので電気抵抗値が小さく、しかも導通路端部に
は金属突起を形成し、この金属突起が両面の導電層内に
埋設接続しているので、導電層と絶縁性フィルムとの界
面での密着性(接着性)に優れ、確実な導通もとれると
いう効果を発揮するものである。
As described above, the double-sided substrate of the present invention has a small electric resistance because the conductive path in the insulating film is formed by filling the metal material, and the metal protrusion is formed at the end of the conductive path. Since the metal protrusions are formed and embedded in the conductive layers on both surfaces, they are excellent in adhesion (adhesion) at the interface between the conductive layer and the insulating film, and have the effect of ensuring reliable conduction. Things.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の両面基板の部分拡大断面図である。FIG. 1 is a partially enlarged sectional view of a double-sided substrate of the present invention.

【図2】 本発明の両面基板の部分拡大断面図である。FIG. 2 is a partially enlarged sectional view of the double-sided board of the present invention.

【図3】 本発明の両面基板の部分拡大断面図である。FIG. 3 is a partially enlarged cross-sectional view of the double-sided board of the present invention.

【符号の説明】[Explanation of symbols]

1 絶縁性フィルム 11 低線膨張性ポリイミド層 12 熱可塑性ポリイミド樹脂 2 導電層 3 金属突起 4 導通路 DESCRIPTION OF SYMBOLS 1 Insulating film 11 Low linear expansion polyimide layer 12 Thermoplastic polyimide resin 2 Conductive layer 3 Metal protrusion 4 Conduction path

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平3−261193(JP,A) 特開 昭54−152163(JP,A) 特開 平3−104185(JP,A) 実開 昭48−52059(JP,U) (58)調査した分野(Int.Cl.6,DB名) H05K 1/11 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-261193 (JP, A) JP-A-54-152163 (JP, A) JP-A-3-104185 (JP, A) 52059 (JP, U) (58) Field surveyed (Int. Cl. 6 , DB name) H05K 1/11

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 絶縁性フィルムとその両面に形成された
導電層からなる両面基板であって、絶縁性フィルムには
厚み方向に独立する貫通孔内に金属物質を充填してなる
導通路が電解メッキにより形成されていると共に、該導
通路の少なくとも片端部には上記導電層内に埋設して接
し、貫通孔径よりも大きな突起径を有する金属突起が
形成されていることを特徴とする両面基板。
1. A double-sided board made of an insulating film and a conductive layer formed on both surfaces thereof, conductive paths formed by filling a metal material in the through hole for independently in the thickness direction electrolyte in the insulating film A metal projection having a diameter larger than the diameter of the through hole is formed by plating , and at least one end of the conductive path is buried in the conductive layer and is in contact with the conductive layer. substrate.
【請求項2】 絶縁性フィルムが熱可塑性ポリイミド樹
脂から形成される請求項1記載の両面基板。
2. The double-sided substrate according to claim 1, wherein the insulating film is formed from a thermoplastic polyimide resin.
【請求項3】 絶縁性フィルムが3層以上の構造を有
し、導電層に接する層が熱可塑性ポリイミド樹脂層であ
る請求項1記載の両面基板。
3. The double-sided substrate according to claim 1, wherein the insulating film has a structure of three or more layers, and a layer in contact with the conductive layer is a thermoplastic polyimide resin layer.
【請求項4】 金属突起を埋設する側の導電層が、無電
解メッキ層または無電解メッキ法と電解メッキ法の併用
によって形成されている請求項1記載の両面基板。
4. The double-sided substrate according to claim 1, wherein the conductive layer on the side where the metal projections are embedded is formed by an electroless plating layer or a combination of an electroless plating method and an electrolytic plating method.
JP10928592A 1991-09-19 1992-04-01 Double-sided board Expired - Fee Related JP2905331B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10928592A JP2905331B2 (en) 1992-04-01 1992-04-01 Double-sided board
US07/945,929 US5374469A (en) 1991-09-19 1992-09-17 Flexible printed substrate
EP19920116025 EP0533198A3 (en) 1991-09-19 1992-09-18 Flexible printed substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10928592A JP2905331B2 (en) 1992-04-01 1992-04-01 Double-sided board

Publications (2)

Publication Number Publication Date
JPH05283835A JPH05283835A (en) 1993-10-29
JP2905331B2 true JP2905331B2 (en) 1999-06-14

Family

ID=14506301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10928592A Expired - Fee Related JP2905331B2 (en) 1991-09-19 1992-04-01 Double-sided board

Country Status (1)

Country Link
JP (1) JP2905331B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014045721A1 (en) * 2012-09-20 2014-03-27 株式会社村田製作所 Wiring board and wiring board manufacturing method

Also Published As

Publication number Publication date
JPH05283835A (en) 1993-10-29

Similar Documents

Publication Publication Date Title
US6904674B2 (en) Process for manufacturing a printed wiring board
US5374469A (en) Flexible printed substrate
JP4444435B2 (en) Printed wiring board and method for manufacturing printed wiring board
US6662442B1 (en) Process for manufacturing printed wiring board using metal plating techniques
US6591491B2 (en) Method for producing multilayer circuit board
JP4029517B2 (en) WIRING BOARD, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE
JP3853219B2 (en) Semiconductor element built-in substrate and multilayer circuit board
JP3565069B2 (en) Method for manufacturing double-sided flexible printed circuit board
JP2001301089A (en) Laminate, insulating film, electronic circuit, and method of manufacturing laminate
JP2004152904A (en) Electrolytic copper foil, film with electrolytic copper foil, multilayer wiring board, and method of manufacturing the same
JP4448610B2 (en) Circuit board manufacturing method
JP3059556B2 (en) Multilayer substrate and method of manufacturing the same
JPH10303561A (en) Multi-layer wiring board and its manufacture
JP3356298B2 (en) Printed wiring board and method of manufacturing the same
JPH06283866A (en) Multilayer circuit board and manufacture thereof
JP3339422B2 (en) Wiring board and manufacturing method thereof
JP2905331B2 (en) Double-sided board
WO2001056339A1 (en) Flexible printed wiring board and its production method
JP3142951B2 (en) Manufacturing method of double-sided board
JP2919672B2 (en) Double-sided circuit board and method of manufacturing the same
JPH05267810A (en) Double-sided substrate and manufacturing method thereof
JP3248786B2 (en) Circuit board structure and circuit board manufacturing method
JP2003198122A (en) Manufacturing method of wiring board
JPH0730212A (en) Conductor-insulating resin composite, single-layer circuit board made of the composite, and multilayer wiring board using the single-layer circuit board
JP2005088465A (en) Manufacturing method for conductor-coated polyimide film and conductor-coated polyimide film

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 9

Free format text: PAYMENT UNTIL: 20080326

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110326

Year of fee payment: 12

LAPS Cancellation because of no payment of annual fees