JP2908373B2 - Groove ball grid array - Google Patents
Groove ball grid arrayInfo
- Publication number
- JP2908373B2 JP2908373B2 JP9077705A JP7770597A JP2908373B2 JP 2908373 B2 JP2908373 B2 JP 2908373B2 JP 9077705 A JP9077705 A JP 9077705A JP 7770597 A JP7770597 A JP 7770597A JP 2908373 B2 JP2908373 B2 JP 2908373B2
- Authority
- JP
- Japan
- Prior art keywords
- grid array
- ball grid
- bga
- insulating resin
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は溝付きボールグリッ
ドアレイに関し、特にはんだ付け部の補強を必要とする
溝付きボールグリッドアレイに関する。The present invention relates to a grooved ball grid array, and more particularly to a grooved ball grid array that requires reinforcement of a soldered portion.
【０００２】[0002]
【従来の技術】従来、ボールグリッドアレイ（Ｂａｌｌ
Ｇｒｉｄ Ａｒｒａｙ：ＢＧＡ）パッケージをプリン
ト配線板に実装する際には、ＢＧＡとプリント配線板と
をはんだ付けするはんだ付け部に絶縁性樹脂を充填して
補強することによって、ＢＧＡとプリント配線板との熱
膨張率の差や落下，振動のストレスによるはんだ付け部
の破断を防止している。2. Description of the Related Art Conventionally, a ball grid array (Ball)
When mounting a (Grid Array: BGA) package on a printed wiring board, a soldering portion for soldering the BGA and the printed wiring board is filled with an insulating resin and reinforced, so that the connection between the BGA and the printed wiring board is improved. This prevents breakage of the soldered part due to differences in the coefficient of thermal expansion and the stress of falling and vibration.
【０００３】図４（ａ）および（ｂ）は従来のボールグ
リッドアレイの構造の一例を示す側面図および下面図で
ある。FIGS. 4A and 4B are a side view and a bottom view showing an example of the structure of a conventional ball grid array.
【０００４】図４を参照すると、この従来例のボールグ
リッドアレイ（ＢＧＡ）９は、基板９１上のパターン９
２にＬＳＩ９３を実装して樹脂封止するとともに、基板
９１の下面に複数のバンプ２を配列した構造を有してい
る。Referring to FIG. 4, a ball grid array (BGA) 9 of this conventional example is formed by a pattern 9 on a substrate 91.
2 has a structure in which an LSI 93 is mounted and resin-sealed, and a plurality of bumps 2 are arranged on the lower surface of the substrate 91.
【０００５】次に、図３は一般的なＢＧＡをプリント配
線板に実装する工程を示す工程図である。Next, FIG. 3 is a process diagram showing a process of mounting a general BGA on a printed wiring board.
【０００６】図３（ａ）に示すように、クリームはんだ
６を印刷したプリント配線板４に従来のＢＧＡ９を搭載
し、その後、図３（ｂ）に示すように、リフローはんだ
付けすることにより、ＢＧＡ９の裏面のバンプ２とプリ
ント配線板４のランド５とがはんだを通して導通する。As shown in FIG. 3A, a conventional BGA 9 is mounted on a printed wiring board 4 on which a cream solder 6 is printed, and then, as shown in FIG. 3B, reflow soldering is performed. The bumps 2 on the back surface of the BGA 9 and the lands 5 of the printed wiring board 4 conduct through the solder.
【０００７】この工程において、ＢＧＡ９およびプリン
ト配線板４には、その熱膨張率の差により経時的にスト
レスが加わったり、または落下や振動によりストレスが
加わったりして、はんだ付け部が破断する恐れがある。In this process, the BGA 9 and the printed wiring board 4 may be stressed over time due to the difference in the coefficient of thermal expansion, or may be stressed due to dropping or vibration, and the soldered portion may be broken. There is.
【０００８】そこで、図３（ｃ）に示すように、はんだ
付け部にディスペンサ７により絶縁性樹脂８を充填して
補強する。Therefore, as shown in FIG. 3 (c), the soldering portion is filled with an insulating resin 8 by a dispenser 7 and reinforced.
【０００９】なお、この図３（ａ）および（ｂ）の工程
をとっている一従来例として、特開平８−２８８６４０
号公報に所載の「ボールグリッドアレイプリント配線板
の半田付け方法」を挙げることができる。As a conventional example employing the steps shown in FIGS. 3A and 3B, Japanese Patent Application Laid-Open No. 8-288640 is disclosed.
In the above-mentioned publication, there is a "Method of soldering a ball grid array printed wiring board".
【００１０】次に、図５は従来のＢＧＡとプリント配線
板とのはんだ付け部に絶縁性樹脂を充填する際の絶縁性
樹脂の流れ方を説明するためのＢＧＡ上面からの透視図
である。Next, FIG. 5 is a perspective view from the upper surface of the BGA for explaining the flow of the insulating resin when the insulating resin is filled in the soldering portion between the conventional BGA and the printed wiring board.
【００１１】図５を参照すると、絶縁性樹脂８は矢印Ｃ
で示す方向に流れながら拡散していくが、バンプ２の周
囲、特に絶縁性樹脂８の流れに対してバンプ２の陰にな
る部分にボイド（気泡）１０が発生することが多かっ
た。Referring to FIG. 5, the insulating resin 8 has an arrow C
The voids (bubbles) 10 are often generated around the bumps 2, especially in the portions where the bumps 2 are shaded with respect to the flow of the insulating resin 8.
【００１２】[0012]
【発明が解決しようとする課題】この従来のＢＧＡで
は、ＢＧＡとプリント配線板との間のはんだ付け部に絶
縁性樹脂を充填する際に、絶縁性樹脂が入り込みにくい
ため、ＢＧＡの裏面全体に行き渡るまでの時間が長くな
るという問題点があった。In this conventional BGA, when the insulating resin is filled in the soldering portion between the BGA and the printed wiring board, the insulating resin is hardly penetrated. There was a problem that the time required to go around was long.
【００１３】また、バンプの周囲の絶縁性樹脂にボイド
（気泡）が発生しやすいので、信頼性が低下するという
問題点があった。In addition, since voids (bubbles) are likely to be generated in the insulating resin around the bumps, there is a problem that reliability is reduced.
【００１４】本発明の目的は、プリント配線板に実装す
るＢＧＡ等の裏面に溝を設けることにより、補強のため
のはんだ付け部への絶縁性樹脂の拡散を容易にした溝付
きボールグリッドアレイを提供することにある。An object of the present invention is to provide a grooved ball grid array in which a groove is provided on the back surface of a BGA or the like mounted on a printed wiring board to facilitate diffusion of an insulating resin to a soldering portion for reinforcement. To provide.
【００１５】[0015]
【課題を解決するための手段】本発明によれば、基板上
のパターンにＬＳＩを実装して樹脂封止するとともに前
記基板の下面に複数のバンプを配置した構造のボールグ
リッドアレイにおいて、前記基板下面に前記バンプを避
けて配設された互いに斜交して交差した複数の溝を有す
ることを特徴とする溝付きボールグリッドアレイが得ら
れる。According to the present invention, there is provided a ball grid array having a structure in which an LSI is mounted on a pattern on a substrate and sealed with a resin, and a plurality of bumps are arranged on a lower surface of the substrate. A grooved ball grid array characterized by having a plurality of grooves obliquely crossing each other disposed on the lower surface so as to avoid the bumps is obtained.
【００１６】[0016]
【００１７】[0017]
【００１８】[0018]
【００１９】[0019]
【００２０】[0020]
【発明の実施の形態】まず、本発明の作用について説明
すると、本発明ではＢＧＡ等（ＢＧＡまたは狭ピッチＢ
ＧＡ）をプリント配線板に搭載する際に、はんだ付け部
の補強用の絶縁性樹脂が塗布面に均等に拡散するよう
に、基板の下面に互いに交差する溝を設けているので、
この溝に入り込んだ絶縁性樹脂が毛細管現象によって溝
に沿ってすばやく拡散して行く。DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the operation of the present invention will be described. In the present invention, BGA or the like (BGA or narrow pitch B
When mounting GA) on the printed wiring board, grooves are provided on the lower surface of the board so that the insulating resin for reinforcement of the soldered portion is evenly diffused on the application surface.
The insulating resin that has entered the groove is rapidly diffused along the groove by a capillary phenomenon.
【００２１】次に、本発明の一実施形態について図面を
参照して説明する。Next, an embodiment of the present invention will be described with reference to the drawings.
【００２２】図１（ａ）および（ｂ）は本発明の一実施
形態の溝付きボールグリッドアレイの構造を示す側面図
および下面図である。FIGS. 1A and 1B are a side view and a bottom view showing the structure of a grooved ball grid array according to an embodiment of the present invention.
【００２３】図１に示す本実施形態のボールグリッドア
レイまたは狭ピッチボールグリッドアレイ（ＢＧＡ／Ｆ
ＰＢＧＡ）３は、基板３１上のパターン３２にＬＳＩ３
３を実装して樹脂封止するとともに、基板３１の下面に
は複数のバンプ２を配列した構造を有している。The ball grid array or the narrow pitch ball grid array (BGA / F) of this embodiment shown in FIG.
PBGA) 3 is an LSI 3 on a pattern 32 on a substrate 31.
3 has a structure in which a plurality of bumps 2 are arranged on the lower surface of the substrate 31 while being resin-sealed.
【００２４】そして、基板３１の裏面（バンプ２を配置
している面）に４本の溝１が格子状に配設されている。
各溝１はバンプ２の配列の間を通り、ＢＧＡ／ＦＰＢＧ
Ａ３の機能を損なわない程度の幅および深さとなってい
る。On the back surface of the substrate 31 (the surface on which the bumps 2 are arranged), four grooves 1 are arranged in a lattice.
Each groove 1 passes between the arrangements of the bumps 2 and has a BGA / FPBG
The width and depth are such that the function of A3 is not impaired.
【００２５】なお、この溝１の本数および交差の仕方
は、この実施形態に限定されず、上記の条件を満たすよ
うに任意に設定してよい。例えば、複数本の溝を斜交さ
せてもよい。The number of the grooves 1 and the way of intersection are not limited to this embodiment, but may be set arbitrarily so as to satisfy the above conditions. For example, a plurality of grooves may be obliquely formed.
【００２６】図２は図１に示す本実施形態においてＢＧ
Ａ／ＦＰＢＧＡとプリント配線板とのはんだ付け部に絶
縁性樹脂を充填する際の絶縁性樹脂の流れ方を説明する
ためのＢＧＡ／ＦＰＢＧＡ上面からの透視図である。FIG. 2 shows a BG in the embodiment shown in FIG.
FIG. 4 is a perspective view from above of a BGA / FPBGA for explaining a flow of the insulating resin when the insulating resin is filled in a soldering portion between the A / FPBGA and the printed wiring board.
【００２７】本実施形態においても、図３（ａ），
（ｂ）および（ｃ）に示した工程をとってはんだ付けが
行われる。したがって、図３において従来のＢＧＡ９を
本実施形態のＢＧＡ／ＦＰＢＧＡ３に置き換えればよ
い。Also in this embodiment, FIG.
Soldering is performed by the steps shown in FIGS. Therefore, the conventional BGA 9 in FIG. 3 may be replaced with the BGA / FPBGA 3 of the present embodiment.
【００２８】すなわち、クリームはんだ６を印刷したプ
リント配線板４にＢＧＡ／ＦＰＢＧＡ３を搭載してリフ
ローはんだ付けする。これにより、ＢＧＡ／ＦＰＢＧＡ
３の各バンプ２とプリント配線板４の各ランド５とが導
通する。That is, the BGA / FPBGA 3 is mounted on the printed wiring board 4 on which the cream solder 6 is printed, and reflow soldering is performed. Thereby, BGA / FPBGA
3 and the lands 5 of the printed wiring board 4 are electrically connected.
【００２９】次いで、はんだ付け部を補強するために、
ディスペンサ７により絶縁性樹脂８をはんだ付け部（Ｂ
ＧＡ／ＦＰＢＧＡ３とプリント配線板４との間）に注入
する。このとき、あらゆる方向から絶縁性樹脂８を注入
すると空気の逃げ道がなくなって、ボイド（気泡）とし
て残ることがあるので、絶縁性樹脂８をＢＧＡ／ＦＰＢ
ＧＡ３のある１辺から注入する。Next, in order to reinforce the soldering part,
The insulating resin 8 is soldered by the dispenser 7 (B
(Between the GA / FPBGA 3 and the printed wiring board 4). At this time, if the insulating resin 8 is injected from all directions, there is no escape route for the air, and the insulating resin 8 may remain as voids (bubbles).
Inject from one side of GA3.
【００３０】注入された絶縁性樹脂８のうち溝１に入り
込んだ絶縁性樹脂８は毛細管現象により溝１以外の部分
に入り込んだ絶縁性樹脂８よりも先に矢印Ａで示すよう
に溝１に沿って流れていき、溝１以外の部分に入り込ん
だ絶縁性樹脂８は矢印Ｂで示すように流れてバンプ２の
周囲に広がっていく。Of the injected insulating resin 8, the insulating resin 8 which has entered the groove 1 is inserted into the groove 1 as indicated by an arrow A before the insulating resin 8 which has entered the other parts than the groove 1 due to capillary action. The insulating resin 8 flowing along the portion other than the groove 1 flows as shown by the arrow B and spreads around the bump 2.
【００３１】このように、本実施形態では、溝１に入り
込んだ絶縁性樹脂８が先に広がり、溝１以外の部分に入
り込んだ絶縁性樹脂８が後から広がっていくので、一方
向からだけでなく、いくつかの方向から空気を外へ押し
出しながら広がっていく。したがってボイド（気泡）の
発生を防ぐことができる。As described above, in the present embodiment, the insulating resin 8 that has entered the groove 1 spreads first, and the insulating resin 8 that has entered portions other than the groove 1 spreads later. Instead, it spreads out pushing air out of several directions. Therefore, generation of voids (bubbles) can be prevented.
【００３２】また、溝１に入り込んだ絶縁性樹脂８は先
に溝１に沿って均等に広がっていき、溝１以外の部分に
入り込んだ絶縁性樹脂８を導いていくので、絶縁性樹脂
８はすばやく均一に充填される。The insulating resin 8 that has entered the groove 1 spreads out evenly first along the groove 1 and guides the insulating resin 8 that has entered portions other than the groove 1. Are quickly and uniformly filled.
【００３３】なお、本実施形態はＢＧＡ／ＦＰＢＧＡを
プリント配線板に搭載する例を示しているが、本発明は
ＦＰＢＧＡに類するファインピッチなボールグリッドア
レイ，マイクロボールグリッドアレイ，チップサイズパ
ッケージ（ＣＳＰ）またはフリップチップ実装における
ベアチップにも適用可能である。Although this embodiment shows an example in which a BGA / FPBGA is mounted on a printed wiring board, the present invention provides a fine pitch ball grid array, a micro ball grid array, and a chip size package (CSP) similar to an FPBGA. Alternatively, the present invention can be applied to a bare chip in flip chip mounting.
【００３４】[0034]
【発明の効果】以上説明したように本発明の溝付きボー
ルグリッドアレイまたは溝付き狭ボールグリッドアレイ
は、基板上のパターンにＬＳＩを実装して樹脂封止する
とともに基板の下面に複数のバンプを配置した構造のボ
ールグリッドアレイにおいて、基板下面にバンプを避け
て配設された複数の溝を有することにより、また、上記
複数の溝はバンプを避けて互いに交差することにより、
さらに、上記複数の溝の交差は格子状に直交したもので
あることにより、さらにまた、上記複数の溝の交差は互
いに斜交したものであることにより、絶縁性樹脂をはん
だ付け部に均一にすばやく充填することができるので、
その信頼性および生産性を著しく向上させることができ
るという効果を有する。As described above, the ball grid array with grooves or the narrow ball grid array with grooves of the present invention has an LSI mounted on a pattern on a substrate and is resin-sealed, and a plurality of bumps are formed on the lower surface of the substrate. In the ball grid array of the arranged structure, by having a plurality of grooves arranged on the lower surface of the substrate so as to avoid the bumps, and by crossing each other avoiding the bumps,
Furthermore, since the intersections of the plurality of grooves are orthogonal to each other in a grid pattern, and the intersections of the plurality of grooves are oblique to each other, the insulating resin can be uniformly applied to the soldered portion. It can be filled quickly,
This has the effect that its reliability and productivity can be significantly improved.
【図１】（ａ）および（ｂ）は本発明の一実施形態の溝
付きボールグリッドアレイの構造を示す側面図および下
面図である。1A and 1B are a side view and a bottom view showing a structure of a grooved ball grid array according to an embodiment of the present invention.
【図２】図１に示す本実施形態においてＢＧＡ／ＦＰＢ
ＧＡとプリント配線板とのはんだ付け部に絶縁性樹脂を
充填する際の絶縁性樹脂の流れ方を説明するためのＢＧ
Ａ／ＦＰＢＧＡ上面からの透視図である。FIG. 2 shows a BGA / FPB in the embodiment shown in FIG.
BG for explaining the flow of the insulating resin when the insulating resin is filled in the soldering portion between the GA and the printed wiring board
FIG. 3 is a perspective view from the top of the A / FPBGA.
【図３】一般的なＢＧＡをプリント配線板に実装する工
程を示す工程図である。FIG. 3 is a process diagram showing a process of mounting a general BGA on a printed wiring board.
【図４】（ａ）および（ｂ）は従来のボールグリッドア
レイの構造の一例を示す側面図および下面図である。FIGS. 4A and 4B are a side view and a bottom view showing an example of the structure of a conventional ball grid array.
【図５】従来のＢＧＡとプリント配線板とのはんだ付け
部に絶縁性樹脂を充填する際の絶縁性樹脂の流れ方を説
明するためのＢＧＡ上面からの透視図である。FIG. 5 is a perspective view from the upper surface of a BGA for explaining a flow of the insulating resin when the insulating resin is filled in a soldering portion between a conventional BGA and a printed wiring board.
１ 溝 ２ バンプ ３ ボールグリッドアレイまたは狭ピッチボールグリ
ッドアレイ（ＢＧＡ／ＦＰＢＧＡ） ４ プリント配線板 ５ ランド ６ クリームはんだ ７ ディスペンサ ８ 絶縁性樹脂 ９ ボールグリッドアレイ（ＢＧＡ） １０ ボイド（気泡） ３１，９１ 基板 ３２，９２ パターン ３３，９３ ＬＳＩReference Signs List 1 groove 2 bump 3 ball grid array or narrow pitch ball grid array (BGA / FPBGA) 4 printed wiring board 5 land 6 cream solder 7 dispenser 8 insulating resin 9 ball grid array (BGA) 10 void (bubble) 31,91 substrate 32,92 patterns 33,93 LSI
Claims (1)
脂封止するとともに前記基板の下面に複数のバンプを配
置した構造のボールグリッドアレイにおいて、前記基板
の下面に前記バンプを避けて配設された互いに斜交して
交差した複数の溝を有することを特徴とする溝付きボー
ルグリッドアレイ。1. A ball grid array having a structure in which an LSI is mounted on a pattern on a substrate and resin-sealed and a plurality of bumps are arranged on a lower surface of the substrate, and the bumps are arranged on the lower surface of the substrate so as to avoid the bumps. Were oblique to each other
A grooved ball grid array having a plurality of intersecting grooves.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9077705A JP2908373B2 (en) | 1997-03-28 | 1997-03-28 | Groove ball grid array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9077705A JP2908373B2 (en) | 1997-03-28 | 1997-03-28 | Groove ball grid array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10270839A JPH10270839A (en) | 1998-10-09 |
| JP2908373B2 true JP2908373B2 (en) | 1999-06-21 |
Family
ID=13641324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9077705A Expired - Fee Related JP2908373B2 (en) | 1997-03-28 | 1997-03-28 | Groove ball grid array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2908373B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3179420B2 (en) | 1998-11-10 | 2001-06-25 | 日本電気株式会社 | Semiconductor device |
| JP4973016B2 (en) * | 2006-06-07 | 2012-07-11 | 富士通株式会社 | Semiconductor device and manufacturing method thereof |
-
1997
- 1997-03-28 JP JP9077705A patent/JP2908373B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10270839A (en) | 1998-10-09 |
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