JP4973016B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a flip chip structure and a manufacturing method thereof.

  In recent years, in order to cope with the increase in speed of LSI (Large Scale Integration), semiconductor chip and substrate electrode pitches have been miniaturized and the number of terminals has been increased, and a mounting method using a flip chip structure has become mainstream.

FIG. 13 is a schematic cross-sectional view of an essential part of a side surface of a general flip chip structure.
As shown in FIG. 13, the flip chip structure is formed by connecting an electrode of a semiconductor chip 503 and an electrode of a substrate 504 with a bump electrode 501, and then applying a sealing resin 506 called an underfill to the outer periphery of the semiconductor chip 503. In this method, the bump connection portion is filled and a highly reliable connection between the semiconductor chip 503 and the substrate 504 is realized.

FIG. 14 is a schematic cross-sectional view of the main part of the side surface of the flip chip structure, and FIG. 15 is a schematic view of filling of the sealing resin in the flip chip structure.
As the electrode is miniaturized, the gap between the semiconductor chip 503 and the substrate 504 is narrowed as shown in FIG. 14, so that the filling degree of the sealing resin 506 is reduced and the void 507 is reduced. Will occur. Further, as shown in FIG. 15, when the electrode of the semiconductor chip 503 and the electrode of the substrate 504 are connected by the bump electrode 501 and then the sealing resin 506 is filled from the outer periphery of the semiconductor chip 503, the sealing resin 506 gradually The whole is filled (FIGS. 15A to 15C). At this time, a portion not filled with the sealing resin due to air entrainment or the like becomes a void 507 (FIG. 15D).

  As described above, when voids are generated in the sealing resin and the filling rate of the sealing resin is reduced, not only the adhesive force between the sealing resin and the semiconductor chip and the substrate is reduced, but also the semiconductor chip and the substrate are bonded. There is a possibility that the bump electrodes are remelted by heating when the semiconductor device assembled and assembled is further soldered to the printed wiring board, and the bump electrodes are connected through the voids to cause a short circuit.

  In the future, as LSIs become more highly integrated, the size of semiconductor chips will increase to 25 mm square or more, making it even more difficult to uniformly fill the sealing resin and eliminate the generation of voids in the sealing resin. It is feared to become.

Therefore, in order to improve the filling rate of the sealing resin, a method of providing a through hole in the substrate and injecting the sealing resin from the back surface of the substrate through the through hole after mounting the chip has been proposed (for example, Patent Documents). 1).
JP 2001-53411 A

  However, if a through hole is provided in the substrate in order to inject the sealing resin, it is necessary to secure a region for the through hole in the substrate, and the wiring density of the substrate cannot be increased. there were.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device in which semiconductor chips having high-density electrodes are stably coupled.
Another object of the present invention is to provide a method for manufacturing a semiconductor device in which the connection reliability of a semiconductor chip is improved.

In the present invention, in order to solve the above-mentioned problem, as shown in FIG. 1, in a semiconductor device having a flip chip structure, a filling path 2 having substantially the same linear distance from the center of gravity to the outer periphery, and the filling path 2 in different regions, are formed adjacent to said fill channel 2, possess the bump electrode region 1a in which a plurality of bump electrodes 1 are formed which are arranged in a grid pattern, the width of the filling path 2, the bump electrodes 1 An integer number of semiconductor chips 3, a circuit board bonded to the semiconductor chip 3 via the plurality of bump electrodes 1, and a sealing resin filled between the semiconductor chip 1 and the circuit board. A semiconductor device is provided.

According to the above configuration, the filling path 2 in which the linear distance from the center of gravity to the outer peripheral portion is substantially the same, and a plurality of areas formed adjacent to the filling path 2 in a region different from the filling path 2 and arranged in a grid pattern possess the bump electrode area 1a in which the bump electrodes 1 are formed in the width of the filling path 2, a semiconductor chip 3 is a integer number of the bump electrodes 1, through the semiconductor chip 3 and the plurality of bump electrodes 1 The circuit board bonded together and the filled sealing resin between the semiconductor chip 3 and the circuit board are configured to control the inflow of the sealing resin.

According to the present invention, in the method of manufacturing a semiconductor device having a flip-chip structure, a filling path having a substantially equal linear distance from the center of gravity to the outer periphery, and a region different from the filling path are adjacent to the filling path. is formed, possess a plurality of connecting electrode region where the connection electrode is formed which is arranged in a grid pattern, the width of the filling path, a step of preparing a semiconductor device which is integral number of connecting electrodes, the semiconductor element And a step of injecting a sealing resin substantially simultaneously from the respective openings of the filling path between the bonded semiconductor element and the circuit board. A method for manufacturing a semiconductor device is provided.

According to the above method, a plurality of connections arranged in a lattice form, adjacent to the filling path, in a region different from the filling path, in which the linear distance from the center of gravity to the outer peripheral portion is substantially the same. possess a connection electrode region on which electrodes are formed, the width of the filling path, connecting the semiconductor element is an integral number of electrodes is prepared, it is joined via a plurality of connecting electrodes and a semiconductor element and the circuit board The sealing resin is controlled in a desired direction by injecting the sealing resin between the bonded semiconductor elements and the circuit board almost simultaneously from the respective openings of the filling path.

In the present invention, a plurality of bump electrodes formed adjacent to the filling path in a region different from the filling path, and a plurality of bump electrodes arranged in a lattice shape, in which the linear distance from the center of gravity to the outer peripheral portion is substantially the same. possess a bump electrode regions, the width of the filling path, and the semiconductor chip is a integer number of bump electrodes, and the circuit board are bonded to each other with the semiconductor chip and the plurality of bump electrodes, and the semiconductor chip and the circuit board And a filled sealing resin. Thereby, it becomes possible to control the flow of the injected sealing resin by injecting the sealing resin from each of the filling ports of the outer peripheral portion of the semiconductor chip between the bonded semiconductor chip and the substrate, Generation of voids in the bump electrode region can be suppressed.

Further, in the present invention, a plurality of connection electrodes arranged in a grid pattern can be formed adjacent to the filling path in a region different from the filling path, and a filling path having substantially the same linear distance from the center of gravity to the outer periphery. possess a connection electrode regions, the width of the filling path, can prepare semiconductor element is a integer number of connecting electrodes and a semiconductor element and the circuit board are joined via a plurality of connecting electrodes are bonded The sealing resin can be injected between the semiconductor element and the circuit board almost simultaneously from the respective openings of the filling path. Thereby, the flow of the sealing resin can be controlled and filled, the diameter of the void generated in the bump electrode region can be reduced, and the number of voids can be reduced.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
First, the first embodiment will be described.
FIG. 1 is a schematic diagram of the surface of the semiconductor chip of the first embodiment, and FIG. 2 is a schematic side sectional view of the main part of the combined semiconductor chip and substrate of FIG.

  As shown in FIG. 1, a filling path 2 having substantially the same linear distance from the center of gravity to the outer peripheral portion of the semiconductor chip 3 and a plurality of bump electrodes 1 arranged in a lattice pattern are formed in the semiconductor chip 3. A bump electrode region 1a other than the bump electrode 1 in the region is provided.

  Then, as shown in FIG. 2, the semiconductor chip 3 and the substrate 4 are coupled by the bump electrode 1, and each of the filling paths 2 on the outer peripheral portion of the semiconductor chip 3 is interposed between the coupled semiconductor chip 3 and the substrate 4. Sealing resin is injected almost simultaneously from the roadway, and the bonding between the semiconductor chip 3 and the substrate 4 is completed.

  The sealing resin injected into the semiconductor chip 3 from the respective openings of the filling path 2 almost simultaneously proceeds through the filling path 2 and is folded back at the center of the semiconductor chip 3 using the capillary phenomenon. Then, the sealing resin flows into the bump electrode region 1a where the bump electrode 1 is disposed, spreads outside the semiconductor chip 3, and fills the bump electrode region 1a.

  By such a flow of the sealing resin, generation of voids due to the entrainment of air or the like in the bump electrode region 1a is suppressed, and the filling property of the sealing resin is improved. That is, generation of voids is suppressed and the filling rate of the sealing resin is improved, so that circuit boards having high-density electrodes can be stably bonded to each other.

  The width of the filling path 2 is an integer number of the bump electrodes 1, preferably 2 to 10 pieces. By setting the width to this level, the semiconductor chip 3 can be easily designed and the filling path 2 can be introduced without greatly reducing the number of terminals of the semiconductor chip 3.

Further, examples of the first embodiment will be described below.
FIG. 3 is a schematic diagram of an example of the first embodiment.
As shown in FIG. 3, a semiconductor chip 3a having a filling path 2a and a solder bump electrode region 1aa in which a plurality of solder bump electrodes are arranged in a grid pattern is coupled to a substrate 4a. FIG. 3 is a schematic view of the combined semiconductor chip 3a and substrate 4a as viewed from the semiconductor chip 3a side.

Such a semiconductor chip 3a can be configured as follows, for example.
On the surface of the semiconductor chip 3a (size: 23 mm × 23 mm, electrode pitch: 150 μm, number of electrodes: 19036), the linear distance from the center of the semiconductor chip 3a to the outer periphery is equal, and the width of four solder bump electrodes Among the plurality of solder bump electrodes (composition: Sn-3.5Ag, height: 80 μm) arranged in a grid pattern, the solder bump electrode region 1aa other than the solder bump electrode in the region of the fill path 2a And are installed.

Subsequently, the semiconductor chip 3a is aligned using a flip chip bonder with respect to the substrate 4a having electrodes at positions facing the solder bump electrodes of the semiconductor chip 3a.
After alignment, the solder bump electrode of the semiconductor chip 3a and the electrode of the substrate 4a are connected by heating and melting.

  Subsequently, while heating the assembly in which the semiconductor chip 3a and the substrate 4a are combined with a hot plate at 100 ° C., the epoxy-based sealing resin is substantially simultaneously fed from the respective openings of the filling path 2a on the outer periphery of the semiconductor chip 3a. inject.

After injecting the sealing resin, it is kept for 10 minutes as it is, and is cured by heating at 165 ° C. for 1 hour to complete the bonding between the semiconductor chip 3a and the substrate 4a.
In addition, as a result of observing the inside of the sealing resin between the bonded semiconductor chip 3a and the substrate 4a using an ultrasonic microscope, no void having a diameter of 5 μm or more was observed, and the sealing resin was good. It was confirmed that a proper connection was formed.

  Furthermore, even when the width of the filling path 2a was set to 5 solder bump electrodes and 10 solder bump electrodes, the same method was used for observation. As a result, in any case, no voids having a diameter of 5 μm or more were observed, and it was confirmed that a good connection with the sealing resin was formed.

  In the first embodiment, the case where the semiconductor chip 3 and the substrate 4 are connected has been described as an example. However, the first embodiment is also used for connecting circuit boards, Similar effects can be obtained.

  Furthermore, in the first embodiment, the case where the semiconductor chip 3 is square has been described as an example. FIG. 4 is another schematic view of the surface of the semiconductor chip of the first embodiment. As shown in FIG. 4, in the case of a rectangular semiconductor chip 3 b, the filling path 2 b in which the linear distance from the center of gravity of the semiconductor chip 3 b to the outer periphery is substantially the same is formed in a region connecting diagonal lines as shown in FIG. 4. Become. And the bump electrode area | region 1b becomes an area | region except the bump electrode of the area | region of the filling path 2b, Therefore The effect similar to 1st Embodiment can be acquired.

  In addition, when it is difficult to form a filling path having the same distance, it is possible to control the filling speed by changing the width of the filling path, and the same effect is obtained as if it is the same distance. be able to.

Next, a second embodiment will be described.
FIG. 5 is a schematic diagram of the surface of the semiconductor chip of the second embodiment, and FIG. 6 is a schematic side sectional view of the main part of the combined semiconductor chip and substrate of FIG.

  As shown in FIG. 5, as in the first embodiment, the semiconductor chip 30 includes a plurality of filling paths 20 having substantially the same linear distance from the center of gravity of the semiconductor chip 30 to the outer periphery, and a plurality of grids arranged in a lattice pattern. Among the bump electrodes 10, bump electrode regions 10 a other than the bump electrodes 10 in the region of the filling path 20 are installed.

However, in the second embodiment, as shown in FIGS. 5 and 6, unlike the first embodiment, a shielding wall 50 is provided at the boundary between the filling path 20 and the bump electrode region 10a. .
Then, as shown in FIG. 6, the semiconductor chip 30 and the substrate 40 are coupled by the bump electrode 10, and the filling path 20 on the outer peripheral portion of the semiconductor chip 30 is interposed between the coupled semiconductor chip 30 and the substrate 40. Sealing resin is injected almost simultaneously from each passageway, and the bonding between the semiconductor chip 30 and the substrate 40 is completed.

  As described above, the sealing resin injected into the semiconductor chip 30 from the respective openings of the filling path 20 substantially simultaneously uses the capillary phenomenon and proceeds through the filling path 20 to the center of the semiconductor chip 30. Go ahead. However, the shielding wall 50 prevents the sealing resin from flowing into the bump electrode region 10a before the sealing resin reaches the center of the semiconductor chip 30. Therefore, by providing the shielding wall 50, most of the injected sealing resin spreads outward from the center of the semiconductor chip 30 and fills the bump electrode region 10a. For this reason, the occurrence of entrainment of air or the like is lower than in the first embodiment, and the generation of voids can be suppressed. In this way, generation of voids is suppressed and the filling rate of the sealing resin is improved, so that circuit boards having high-density electrodes can be stably bonded to each other. The control method becomes a more effective means when the chip becomes larger in the future.

  As in the first embodiment, the width of the filling path 20 is an integer number of the bump electrodes 10, preferably two to ten. By setting the width to this level, the semiconductor chip 30 can be easily designed and the filling path 20 can be introduced without greatly reducing the number of terminals of the semiconductor chip 30.

  The shielding wall 50 can be formed on either the semiconductor chip 30 or the substrate 40 using a technique such as printing of a resin paste or patterning with a photosensitive resin. Further, when the shielding wall 50 is formed on the substrate 40, a gap is provided between the semiconductor chip 30 and the semiconductor chip 30 so as not to obstruct the bump electrodes 10 when the semiconductor chip 30 and the substrate 40 are joined. To. FIG. 7 is an enlarged schematic cross-sectional view of the main part of FIG. 6 filled with a sealing resin. As shown in FIG. 7, even when there is a gap between the semiconductor chip 30 and the shielding wall 50, the filling path 20 has a higher pressure than the bump electrode region 10a, so that the sealing resin 60 flows into the filling path 20. It has the feature of being difficult.

  Further, as described in the first embodiment, in the second embodiment, the case where the semiconductor chip 30 and the substrate 40 are connected has been described as an example. In addition, the same effect can be obtained by using the second embodiment.

Further, as described in the first embodiment, even when the semiconductor chip is rectangular, the same effect as in the second embodiment can be obtained.
In addition, when it is difficult to form a filling path having the same distance, it is possible to control the filling speed by changing the width of the filling path, and the same effect is obtained as if it is the same distance. be able to.

Next, a third embodiment will be described.
FIG. 8 is a schematic diagram of the surface of the semiconductor chip of the third embodiment, FIG. 9 is a schematic side sectional view of the main part of the semiconductor chip and substrate of FIG. 8 combined, and FIG. 10 is an enlarged main part of FIG. FIG. 11 is a schematic diagram of the sealing resin filling in the third embodiment.

  As shown in FIG. 8, as in the first embodiment, the semiconductor chip 300 includes a filling path 200 having substantially the same linear distance from the center of gravity to the outer periphery of the semiconductor chip 300, and a plurality of grids arranged in a grid pattern. Among the bump electrodes 100, bump electrode regions 100a other than the bump electrodes 100 in the region of the filling path 200 are provided.

As in the second embodiment, a shielding wall 500 is installed at the boundary between the filling path 200 and the bump electrode region 100a.
However, in the third embodiment, unlike the second embodiment, the rectifying protrusion 700 is provided in the region of the center of the semiconductor chip 300 where the filling path 200 intersects.

  Then, as shown in FIG. 9, the semiconductor chip 300 and the substrate 400 are coupled by the bump electrode 100, and the filling path 200 on the outer peripheral portion of the semiconductor chip 300 is interposed between the coupled semiconductor chip 300 and the substrate 400. Sealing resin is injected almost simultaneously from each passageway, and the bonding between the semiconductor chip 300 and the substrate 400 is completed.

  As shown in FIG. 11, the sealing resin 600 (FIG. 11A) injected into the semiconductor chip 300 almost simultaneously from the respective openings of the filling path 200 utilizes the capillary phenomenon as described above. Then, it proceeds through the filling path 200 and proceeds to the center of the semiconductor chip 300. As described above, the shielding wall 500 prevents the sealing resin 600 from flowing into the bump electrode region 100a before reaching the central portion of the semiconductor chip 300.

  When the sealing resin reaches the center of the semiconductor chip 300, as shown in FIG. 10, the sealing resin 600 that has flowed through the filling path 200 (the arrow in FIG. 10 represents the flow of the sealing resin). The flow direction can be changed to a desired direction by the rectifying protrusion 700, and it easily flows into the bump electrode region 100a, spreads outside the semiconductor chip 300, and fills the bump electrode region 100a (see FIG. 11 (B) to FIG. 11 (D)). Therefore, by providing the rectifying projection 700, the sealing resin is more effectively filled from the center of the semiconductor chip 300 into the bump electrode region 100a than in the second embodiment. For this reason, the occurrence of entrainment of air or the like is reduced, and the generation of voids can be further suppressed. As described above, the generation of voids is suppressed and the filling property of the sealing resin is improved, so that circuit boards having high-density electrodes can be stably bonded to each other. This control method becomes a more effective means when the chip becomes larger in the future.

  As in the first and second embodiments, the width of the filling path 200 is an integral number of bump electrodes 100, preferably two to ten. With this width, the semiconductor chip 300 can be easily designed and the filling path 200 can be introduced without greatly reducing the number of terminals of the semiconductor chip 300.

  Further, the rectifying protrusion 700 is formed on the semiconductor chip 300 or the substrate 400 by using a method such as printing of a resin paste or patterning with a photosensitive resin, similarly to the shielding wall of the second embodiment. can do. Further, when the shape of the rectifying protrusion 700 is a rhombus, the rectifying effect is more exhibited. The most effective rhombus size is when the diagonal length of the rhombus is approximately the same as the width of the filling path. Incidentally, when the diagonal length of the rhombus is 30% or less of the width of the filling path 200, the rectifying effect cannot be obtained, and when it is larger than 30%, the flow of the sealing resin is conversely prevented.

  Further, when such a rectifying protrusion 700 is formed on the substrate 400, for example, when the semiconductor chip 300 and the substrate 400 are coupled, the bumps 100 are not disturbed. For example, a gap is provided in Further, as shown in FIG. 7 of the second embodiment, even when there is a gap between the semiconductor chip 300 and the rectifying protrusion 700, the filling path 20 has a higher pressure than the bump electrode region 10a. There is a feature that the sealing resin hardly flows into the filling path 200.

  In addition, when it is difficult to form a filling path having the same distance, it is possible to control the filling speed by changing the width of the filling path, and the same effect is obtained as if it is the same distance. be able to.

Further, an example of the third embodiment will be described below.
FIG. 12 is a schematic diagram of an example of the third embodiment.
As shown in FIG. 12, a filling path 200a, a solder bump electrode area 100aa having a plurality of solder bump electrodes arranged in a grid, a shielding wall 500a between the filling path 200a and the solder bump electrode area 100aa, and a filling path A semiconductor chip 300a having a rectifying protrusion 700a at the center of 200a and a substrate 400a are coupled.

Such a semiconductor chip 300a can be configured as follows, for example.
On the surface of the semiconductor chip 300a (size: 23 mm × 23 mm, electrode pitch: 150 μm, number of electrodes: 19036), the linear distance from the center to the outer periphery of the semiconductor chip 300a is equal, and the width of two solder bump electrodes Among the plurality of solder bump electrodes (composition: Sn-3.5Ag, height: 80 μm) arranged in a grid pattern, a solder bump electrode region 100aa other than the solder bump electrode in the region of the filling path 200a And are installed.

  Subsequently, a photosensitive resist resin is applied to the surface of the substrate 400a (thickness: 40 [mu] m), and exposure / development results in a shielding wall 500a (width: 20 [mu] m, distance between shielding walls: 80 [mu] m) and rhombic rectifying protrusions An object 700a (length of one side: 9 μm) is formed.

  Subsequently, the semiconductor chip 300a is aligned using a flip chip bonder with respect to the substrate 400a having electrodes at positions facing the solder bump electrodes of the semiconductor chip 300a.

After the alignment, the solder bump electrodes of the semiconductor chip 300a and the electrodes of the substrate 400a are connected by heating and melting.
Subsequently, while heating the assembly in which the semiconductor chip 300a and the substrate 400a are combined with a hot plate at 100 ° C., an epoxy-based sealing resin is injected almost simultaneously through the respective openings of the filling path 200a on the outer periphery of the semiconductor chip 300a. To do.

After injecting the sealing resin, it is kept for 10 minutes as it is, and is cured by heating at 165 ° C. for 1 hour to complete the bonding between the semiconductor chip 300a and the substrate 400a.
The sealing resin between the bonded semiconductor chip 300a and the substrate 400a was observed using an ultrasonic microscope. As a result, no voids having a diameter of 5 μm or more were observed, and it was confirmed that a good connection with the sealing resin was formed.

  Furthermore, even when the width of the filling path 200a was set to 5 bump electrodes and 10 bump electrodes, the same method was used. As a result, in any case, no voids having a diameter of 5 μm or more were observed, and it was confirmed that a good connection with the sealing resin was formed.

  For comparison, a semiconductor chip and a substrate having the same size as the example of the third embodiment, in which bump electrodes are formed in a regular lattice shape without a filling path, a shielding wall, and a rectifying projection, The assembly was also observed by the method. According to the result, 30 or more voids having a diameter of 5 μm or more were present, and voids having a maximum diameter of 400 μm were also observed.

  Further, as described in the first and second embodiments, in the third embodiment, the case where the semiconductor chip 300 and the substrate 400 are connected has been described as an example. The same effect can be obtained by using the third embodiment also for connection between each other.

Further, as described in the first and second embodiments, even when the semiconductor chip is rectangular, the same effect as that of the third embodiment can be obtained.
In addition to the constituent materials in the examples of the first to third embodiments shown this time, the same effect can be obtained as long as the combination of material systems that can constitute the embodiment.

(Appendix 1) In a semiconductor device having a flip chip structure,
A semiconductor element comprising: a filling path having a substantially equal linear distance from the center of gravity to the outer periphery; and a connection electrode region formed in a region different from the filling path and having a plurality of connection electrodes arranged in a grid pattern ,
A circuit board bonded to the semiconductor element via the plurality of connection electrodes;
A sealing resin filled between the semiconductor element and the circuit board;
A semiconductor device comprising:

(Supplementary note 2) The semiconductor device according to supplementary note 1, wherein a width of the filling path corresponds to an integral number of the connection electrodes.
(Supplementary Note 3) The semiconductor device according to Supplementary Note 2, wherein the integer number corresponds to two to ten connection electrodes.

(Supplementary note 4) The semiconductor device according to any one of supplementary notes 1 to 3, further comprising a shielding wall at a boundary between the filling path and the connection electrode region.
(Supplementary note 5) The semiconductor device according to any one of supplementary notes 1 to 4, wherein a rectifying protrusion is provided at the center of gravity.

(Supplementary note 6) The semiconductor device according to supplementary note 5, wherein the rectifying protrusion is a rhombus.
(Supplementary Note 7) In a method for manufacturing a semiconductor device having a flip chip structure,
A semiconductor element having a filling path whose linear distance from the center of gravity to the outer periphery is substantially the same, and a connection electrode region formed in a region different from the filling path and having a plurality of connection electrodes arranged in a grid pattern A preparation process;
Bonding the semiconductor element and the circuit board via the plurality of connection electrodes;
A step of injecting a sealing resin between the semiconductor element and the circuit board, which are bonded, from the respective openings of the filling path substantially simultaneously;
A method for manufacturing a semiconductor device, comprising:

(Supplementary note 8) The method of manufacturing a semiconductor device according to supplementary note 7, wherein a width of the filling path corresponds to an integral number of the connection electrodes.
(Supplementary note 9) The method for manufacturing a semiconductor device according to supplementary note 8, wherein the integer number corresponds to two to ten connection electrodes.

(Additional remark 10) The manufacturing method of the semiconductor device in any one of Additional remark 7 thru | or 9 which has a shielding wall in the boundary of the said filling path and the said connection electrode area | region.
(Additional remark 11) The said shielding wall is formed in the chip-shaped semiconductor element or circuit board by the printing of the resin paste or the patterning by the photosensitive resin, The manufacturing method of the semiconductor device of Additional remark 10 characterized by the above-mentioned.

(Additional remark 12) The manufacturing method of the semiconductor device in any one of Additional remark 7 thru | or 11 which has a baffle protrusion in the said gravity center.
(Additional remark 13) The said rectification | straightening protrusion is a rhombus, The manufacturing method of the semiconductor device of Additional remark 12 characterized by the above-mentioned.

  (Supplementary note 14) The semiconductor device manufacturing method according to Supplementary note 12 or 13, wherein the rectifying protrusion is formed on a chip-like semiconductor element or circuit board by patterning with a photosensitive resin or a photosensitive resin. .

It is a schematic diagram of the surface of the semiconductor chip of 1st Embodiment. FIG. 2 is a side cross-sectional schematic view of a main part of the semiconductor chip and substrate of FIG. It is a schematic diagram of the Example of 1st Embodiment. It is another schematic diagram of the surface of the semiconductor chip of the first embodiment. It is a schematic diagram of the surface of the semiconductor chip of 2nd Embodiment. FIG. 6 is a side cross-sectional schematic view of the main part of the combined semiconductor chip and substrate of FIG. 5. It is a principal part expanded sectional schematic diagram of FIG. 6 filled with sealing resin. It is a schematic diagram of the surface of the semiconductor chip of 3rd Embodiment. FIG. 9 is a schematic side cross-sectional view of the main part of the semiconductor chip and substrate of FIG. 8 combined. It is a principal part enlarged schematic diagram of FIG. It is a schematic diagram of filling of the sealing resin in the third embodiment. It is a schematic diagram of the Example of 3rd Embodiment. It is a side surface principal part schematic diagram of a general flip chip structure. It is a side surface principal part schematic diagram of a flip chip structure. It is a schematic diagram of filling of sealing resin in a flip chip structure.

Explanation of symbols

1 Bump electrode 1a Bump electrode area 2 Filling path 3 Semiconductor chip

Claims (6)

In a semiconductor device having a flip chip structure,
A filling path in which the linear distance from the center of gravity to the outer periphery is substantially the same, and a connection electrode formed in a region different from the filling path, adjacent to the filling path, and having a plurality of connection electrodes arranged in a grid pattern have a, and a region, the width of the filling path, and the semiconductor element is an integral number of the connecting electrode,
A circuit board bonded to the semiconductor element via the plurality of connection electrodes;
A sealing resin filled between the semiconductor element and the circuit board;
A semiconductor device comprising: There are a plurality of the filling paths, and the filling paths intersect each other,
The semiconductor device according to claim 1.   3. The semiconductor device according to claim 1, further comprising a shielding wall at a boundary between the filling path and the connection electrode region.   The semiconductor device according to claim 1, further comprising a rectifying protrusion at the center of gravity. The rectifying protrusion is Ri rhombus der, respectively opposed to the apexes road port of the filling path of the rhombus, according to claim 4, wherein the rhombus sides, characterized in that respectively opposite to the connecting electrode region a semiconductor apparatus. In a method for manufacturing a semiconductor device having a flip chip structure,
A filling path in which the linear distance from the center of gravity to the outer periphery is substantially the same, and a connection electrode formed in a region different from the filling path, adjacent to the filling path, and having a plurality of connection electrodes arranged in a grid pattern possess a region, the width of the fill channel comprises a step of preparing a semiconductor device which is integral number of the connecting electrode,
Bonding the semiconductor element and the circuit board via the plurality of connection electrodes;
Between the semiconductor element and the circuit board that are joined, a step of injecting sealing resin from each of the filling passages substantially simultaneously,
A method for manufacturing a semiconductor device, comprising:

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