JP2922991B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and particularly to a gate electrode, a wiring or a diffusion layer and an Al-Si layer formed on an upper layer.
Also, the present invention relates to a method for manufacturing a semiconductor element capable of favorably forming a contact with a wiring such as Al-Si-Cu.

[Conventional technology]

Recently, there has been remarkable progress in the technology for miniaturizing the contact shape between the wiring layer and the diffusion layer or between the wiring layer and the wiring layer in order to increase the density of semiconductor devices. In this situation, it is necessary to easily connect the wiring layers.

Therefore, as a technique in this type of field, a semiconductor element in which a polycrystalline silicon film is embedded in a contact hole is formed.

Hereinafter, a conventional method for manufacturing a semiconductor device will be described with reference to the process sectional views of FIGS. 2 (a) to 2 (d).

First, as shown in FIG. 2 (a), a normal LOCOS (Loc
An Al Oxidation of Silicon) method is used to form a field oxide film 102 serving as an element isolation region on the P-type silicon substrate 101 and the N well layer 101a.

Next, an n-type impurity is added to the element formation region I and the element formation region II
Then, a P-type impurity is ion-implanted to form diffusion layers 103 and 103a.

Next, the silicon oxide film 104 is deposited for 1000
Degree formed. Subsequently, a silicon oxide film 105 containing impurities (boron, phosphorus, etc.)
Å ~ 7000Å formed.

Next, after heat treatment is performed to flatten the surface of the silicon oxide film 105, the diffusion layer 10 is formed using a normal photolithography technique and an etching technique as shown in FIG.
A contact hole 106 is formed on 3.

Next, the polycrystalline silicon film 107 is
Deposit about 0Å.

Next, using anisotropic etching technology by RIE method,
Etch back the polycrystalline silicon film 107, contact hole 1
The polycrystalline silicon film 107 is left only in the area 06.

Next, n is added to the polycrystalline silicon film 107 in the contact hole 106.
A type impurity or a P-type impurity is introduced by an ion implantation method.

Next, heat treatment is performed to activate impurities in polycrystalline silicon film 107. At this time, in order to prevent solid-phase diffusion and auto-doping of the impurity from the silicon oxide film containing the impurity, this is performed in an N ₂ + O ₂ atmosphere, and the periphery and the surface of the contact hole 106 are formed as shown in FIG. Next, silicon oxide films 108 and 108a are formed.

Subsequently, annealing is performed for a short time in an N ₂ atmosphere in order to further activate the impurities in the polycrystalline silicon film 107.

Next, the silicon oxide films 108 and 108a on the surfaces of the contact holes 106 are removed by etching with dilute hydrofluoric acid (about 1%).

Next, as shown in FIG. 2D, an Al-Si film 109 is deposited by about 7000 ° by a sputtering method on the entire surface.

Next, using normal photolitho technology and etching technology
The Al-Si film wiring is patterned. Finally, sintering is performed in an H ₂ gas atmosphere to improve the contact between the Al—Si film 109 and the polycrystalline silicon film 107.

[Problems to be solved by the invention]

However, in the above-described method for manufacturing a semiconductor element, when heat treatment is performed in an N ₂ + O ₂ atmosphere in order to activate impurities in the polycrystalline silicon film 107, the surface of the portion into which the n-type impurity is introduced has P If the oxide film is oxidized thicker than the surface of the portion into which the type impurity has been introduced, and the oxide film is not sufficiently removed by dilute hydrofluoric acid, the oxide film is formed only on the n-type contact surface as shown by the reference numeral in FIG. It tends to remain and causes an increase in contact resistance.

On the other hand, if the etching is performed more than necessary, the silicon oxide film 105 containing impurities is also etched in the same manner, so that the insulation margin between the wiring of the Al-Si film 109 and the lower wiring may not be sufficient. There was a point.

The present invention relates to the problem that the contact resistance increases due to insufficient etching of the oxide film on the surface of the n-type contact and the problem that the insulation margin decreases due to excessive etching, among the problems of the prior art. It is an object of the present invention to provide a method for manufacturing a semiconductor device which has been solved.

[Means for solving the problem]

In order to solve the above-mentioned problems, the present invention provides a method of manufacturing a semiconductor device, wherein P ^{+ is} added before heat treatment in an N ₂ + O ₂ atmosphere to activate impurities in a polycrystalline silicon film in a contact hole. The step of patterning the silicon nitride film using an ion implantation mask to cover the surface of the n-type contact is introduced.

(Operation)

According to the present invention, in a method for manufacturing a semiconductor element,
Since the above steps are introduced, the silicon nitride film is coated on the surface of the polycrystalline silicon film in the contact hole, and the heat treatment suppresses the oxidation of the surface of the polycrystalline silicon film. It acts to suppress the increase in contact resistance due to shortage and the decrease in insulation margin due to excessive etching, and therefore the above problem can be eliminated.

〔Example〕

Hereinafter, an embodiment of a method of manufacturing a semiconductor device according to the present invention will be described with reference to the drawings. 1 (a) to 1 (d) are process cross-sectional views of one embodiment.

First, as shown in FIG. 1 (a), phosphorus is ion-implanted into a P-type silicon substrate 1, and an N-well layer 1a is formed by heat treatment.

Next, a field oxide film 2 is formed using a normal LOCOS method. Then, phosphorus is ion-implanted into the element formation region I on the P-type silicon substrate 1, N ⁺ diffusion layer 3, also the BF ₂ ions are implanted into the element formation region II on the N-well layer 1a, P ⁺ The diffusion layers 3a are respectively formed.

Next, a silicon oxide film 4 is formed to a thickness of about 1000 ° by a normal pressure CVD method. Subsequently, a silicon oxide film 5 containing impurities (boron and phosphorus) is formed at a temperature of about 5000 to 7000 mm by normal pressure CVD.

Next, heat treatment is performed at 900 ° C. for 15 minutes in an N ₂ gas atmosphere to flatten the surface of the silicon oxide film 5 containing impurities by viscous flow of glass.

Next, as shown in FIG. 1B, an N ⁺ contact hole 6 having a contact diameter of 0.8 μm square is formed on the N ⁺ diffusion layer 3 and the P ⁺ diffusion layer 3a by using ordinary photolithography and etching techniques. And a P ⁺ contact hole 6a is formed.

Next, the polycrystalline silicon film 7 is deposited for 10,000
Deposit to a degree.

Next, the polycrystalline silicon film 7 is left only in the contact holes 6 and 6a by etching back using an anisotropic etching technique by the RIE method.

Next, n is added to the polycrystalline silicon film 7 in the N ⁺ contact hole 6.
Type impurities (phosphorus) are introduced by an ion implantation method. Subsequently, the photoresist used as a mask at this time is removed.

Next, as shown in FIG. 1 (c), the silicon nitride film 10 is
Å formed.

Next, by ordinary photolitho technology and etching technology,
The silicon nitride film 10 is patterned using a P ⁺ ion implantation mask.

Next, a P-type impurity (boron) is introduced into the polycrystalline silicon film in the P ⁺ contact hole 6a by an ion implantation method. Subsequently, the photoresist used as a mask at this time is removed.

Next, in order to activate the impurities in the polycrystalline silicon film 7, heat treatment is first performed at 900 ° C. for 15 minutes in an N ₂ + O ₂ gas atmosphere by an electric furnace annealing method. At this time
The O ₂ gas partial pressure of the N ₂ + O ₂ gas is 20% to 40%.

Note that a silicon oxide film 8 of 100 to 200 ° is formed around and on the surface of the polycrystalline silicon film 7 in the P ⁺ contact hole 6a, but the surface of the polycrystalline silicon film 7 in the N ⁺ contact hole 6 is formed. Is covered with the silicon nitride film 10, no oxide film is formed on the surface, and a silicon oxide film of 200 to 300 mm is formed only on the periphery.

The edge of the silicon oxide film 5 containing impurities around the contact hole is rounded due to viscous flow of the glass.

Subsequently, heat treatment is performed in a N ₂ gas atmosphere at 900 ° C. to 950 ° C. for 10 seconds by a lamp annealing method to increase the activation rate of impurities in the polycrystalline silicon film 7.

Next, as shown in FIG. 1D, the silicon nitride film 10 is removed by isotropic etching. Next, the silicon oxide film 8 on the surface of the P ⁺ contact hole 6a is removed by etching with dilute hydrofluoric acid (about 1%).

Next, as shown in FIG. 1D, an Al-Si film 9 is deposited on the entire surface by sputtering at about 7000 °.

Next, the wiring of the Al-Si film 9 is patterned using a normal photolithography technique and an etching technique.

Finally, sintering is performed at 400 ° C. for 20 minutes in an H ₂ gas atmosphere to improve the contact between the Al—Si film 9 and the polycrystalline silicon film 7.

The formation of the silicon nitride film 10 on the way can be achieved by optimizing the ion implantation energy when introducing an n-type impurity into the polycrystalline silicon film 7 in the N ⁺ contact hole 6. Before the photolithography step.

〔The invention's effect〕

As described above in detail, according to the present invention, before the heat treatment for activating the impurities in the polycrystalline silicon film in the contact hole, the silicon nitride film is formed using a P ⁺ ion implantation mask. the patterning. Thus to remove it after the heat treatment, no longer oxidized polycrystalline silicon surface of the N ⁺ contact downhole, in the oxide film removing step of the contact surface after, the N ⁺ contact by insufficient etching high It can be expected to prevent the insulation margin from being reduced due to the increase in the resistance or the excessive etching.

[Brief description of the drawings]

1 (a) to 1 (d) are process cross-sectional views of an embodiment of a method of manufacturing a semiconductor device according to the present invention, and FIGS. 2 (a) to 2 (d) are views of a conventional semiconductor device. It is a process sectional view of a manufacturing method. 1 ... P-type silicon substrate, 1a ... N well layer, 2 ... Field oxide film, 3 ... N ⁺ diffusion layer, 3a ... P ⁺ diffusion layer, 4,
5 ... Silicon oxide film, 6 ... N ⁺ contact hole, 6a ... P
⁺ Contact hole, 7: polycrystalline silicon film, 8: silicon oxide film, 9: Al-Si film, 10: silicon nitride film.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-3-148821 (JP, A) JP-A-3-135025 (JP, A) JP-A-3-71626 (JP, A) JP-A-2- 210824 (JP, A) JP-A-2-203524 (JP, A) JP-A-1-238012 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 21/28 H01L 21 / 768

Claims (1)

(57) [Claims] A step of forming an insulating film on a semiconductor substrate; a step of forming first and second contact holes in a predetermined portion of the insulating film; and a step of forming a polycrystal in the first and second contact holes. A step of embedding silicon, a step of introducing an n-type impurity into polycrystalline silicon of the first contact hole, a step of introducing a p-type impurity into polycrystalline silicon of the second contact hole, Forming a nitride film on the contact hole; performing a heat treatment; etching and removing the nitride film; removing an oxide film on a polycrystalline silicon surface of the second contact hole; Forming a wiring on the first and second contact holes.