JP2925720B2 - Instruction execution method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Regarding an instruction execution method, an object of the present invention is to provide an instruction code part and an instruction code part and an instruction code execution method for the purpose of reducing unnecessary processing during a command issuing procedure and shortening an instruction execution processing time. An instruction execution method for executing a predetermined same instruction by issuing a command including a parameter portion to perform, wherein the parameter portion is provided with a determination flag as to whether or not a parameter portion following the parameter portion exists, When the predetermined instruction is repeatedly executed a plurality of times, the command code section is issued once, and then the parameter section is issued a predetermined number of times based on the determination flag.

[Industrial applications]

The present invention relates to an instruction execution method.
The present invention relates to an instruction execution method for executing a predetermined instruction by issuing a command, which is suitable for use in the field of arithmetic processing such as a computer.

In recent years, for example, in an arithmetic processing device such as a computer, many instruction execution methods for executing a predetermined instruction have been developed.

As the speed of the arithmetic processing unit increases, the influence of the instruction execution method on the processing time of the entire arithmetic processing unit increases.

Therefore, an instruction execution method suitable for higher speed is required.

[Conventional technology]

As a conventional instruction execution method of this kind, for example,
There is an instruction execution method as shown in FIG. 4 and FIG.

That is, when a predetermined same instruction is repeatedly executed a plurality of times, as shown in FIG. 3, one instruction code part 1 and one instruction code part
A method of issuing a command 3 multiple times in combination with one parameter unit 2 or, as shown in FIG. 4, one instruction code 1 and a predetermined number (in this case, three) of parameter units 2a, There is a method of issuing the command 3 composed of a combination of 2b and 2c a plurality of times. In any case, when the same instruction is repeatedly executed a plurality of times, the command 3 is repeatedly issued by the number of times of instruction execution. .

[Problems to be solved by the invention]

However, in such a conventional instruction execution method, when a predetermined same instruction is repeatedly executed a plurality of times, the command 3 is repeatedly issued by the number of instruction executions. In order to execute the same instruction, the command 3 must be given a plurality of times in the arithmetic processing unit, and it takes time and effort to issue the command 3, and the same instruction code section 1 is included in the command 3. There was a problem that wasted time was spent on instruction execution time.

Further, in the conventional example shown in FIG. 4, since the number of parameter parts is set in advance,
Although the command processing is simpler than the conventional example shown in the figure, even if the command 3 originally requires two parameter parts, if the number of parameter parts is set to three, a dummy There is a problem that the parameter section has to be issued and unnecessary labor is added.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to eliminate unnecessary work during a command issuing procedure, and to reduce the execution time of an instruction.

[Means for solving the problem]

In order to achieve the above object, the instruction execution method according to the present invention, as shown in FIG.
And issuing a command 3 comprising a parameter unit 2 to be added to the instruction code unit 1 to execute a predetermined same instruction.
Is provided with a determination flag 4 for determining whether or not the parameter unit 2 following the parameter unit 2 exists. When the predetermined instruction is repeatedly executed plural times, the instruction code unit 1 is issued once, The parameter section 2 is configured to be issued a predetermined number of times based on the determination flag 4.

[Action]

According to the present invention, a determination flag is set in the parameter section to determine whether or not a parameter section following this parameter section exists. When a predetermined instruction is repeatedly executed a plurality of times, the instruction code section is issued once. , Based on the determination flag,
If it is determined that the parameter portion continues, the next parameter portion is issued, and if it is determined that there is no subsequent parameter portion, the execution of the instruction is terminated.

That is, the same command is issued a plurality of times by one command issuing procedure including one instruction code part and an arbitrary number of parameter parts, thereby eliminating unnecessary labor and shortening the execution time of the instruction. Is done.

〔Example〕

 Hereinafter, the present invention will be described with reference to the drawings.

FIG. 2 is a diagram showing an embodiment of an instruction execution method according to the present invention. In FIG. 2, the same reference numerals as those given in the principle explanatory diagram shown in FIG. 1 indicate the same parts.

Generally, the frequency of repetition processing in the instruction execution processing is extremely high, and it is effective to improve the instruction execution method related to the repetition processing.

Therefore, in the instruction execution method of the present embodiment, the command 3 includes an instruction code section 1 and a parameter section 2, and the parameter section 2 is provided with a 1-bit determination bit 4 serving as a determination flag.

The determination bit 4 is for knowing whether there is a parameter section 2 to be issued subsequent to the parameter section 2 to be issued when the parameter section 2 is issued a plurality of times by the repetition processing. In this case, information of "1" or "0" is written. Specifically, when the determination bit 4 is “1”, the following parameter part 2 exists, and when it is “0”, the following parameter part 2 does not exist.

Next, the operation of the above configuration will be described by taking as an example a case where a predetermined instruction is repeatedly executed three times.

First, as shown in FIG. 2, after an instruction code 1 for an instruction is issued, a parameter section 2A is issued. At this time, the determination bit 4 provided in the parameter section 2A is "1".
Is written, the next parameter section 2B is issued. Then, like the parameter section 2A, the parameter section 2B
Since "1" is also written in the determination bit 4 of the above, the next parameter section 2C is issued. Since “0” is written in the determination bit 4 of the parameter section 2C, the issuing of the command 3 ends here.

Therefore, when the same instruction is executed a plurality of times, the instruction code is issued once and then the parameter 2 is issued a plurality of times, whereby the instruction execution process can be performed easily and in a short time. The number of parts 2 can be set freely.

As described above, in the present embodiment, the command issuance procedure is performed a plurality of times in a single command issuance procedure, and the command code section is issued only once and the parameter section alone is issued a plurality of times. Execution time can be reduced,
Iterative processing can be sped up.

In the above embodiment, the determination bit is a 1-bit flag having information of “1” and “0”. However, the present invention is not limited to this, and if the data length of the parameter section may be long, By increasing the number of decision bits, information such as the number of repetitions can be recorded.

〔The invention's effect〕

In the present invention, by performing the command issuing procedure a plurality of times in a single command issuing procedure, and issuing the instruction code portion only once and issuing only the parameter portion a plurality of times, unnecessary labor can be saved, Instruction execution time can be reduced. Therefore, for example, iterative processing in the arithmetic processing device can be speeded up.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a diagram showing an embodiment of an instruction execution method according to the present invention, FIG. 3 is a diagram showing a conventional instruction execution method, and FIG. FIG. 5 is a diagram showing a conventional instruction execution method, and FIG. 5 is a diagram showing a problem of another conventional example. 1 ... instruction code part, 2 ... parameter part, 2a, 2b, 2c ... parameter part, 2A, 2B, 2C ... parameter part, 3 ... command, 4 ... determination bit (determination flag).

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-58-22452 (JP, A) JP-A-63-172339 (JP, A) JP-A-62-221059 (JP, A) JP-A-2- 245930 (JP, A) JP-A-2-242336 (JP, A) JP-A-1-284926 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G06F 9/32

Claims (1)

(57) [Claims] An instruction execution method for executing a predetermined instruction by issuing a command (3) comprising an instruction code part (1) and a parameter part (2) added to the instruction code part (1). The parameter section (2) is provided with a determination flag (4) for determining whether or not the parameter section (2) following the parameter section (2) exists, and the predetermined same command is repeatedly executed a plurality of times. If you do
An instruction execution method comprising: issuing the instruction code section (1) once; and issuing the parameter section (2) a predetermined number of times based on the determination flag (4).