JP2932601B2 - Heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a heterojunction bipolar transistor (hereinafter, referred to as an HBT) which is operated at high speed by using hot electrons or hot holes.

<Prior Art> As a means for realizing a high-speed operation, a device in which a heterojunction bipolar transistor is formed on a compound semiconductor substrate by using a compound semiconductor matching the substrate is known.

The major factors that determine the speed of the bipolar transistor are the emitter charging time and the transit time during which electrons pass through the base and the collector. Reducing the time is important for increasing the speed of the bipolar transistor.

<Problems to be Solved by the Invention> However, in the conventional HBT, the base transit time and the collector transit time are determined by the drift speed of the electrons, and it has not been possible to bring out a sufficiently high speed.

Also, holes have lower mobility than electrons.
Npn-type HBTs are mainly manufactured
Devices that speed up the type HBT have not been realized.

The present invention has been made to solve the above-mentioned problems of the prior art. By devising a band structure and effectively using only hot electrons, an HB that operates at a higher speed can be realized.
The purpose is to realize T.

<Means for Solving the Problems> The configuration of the present invention for solving the above-mentioned problems of the prior art is as follows.
In a heterojunction bipolar transistor in which an emitter region, a base region, and a collector region are formed, the base is selected from hot electrons or hot holes having excess energy which are injected from the emitter into the base region and become electrons or holes. Forming a collector barrier layer between the base and the collector so as to prevent the electrons or holes scattered by the electrode from being crossed, and forming an electric field stop layer between the collector barrier and the collector. It is.

<Operation> Since the collector barrier layer is formed between the base and the collector, only the electrons and holes that have passed ballistically through the base part participate in the transistor operation and operate at an extremely high speed.

Further, by providing an electric field stop layer between the collector barrier and the collector, it is possible to prevent a decrease in the traveling speed of electrons or holes due to inter-valley scattering in the collector barrier when the collector bias is large.

<Example> FIG. 1 is a sectional view showing a laminated film structure showing an example of the HBT of the present invention. In the figure, 1 is InP substrate, 2 is thickness 500
0Å, n ⁺ InGaA formed to an impurity concentration of about 1 × 10 ¹⁹ cm ^-3
s collector layer, 3 is undoped I
Collector barrier layer made of nAl (Ga) As, 4 has a thickness of 250 to 10
Å, an impurity concentration 1 to 5 × 10 ¹⁹ approximately p ⁺ In (Ga) As layer, 5
Is InAl (G) with a thickness of 1500 mm and an impurity concentration of about 2 to 5 × 10 ^17.
a) The emitter layer 6 made of As is a contact layer of n ⁺ InGaAs having a thickness of 1500 mm and an impurity concentration of about 2 × 10 ¹⁹ . These layer thicknesses and impurity concentrations can be accurately laminated using an MBE apparatus. Reference numerals 7, 8 and 9 denote collector, base and emitter electrodes, respectively. Here, the InGaAs / InAlAs-based H
Although BT is shown, the same applies to AlGaAs / GaAs.

FIG. 2 shows a band diagram during the operation of the HBT. That is, when a positive voltage is applied to the base and the transistor is turned on, the electrons injected from the emitter 5 into the base region 4 have hot energy having excess energy corresponding to the band discontinuity between the emitter and the base. It is an electron. Of these, those that have passed through the base region without scattering enter the collector paria section and reach the collector section at an extremely high speed through this area. On the other hand, electrons scattered at the base cannot recede over the collector barrier and recombine at the base.

As a result, only electrons that have passed through the base / collector section ballistically participate in the transistor operation and operate at an extremely high speed. In the base with such a structure
If As is doped with impurities to a concentration of 5 × 10 ¹⁸ cm ⁻³ or more, the base is metallized and the base resistance is extremely reduced.

Note that when an InAs layer is used as a base, lattice distortion occurs. This lattice distortion can be avoided by making the base layer thinner than 250 °.

According to the above configuration, high-speed operation is realized because only hot electrons are involved in the operation of the device.

FIG. 3 shows a band diagram during operation when the HBT shown in FIG. 1 is of the pnp type. That is, when a positive voltage is applied to the base and the transistor is turned on, holes injected from the emitter into the base region become hot holes having excess energy corresponding to band discontinuity between the emitter and the base. Has become. Of these, the holes that have passed through the base region without scattering enter the collector paria portion and reach the collector portion very quickly through this region. On the other hand, holes scattered at the base cannot recede over the collector barrier and recombine at the base.

As a result, only the holes that have passed through the base / collector portion ballistically participate in the transistor operation, and operate at an extremely high speed. By the way, FIGS.
In the figure, when the collector bias is large, the speed decreases due to the inter-valley scattering caused by the collector barrier. FIG. 4 shows a state in which when the collector bias is large, electrons are subjected to Γ-L scattering many times in the collector barrier portion, so that the operation speed is reduced. Fifth
Figure (a) is composed of InGaAs between the collector barrier and the collector of the HBT shown in FIG. 1 n ^- layer, p layer, n ^- each thickness 100Å a layer, 20 Å, the field stop layer is formed to about 100Å FIG. 5 (b) is a band diagram showing the band diagram. In the case of this configuration, most of the voltage between the base and the collector is applied to the electric field stop layer, so that Γ-L scattering in the collector barrier portion is less likely to occur. As a result, a transistor with improved high-frequency characteristics can be realized.

This electric field stop layer is made of G in the case of AlGaAs / GaAs.
It is formed by an aAs layer.

<Effect of the Invention> According to the present invention, as specifically described above with the embodiment, a collector barrier layer is formed between the base and the collector of the HBT, and a collector barrier layer is further formed between the base and the collector. Since an electric field stop layer is formed between the collector barrier and the collector, ultra-high-speed operation becomes possible, and even when the collector bias is high, Γ-L scattering at the collector barrier is less likely to occur, resulting in improved high frequency characteristics. Transistor can be realized.

[Brief description of the drawings]

FIG. 1 is a sectional view of a laminated film structure showing an embodiment of the HBT (npn type) of the present invention, FIG. 2 is a diagram showing a band diagram of the HBT of FIG. 1 during operation, and FIG. Fig. 4 is a diagram showing the band diagram of the HBT of the present invention when the collector bias is large, and Fig. 5 (a) is a cross-sectional view of a main part of the HBT of the present invention provided with an electric field stop layer. FIG. 5 (b) is a diagram showing a band diagram when an electric field stop layer is provided. 1 ... substrate, 2 ... collector layer, 3 ... collector barrier layer, 4
... undoped layer, 5 ... emitter layer, 6 ... contact layer, 10 ... electric field stop layer.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiromi Kamada 2-9-132 Nakamachi, Musashino-shi, Tokyo Yokogawa Electric Corporation (72) Inventor Sadaharu Oka 2-9-132 Nakamachi, Musashino-shi, Tokyo Next to Inside Kawa Electric Co., Ltd. (72) Inventor Akira Miura 2-9-132 Nakamachi, Musashino-shi, Tokyo Yokogawa Electric Co., Ltd. (56) References JP-A-1-264261 (JP, A) JP-A 64-64 2359 (JP, A) JP-A-1-149465 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 29/68-29/737 H01L 21/33-21/331

Claims (2)

(57) [Claims] In a hetero-junction bipolar transistor having an emitter region, a base region and a collector region formed therein, hot electrons or hot holes having surplus energy injected from an emitter into a base region to become electrons or holes. A hetero-junction bipolar transistor, wherein a collector barrier layer is formed between the base and the collector so that the electrons or holes scattered by the base cannot cross over. 2. A heterojunction bipolar transistor comprising an emitter region, a base region, and a collector region, wherein hot electrons or hot holes having surplus energy, which are injected from the emitter into the base region and become electrons or holes, are provided. Among them, a collector barrier layer was formed between the base and the collector so that the electrons or holes scattered by the base could not get over, and an electric field stop layer was formed between the collector barrier layer and the collector A heterojunction bipolar transistor characterized by the above-mentioned.