JP2969671B2 - Programmable filter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A. Industrial application fields B. Summary of the invention C. Conventional technology D. Problems to be solved by the invention E. Means to solve the problems F. Function G. Embodiment G _1. Configuration of embodiment ( Figure 1, Figure 2, Figure 3) G _2. operation of the examples and working G _3. other embodiments and application examples (Figure 4, on the effects A. industrial of FIG. 5) H. invention BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable filter using an active filter and capable of setting a Q and a cutoff frequency in a programmable manner.

B. Summary of the Invention The present invention uses a current output type digital / analog converter as a reference current source of each active filter in a programmable filter that sets a Q and a cutoff frequency programmably using a plurality of active filters. By setting the current ratio in a programmable manner, the Q of the filter characteristic is set, and the common reference voltage line of each digital / analog converter is controlled by another digital / analog converter. By setting the magnitude of the product of these currents without setting it, and by setting the cutoff frequency of the filter characteristic independently of the setting of Q, the filter characteristics can be set arbitrarily and accurately. It is.

C. Prior Art Previously, the applicant of the present application disclosed in Japanese Patent Publication No. 61-55806,
An active filter having a constant current source and capable of determining a filter characteristic by a sink current of the constant current source has been proposed. FIG. 6 is an example of such a case, where Q ₁ is a transistor for connecting the input voltage _Vi , Q ₂ is a transistor for feeding back the output voltage v ₀ , Q ₃ and Q ₄ are current mirror circuits, and 11 is a transistor Q ₁ and Q These are constant current sources connected to the emitters ₂ and sinking a current 2I, and these constitute a transconductance amplifier 10. The output of the transconductance amplifier 10 connects the capacitor C to form an AC load connected to the transistor Q ₅ of the emitter follower connected to the constant current source 12, and takes out the output voltage v ₀ from the emitter. Here, when the emitter resistance of the transistor Q _1, Q ₂ and r _e, the transfer function of the active filter H (omega)
Is Becomes The transistors Q _1, Q _2, since I the current (reference current) flows through the current mirror circuit, between the emitter resistor r _e and the reference current I, k: Boltzmann's constant T: absolute temperature q: electron charge V _T : a constant determined by k, T, q holds.

In the above, since the reference current I can be set accurately, the circuit of FIG. 6 can be operated as a low-pass filter according to equation (1), and the cutoff angular frequency ω _c is ω _c = 1 / since it is 2Cr _e, it is possible to control the cut-off frequency by the magnitude of the current 2I of the reference current I i.e. the constant current source 11, to be capable to reduce the capacitor C built into the IC (integrated circuit) Become.

In general, the active filter is connected to the active filter shown in FIG.
A high-order filter circuit can be formed by connecting a plurality of integrators having a differential input configuration as shown in FIG. (A) Transfer function H of the integrator
(S) _{is, V T / I = r e} , than _{v i / 2r e × 1 /} sC = v 0, H (s) = v 0 / Vi = 1 / s2Cr e = ω c / s ... (3) , and the because the cutoff angular frequency omega _c proportional to _{ω c = 1 / 2r e C} = I / 2V T C ... (4) , and the reference current I, the current of the constant current source 11
It can be controlled by 2I. In the filter circuit of (b), 1 is a first integrator, 2 is a second integrator, and 2
A second-order low-pass filter is configured. The incoming voltage _Vi is the first
And the output of the first integrator 1 is connected to the non-inverting input terminal (+) of the second integrator 2.
And the output voltage v ₀ of the filter circuit is extracted from the output of the second integrator 2, and the output is connected to each inverting input terminal (−) of the first and second integrators 1 and 2. ing. Here, the first cut-off angular frequency of the integrator 1 and omega _1, when the second cut-off frequency of the integrator 2 and omega _2, each transfer function according to equation (3) is H ₁ (s) = ω ₁ / s,
H ₂ (s) = ω ₂ / s, and the transfer function H of this filter circuit
₀ (s) is And if expressed by the Q of the filter circuit and the cut-off angular frequency ω ₀ , Because Becomes Since ω ₁ and ω ₂ are proportional to the reference currents of the integrators ₁ and _{2 according} to the equation (4), if the respective reference currents are I ₁ and I ₂ , Becomes That is, the cutoff frequency (ω ₀ / 2π) can be determined by the magnitude of the product I ₁ · I ₂ of the reference current, and Q can be determined by the current ratio I ₁ / I ₂ of the reference current.

D. Problems to be Solved by the Invention However, in the filter circuit using a plurality of active filters (integrators) in the above-described conventional technology,
There is a problem to be solved in setting the filter characteristics, that is, the cutoff frequency and Q, in a programmable manner.

FIG. 8 shows a generally conceivable programmable setting circuit for the reference currents I ₁ and I ₂ , and shows four switching examples. Q ₆ and Q ₇ are transistors for forming the integrator current source 11 in FIG. 7A, respectively.
Transistor Q ₆ draws twice the reference current I ₁ of the first integrator 1 of Figure No. ₇ (b), Q 7 draws twice the reference current I ₂ of the second integrator 2. Q ₈ is a transistor Q _6, a transistor providing a base fixed reference voltage of Q _7, via the reference current source 12 and the collector and the base of the power supply line V
_While being connected to _CC, it is connected to the base of each of the transistors Q ₆ and Q ₇ , and the emitter is connected to the ₀ V line via the resistor R ₀ . Resistors R _A1 , R _B1 , R _C1 , and R _D1 for switching the reference current I ₁ are connected in parallel to the emitter of the transistor Q ₆ , and the respective resistors are switch elements S _A1 , S _B1 , S _C1 , and S _D1. Connected to the 0V line. Similarly, resistors for switching the reference current I ₂ to the emitter of the transistor Q ₇
R _A2 , R _B2 , R _C2 , and R _D2 are connected in parallel, and the respective resistors are connected to the 0 V line via switch elements S _A2 , S _B2 , S _C2 , and S _D2 . The input of the A mode is the switching elements S _A1 and S _A2
Closed, resistor R _A1, by selecting R _A2, the product of the reference current I ₁ · I
Set the magnitude of ₂ and the current ratio I ₁ / I ₂ to certain values. Similarly, the input of the B, C, and D modes switches the total of four resistance values in addition to the above, and enables the setting of four filter characteristics.

However, the above filter characteristic setting circuit has the following problems.

(1) Since the cutoff frequency (ω ₀ / 2π) and Q of the filter circuit move together in conjunction with the reference currents I ₁ and I ₂ , setting the constant is complicated and difficult.

(2) Since the collector currents of the transistors Q ₁ and Q ₂ change depending on the modes A, B, C and D, the base-emitter voltage V _{BE of} the transistors Q ₆ and Q ₇ changes, while the collector current of the transistor Q ₈ changes. Since the current _Iref of the reference current source 13 is constant, the setting of the reference currents I ₂ and I ₂ is difficult because the reference currents I ₂ and I ₂ are not accurately determined by the resistance ratio.

(3) Cutoff angular frequency ω ₀ and Q in a certain mode
However, if there is no need to change after setting, it is sufficient to set the current value customarily from the beginning, but then the cutoff angular frequency ω of mode A, B, C, D ₀ and Q are fixed. For example, to be able to select any omega ₀ and Q by minimal masking changes (by Al wiring, etc.), the resistance R _A1 to R _A2 needs to be varied over a wide range. In this case, a realizing means is to lay out a large number of small unit resistors and combine the unit resistors in series or parallel to create an arbitrary resistor.
If the number of patterns is four, as shown in FIG. Further, making the characteristics of a filter circuit having a complicated transfer function such as the third order or the fifth order variable also increases the range of the resistance value, and similarly, it is not practically feasible.

(4) The setting accuracy and temperature characteristics are poor due to errors in the emitter current densities of the transistors Q ₆ and Q ₇ forming the constant current source 11.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a programmable filter that enables the Q and the cutoff frequency of the filter characteristic to be set arbitrarily and accurately in a programmable manner and that enables monolithicization. The purpose is to provide.

E. Means for Solving the Problems The configuration of the programmable filter of the present invention for achieving the above object comprises a plurality of active filters having a reference current source connected in cascade, and an output of a predetermined active filter is set to a predetermined active level. A filter circuit that determines the filter characteristic Q from the current ratio of the reference current source of each active filter and determines the cutoff frequency of the filter characteristic from the magnitude of the product of the current of each reference current source. A current output type first digital / analog converter having a reference voltage line for controlling the magnitude of the current as each of the reference current sources, wherein the reference voltage lines of the digital / analog converters are shared. And a second digital / analog converter for controlling the reference voltage is connected to the reference voltage line. The current ratio is set while keeping the product of the currents of the reference current sources constant by setting the digital input of each of the first digital / analog converters, and the digital input of the second digital / analog converter is set. The magnitude of the product of the currents of the reference current sources is set by the setting of.

F. Function The present invention uses a current output type digital / analog converter as a reference current source of each active filter constituting a filter circuit, and sets a current ratio of the current output type digital / analog converter in a programmable manner to set a filter characteristic Q. And controlling the reference voltage of the common reference voltage line of each digital / analog converter by another digital / analog converter, and setting the magnitude of the product of those currents without changing the current ratio. By setting the cutoff frequency of the filter characteristic independently of the setting of Q, the characteristic of the filter can be arbitrarily set with high accuracy.

G. Examples Hereinafter, examples of the present invention will be described in detail with reference to the drawings.

G _1. Configuration of Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention.
Reference numeral 1 denotes a first integrator which is an active filter configured similarly to FIG. 7A, and 2 denotes a second integrator.
A second-order low-pass filter is formed by connecting in the same manner as in FIG. 7 (b). That is, the input voltage _Vi is connected to the non-inverting input terminal (+) of the first integrator 1, and the output of the first integrator 1 is connected to the non-inverting input terminal (+) of the second integrator 2. , The output voltage v ₀ of the filter circuit is extracted from the output of the second integrator 2, and the output v ₀ is connected to each inverting input terminal (−) of the first and second integrators 1 and 2. I have. Reference numerals 3, 4, and 5 denote 3-bit current output type digital / analog converters (hereinafter abbreviated as DACs) described later. DAC3 constitutes a reference current source of the first integrator 1, and DAC4 constitutes a second current source. DAC5 is a reference current source of the integrator 2, and DAC5 is the first DAC3 and DAC4.
Constituting a second DAC for controlling the reference voltage line V _B. DAC 3, DAC 4, the reference voltage line V _B of DAC5 are connected in common, connected to the output of the buffer amplifier 6. The DAC 5 is connected so that the digital data D ₀ is inputted, the reference current I _ref of the reference current source 7 connected to the power supply line V _CC is drawn in and supplied to the 0 V line, and the connection point of the reference current source 7 is connected to the buffer amplifier 6. Connect to the input of. DAC3 is digital data
Enter the D ₁ draw a current of 2I _1, given a reference current I ₁ to the first integrator 1, DAC 4 draws a current of 2I ₂ to input digital data D _2, the second integrator 2 Reference current I ₂
give.

FIG. 2 is a circuit diagram showing a specific example of a circuit portion of DACs 3, 4, and 5 in FIG. Since the DACs 3, 4, and 5 themselves have the same configuration, here, the circuit configuration of the DAC 3 will be described as a representative. Q ₁₀ , Q ₁₁ and Q ₁₂ are transistors forming a weighted current source corresponding to 3 bits, and each emitter has a resistor R for obtaining weighted currents 4I ₀ , 2I ₀ and I _0.
10, through R _11, R ₁₂ is connected to the 0V line. For example, assuming that R ₁₃ = R, their resistance values are set as R ₁₂ = R / 2 and R ₁₁ = R / 4. Each base of the transistors Q _10, Q _11, Q ₁₂ is connected to the reference voltage line V _B in common. Transistor
Differential pair of Q _13, Q ₁₄ is for turning on the current source (4I ₀₎ bits D ₁₀ of the digital data D ₁ of transistor Q _10, the differential pair transistors of the transistor Q _15, Q ₁₆ Set the current source (2I ₀ ) of Q ₁₁ to the bit of digital data D ₁
Turned on by the D _11, the differential pair of transistors Q _17, Q ₁₈ is used to turn on the bit D ₁₂ of the digital data D _1. Thus, the transistors Q _13, Q _15, Q each bit D _10, D ₁₁ of each of the respective base digital data D ₁ of the _17,
Connect the D _12, with the respective bases of the transistors Q _14, Q _16, Q ₁₈ connects the constant voltage source 14 of voltage V _r, the transistor
The emitters of Q ₁₃ and Q ₁₄ are the collector of transistor Q ₁₀ , the emitters of transistors Q ₁₅ and Q ₁₆ are the collector of transistor Q ₁₁ , and the emitters of transistors Q ₁₇ and Q ₁₈ are the transistor Q
Connect to ₁₂ collectors. The collectors of the transistors Q ₁₃ , Q ₁₅ , Q ₁₇ are connected in common, and the reference current of the first integrator 1 is
Connect to twice the current 2I ₁ pull terminals I _1, the collector of the transistor Q _14, Q _16, Q ₁₈ is pulled up to the current line. In the DAC 4, the bases of the transistors Q ₂₃ , Q ₂₅ and Q ₂₇ are connected to the respective bits D ₂₀ , D ₂₁ and D _{22 of the} digital data D _2.
It is connected to, except that their collectors are connected to the second double retraction terminal of the current 2I ₂ of the reference current I ₂ of the integrator 2, and the same as DAC 3. In the DAC 5, the bases of the transistors Q ₀₃ , Q ₀₅ , Q ₀₇ are connected to the respective bits D ₀₀ , D ₀₁ , D ₀₂ of the digital data D ₀ , and their collectors are connected to the current I _{ref of the} reference current source 12. It is configured the same as DAC3 except that it is connected to pull in

FIG. 3 shows digital data D ₀ , D ₁ ,
It is a circuit diagram of means for setting the D _2. This circuit example is
FIG. 8 shows a case where the cutoff frequency and Q of the filter circuit are switched in four ways as in the conventional example of FIG. In this circuit example, data corresponding to four types (modes A, B, C, and D) are prepared in advance in a ROM (read only memory), and one of the modes A, B, C, and D is designated. Then, the corresponding digital data D ₀ , D ₁ and D ₂ are read. ROM includes a one transistor column Q ₃₀ to Q ₃₈ for forming a differential pair corresponding to each bit of the digital data, transistor storing digital data bits D ₀₀ to D ₂₂ of mode A column 21
A transistor array 22 for storing digital data D _{00 to} D ₂₂ of mode B, and a digital data bit of mode C.
A transistor rows 23 for storing the D ₀₀ to D _22, the transistor rows 24 for storing digital data bits D ₀₀ to D ₂₂ of mode D, a current source 25 connected to the data line and 0V lines of each digital data, from ... Become. Each transistor row 21
Storing the settings of bits in the 24 is carried out without connecting / connected to the data lines D ₀₀ to D ₂₂ to the appropriate emitter of the transistor of each bit. The bases of the transistors are commonly connected to each of the transistor rows 21 to 24, and the collectors thereof are pulled up to the power supply line. Transistor array Q ₃₀ ~Q ₃₈
Emitters all connected to the data lines D ₀₀ to D _22, their bases gives a potential of V _r + V _BE -0.3 connected in common. V _r is a voltage of the constant voltage source 14 in Figure 2, the V _BE is the base-emitter voltage of the transistor D ₀₀ to D ₂₂ of the current source. For the inputs of modes A to D, the "H" (high) level is set to _Vr.
+ V _BE +0.3, and the digital data D ₀ (D ₀₀ , D ₀₁ , D ₀₂ ), of the transistor row in the mode given this “H” level
_{D 1 (D 10, D 11} , D 12), D 2 (D 20, D 21, D 22) is read.

G _2. Operation and Function of Embodiment The operation and function of the embodiment configured as described above will be described.

First, how to set the Q and the cut-off angular frequency omega ₀ representing the filter characteristic in the present embodiment. The filter circuit of the present embodiment is a second-order low-pass filter, has the transfer function of Expression (6) described in the related art, and has the function shown in Expression (8). It is. Here, the decimal values of the digital data D ₀ , D ₁ , and D ₂ input to the DACs 3, 4, and 5 are N ₀ , N ₁ , and N ₂ . DA in Fig. 2
When digital data D ₀ , D ₁ , and D ₂ are input to C ₃ , ₄ , and 5, a differential pair Q to which an “H” level bit (“1”) is given
_X3, Q _X4 (or Q _X5, Q _X6 or Q _X7, Q _X8, except _{X = 0, 1, 2)} are turned on are summed weighted binary is made current, the decimal N _0, N Attempts to draw a current proportional to ₁ , N ₂ . In the DAC 5, for example, when the digital data D ₀ “D ₀₀ , D ₀₁ , D ₀₂ ” is “1, 0, 0”, the output current is 4I ₀
, And the like becomes 4I ₀ = I _ref, is the possible voltage V _B of the reference voltage line is determined by the feedback via the buffer amplifier 6. In the above, the current I ₀ is I ₀ = {V _B −V _BE (I _C = I ₀ )} / R (9), and V _B −V _BE (I _C = I ₀ ) = V _B ′ Equation (9)
Is I ₀ = V _B ′ / R, and when V _B ′ is represented by I _ref , V _B ′ = I _ref
It becomes R / 4. In the above equation, V _B ′ is the transistor Q ₁₀ , Q ₁₁ , Q
_Twelve emitter potentials, V _BE (I _C = I ₀ ), have a collector current of I
_This is the base-emitter voltage when it is 0. Generally, when the value of the digital data D ₀ is N ₀ , V _B ′ = I _ref R / N ₀ (10), and V _B ′ is proportional to 1 / N ₀ . On the other hand, the output 2I ₁ of DAC3 is 2
Since I ₁ = N ₁ × V _B ′ / R, substituting equation (10) gives I ₁ = I _ref / 2 · N ₁ / N ₀ (11). For DAC4 in the same _{manner, I 2 = I ref / 2} · N 2 / N 0 ... (12) is derived. Substituting equations (11) and (12) into equation (8) gives Becomes That is, when these equations (13) and (14) are used to set N by changing N ₁ / N ₂ while keeping N ₁ × N ₂ constant,
The cutoff angular frequency ω ₀ can be set only by changing N ₀ , so that setting of the filter characteristics becomes extremely easy. DAC3 and DAC5 and DAC4 and DAC5 the reference voltage line V _B are connected in common, each of the current source transistor Q
The value of the base-emitter voltage V _BE of ₁₀ , ₁₀ , ₁₁ and ₁₂ is constant, and the reference current I _ref and the outputs 2I ₁ , 2I ₂ of each DAC ₃ , ₄ are the same as the current mirror circuit determined by the reference voltage V _B , And the accuracy is determined only by the ratio of the resistance value R, which is excellent. As described above, in the present embodiment, the DACs 3 and 4 serve as setting means for setting the Q of the filter characteristic, and the DAC 5 serves as setting means for setting the cutoff frequency independent of the setting means for the Q. Therefore, the resolution of the DAC obtained by setting the cutoff frequency is only DAC5.

G _3. Other Embodiments and Application Examples FIG. 4 is a block diagram showing an embodiment for a third-order filter of the present invention. This embodiment shows an example of a third-order low-pass filter. This embodiment is obtained by inputting the input voltage v _i through the active filter 8 to the first non-inverting input terminal of the integrator 1 (+) in the embodiment of Figure 1. The active filter 8 has a non-inverting input terminal (+) connected to an input voltage v _i.
Are connected to each other, and its own output is fed back to the inverting input terminal (-), and is configured in the same manner as in FIG. Reference numeral 9 denotes a DAC constituting a current source for drawing a current 2I ₃ twice as large as the reference current I ₃ of the active filter 8.
3,4,5 and similarly configured, with the base of the transistor of the current source is connected to the reference voltage V _B line in common with each DAC3,4,5, inputs the digital data D _3. As types of filters, filters with names such as Chebyshev 1 dB ripple, Butterworth, and Bessel are known. To change only Q without changing the cutoff angular frequency ω ₀ of these filter characteristics, for example, see Table 1. The digital data D ₁ , D ₂ , and D ₃ of DACs ₃ , ₄ , and ₅ having the indicated coefficients are set. Then, by setting the cutoff angular frequency omega ₀ by DAC 5, any filter characteristics can be realized.

FIG. 5 is a block diagram showing an application example of a recording signal of a floppy disk drive (FDD) of the present invention to a reproducing circuit. Numeral 31 denotes a reproducing head for reproducing the recording signal of the floppy disk, and numeral 32 denotes a preamplifier for amplifying the reproduced signal (reproduced signal). The amplified reproduction signal is subjected to a differentiation process through a third-order low-pass filter 33 and a second-order band-pass filter. The differentiated reproduction signal is input to a comparator 35, where the reference voltage source
The digital signal is converted into a digital signal by performing threshold processing with the reference voltage of 36, and is input to the signal processing circuit 37, from which read data is output. In the above, if the third-order low-pass filter 33 and the second-order band-pass filter are configured in the above-described embodiment, and the mode of the filter characteristics is configured to be changed by designating an external switch, the FD
Even if the frequency characteristics change depending on the type of D (for example, 3.5 inch 1 MB, 3.5 inch 2 MB, 5.25 inch 1 MB, 5.25 inch 1.6 byte, etc.)
Accordingly, it is possible to easily change the filter characteristics in a programmable manner.

As described above, the present invention can be variously applied according to the gist thereof and can take various embodiments.

H. Effects of the Invention As is clear from the above description, according to the programmable filter of the present invention, the magnitude of the product of the current ratio and the current of the current source of the active filter for setting the Q and the cutoff frequency of the filter characteristic, respectively, Can be changed independently by a digital / analog converter, so that the Q and cutoff frequency can be accurately set, the setting thereof can be made extremely easy, and the circuit can be monolithically programmed. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a specific example of a circuit portion of the digital / analog converter of this embodiment, and FIG. FIG. 4 is a circuit diagram of a means for setting digital data, FIG. 4 is a block diagram showing an embodiment of a third-order filter of the present invention, FIG. 5 is a block diagram showing an application example of the present invention,
FIG. 6 is a block diagram of a conventional active filter, FIGS. 7 (a) and 7 (b) are conventional filter circuits composed of a plurality of active filters, and FIG. 8 is a generally set filter characteristic setting circuit. is there. 1 ... first integrator (active filter), 2 ... second integrator (active filter), 3,4 ... first digital / analog converter, 5 ... second digital /
Analog converter.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H03H 11/04-11/14

Claims (1)

(57) [Claims] An active filter having a reference current source is connected in cascade and an output of a predetermined active filter is fed back to a predetermined active filter. Filter characteristics of each active filter are determined based on a current ratio of the reference current source. A filter circuit for determining Q and determining a cutoff frequency of a filter characteristic from a magnitude of a product of currents of the respective reference current sources; and a reference voltage line for controlling the magnitude of the current as each of the reference current sources. Current output type first digital /
An analog converter is used, a reference voltage line of each of the digital / analog converters is commonly connected, and a second digital / analog converter for controlling the reference voltage is connected to the reference voltage line. By setting the digital input of the first digital / analog converter, the current ratio is set while keeping the product of the currents of the reference current sources constant, and the digital input of the second digital / analog converter is set. A programmable filter, wherein a magnitude of a product of currents of respective reference current sources is set.