JP2969830B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A semiconductor device having an aluminum wiring connected to a silicon substrate, particularly for preventing an increase in contact resistance and destruction of a shallow diffusion region due to solid solution between the silicon substrate and the aluminum wiring. An insulating layer having an opening exposing a connection region defined on one surface of a silicon substrate is formed on the barrier layer for the purpose of preventing occurrence of insulation failure or the like due to peeling of the barrier layer. Selectively growing a contact metal layer on the surface of the silicon substrate exposed in the opening; and forming a barrier layer forming layer reacting with the contact metal layer to form a barrier layer with the barrier layer forming layer and the contact metal. A vapor-phase growth is performed on the entire surface of the substrate at a temperature at which the layer reacts, and a conductive layer containing aluminum as a main component is formed on the surface of the substrate on which the barrier layer forming layer has grown. Configured to include various steps of the product.

[Industrial applications]

The present invention relates to a semiconductor device having an aluminum wiring connected to a silicon substrate.

[Conventional technology]

Aluminum is the main wiring material in semiconductor devices, but on the other hand, because it easily forms a solid solution with silicon, silicon atoms diffuse from the silicon substrate to the aluminum wiring layer, and the impurity diffusion region formed on the silicon substrate is destroyed. Or the solid solution of silicon increases the resistance of the aluminum wiring layer. This problem becomes more conspicuous as the impurity diffusion region becomes shallower and the contact area with aluminum decreases as the speed and integration of the semiconductor device increase. Therefore, when aluminum wiring is connected to a silicon substrate or silicon layer, a barrier layer for preventing interdiffusion is generally interposed between these contact interfaces.

[Problems to be solved by the invention]

Various proposals have been made for the structure and constituent materials of the contact portion between the silicon substrate and the aluminum wiring, including the barrier layer. As a typical example, a contact metal layer made of, for example, tungsten (W) is formed on the surface of a silicon substrate, and a barrier layer made of titanium (Ti) or a titanium-tungsten (Ti-W) alloy is formed thereon. ,
There is a three-layer structure in which an aluminum wiring layer is formed on this barrier layer.

That is, as shown in FIG. 3, an interlayer insulating layer 3 having an opening exposing the impurity diffusion region 2 is formed on the silicon substrate 1 on which the impurity diffusion region 2 is formed. In this opening, a contact metal layer 4 made of tungsten (W) is formed utilizing the selective growth between the surface of the silicon substrate and the surface of the interlayer insulating layer 3 such as SiO ₂ . On the interlayer insulating layer 3, a barrier layer 5 made of a Ti-W alloy and an aluminum wiring layer 6 are formed. The aluminum wiring layer 6 connected to the impurity diffusion region 2 in this manner is made of, for example, an aluminum-copper (Al-Cu) alloy and is patterned together with the barrier layer 5.

However, the barrier layer 5 made of Ti—W has a low adhesion to the interlayer insulating layer 3 made of SiO ₂ , and a large internal stress is easily generated. As a result, the barrier layer 5 peeled off from the interlayer insulating layer 3 becomes a contaminant and causes insulation failure in various modes.

Further, as shown in FIG. 3, a step corresponding to the opening of the interlayer insulating layer 3 was formed on the upper surface of the aluminum wiring layer 6. This is because not only the step of the interlayer insulating layer 3 exists in the opening, but also the aspect ratio (height / height) of the opening.
This is because as the width ratio increases, the coverage of the barrier layer 5 and the aluminum wiring layer 6 in the opening becomes insufficient. It is well known that, as a semiconductor device is miniaturized and has a multilayer structure, a surface step, that is, unevenness causes an unfavorable effect.

In the present invention, Ti-
It is an object of the present invention to form a barrier layer made of W, and at the same time, to form an aluminum wiring layer having a smooth upper surface without steps.

[Means for solving the problem]

The above object is to form an insulating layer having an opening exposing a connection region defined on one surface of a silicon substrate;
Selectively growing a contact metal layer on the surface of the silicon substrate exposed in the opening; and forming a barrier layer forming layer which reacts with the contact metal layer to form a barrier layer with the barrier layer forming layer and the contact. A step of vapor-phase growing the entire surface of the substrate at a temperature at which the metal layer reacts; and a step of depositing a conductive layer containing aluminum as a main component on the surface of the substrate on which the barrier layer forming layer has grown. This is achieved by a method of manufacturing a semiconductor device according to the present invention.

(Operation)

On the surface of the silicon substrate exposed in the contact hole,
As a contact metal layer, for example, tungsten (W)
After selective growth of, for example, titanium (Ti) is deposited on the surface of the silicon substrate by sputtering while the silicon substrate is heated to about 800 ° C. As a result, the following advantages arise.

At the above high temperatures, the activity of Ti atoms is large and the adhesion to the surface of the interlayer insulating layer composed of SiO ₂ increases, so that T
The i-layer does not peel off.

Since the migration of Ti atoms on the surface of the interlayer insulating layer 3 such as SiO ₂ becomes easy, the contact holes are almost filled with the Ti layer.

At the interface between the Ti layer and the W contact metal layer, Ti-
A W alloy layer is generated. This Ti-W layer functions as a barrier layer.

As the contact hole is filled with the Ti layer as described above, no step is formed on the upper surface of the aluminum wiring layer formed on the flattened silicon substrate surface.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same parts as those in the already-described drawings are denoted by the same reference numerals.

Figure 1 is a process explanatory view of an embodiment of the present invention, as shown in FIG. 6 (a), the thickness of 1μ to the silicon substrate 1 surface impurity diffusion region 2 is formed, for example, made of SiO ₂
An interlayer insulating layer 3 having a thickness of m is deposited, and an opening 31 exposing the impurity diffusion region 2 is formed in the interlayer insulating layer 3 by using a well-known lithographic technique.

Next, as shown in FIG. 2B, a contact metal layer 4 made of W and having a thickness of 100 to 200 ° is selectively formed on the surface of the silicon substrate 1 exposed in the opening 31. This formation is
This is performed by a known CVD method using F ₆ (tungsten hexafluoride) gas. The W layer grows on the surface of the silicon substrate 1 but does not grow on the surface of the interlayer insulating layer 3 made of SiO ₂ or the like.
The W contact metal layer 4 is formed with the silicon substrate 1 and described later.
It is provided to reduce the contact resistance with the Ti layer 8, and does not function as a barrier layer.

Next, the silicon substrate 1 is mounted in a sputtering apparatus, and heated to 800 ° C. by, for example, irradiating infrared rays from the back. In this state, sputtering the Ti target
As shown in FIG. 1C, a Ti layer 8 having a thickness of about 1000 ° is deposited on the surface of the silicon substrate 1. The inside of the opening 31 is almost buried with the Ti layer 8, and the upper surface of the Ti layer 8 becomes almost flat. At the above temperature, an alloying reaction occurs at the interface between the contact metal layer 4 made of W and the Ti layer 8, and Ti-W
A barrier layer 5 consisting of That is, the Ti layer 8 alone does not function as a barrier layer.
The -W barrier layer 5 is required. The Ti layer 8 has a large adhesion to the interlayer insulating layer 3 made of SiO _2, and does not cause peeling unlike the conventional case where the barrier layer 5 made of Ti—W is deposited on the interlayer insulating layer 3.

Next, as shown in FIG. 1D, an aluminum wiring layer 6 containing copper (Cu) is deposited on the surface of the silicon substrate 1. Since the surface of the underlying Ti layer 8 is flattened, the aluminum wiring layer 6 having a flat upper surface is formed.

In forming the Ti layer 8, a bias sputtering method as shown in FIG. 2 is preferable. That is, a DC negative voltage (-DC) of about 600 V is applied to the electrode on which the titanium target 11 is mounted, and a high-frequency bias voltage (RF) is applied to the electrode on which the silicon substrate 1 is mounted to perform sputtering. With this high frequency bias voltage, the silicon substrate 1
Since sputtering with weak surface and deposition of Ti occur alternately, Ti grows on a clean surface, and the adhesion of the Ti layer 8 to the surface of the interlayer insulating layer 3 increases. Further, due to the loss of the high frequency bias voltage, the heating of the silicon substrate 1 is enhanced, so that the adhesion of the Ti layer to the interlayer insulating layer 3 is improved and the migration of Ti atoms is promoted.

The conventional formation of the barrier layer 5 made of Ti-W is performed by the DC sputtering method, and the silicon substrate 1 is not heated. Therefore, since the barrier layer 5 made of Ti or Ti—W is deposited on the surface of the substrate at a relatively low temperature, the adhesion of the barrier layer 5 to the surface of the interlayer insulating layer 3 is low, and migration of Ti atoms and the like does not occur. Because of the small size, the effect that the opening 31 is buried by the barrier layer 5 as in the present invention did not occur.

〔The invention's effect〕

According to the present invention, in the manufacture of a semiconductor device having an aluminum wiring layer connected to a silicon substrate, insulation failure due to peeling of a barrier layer from the surface of an interlayer insulating layer is reduced, and a conductive film is formed in a contact hole. Since the semiconductor device is buried by the layer, disconnection and destruction of the impurity diffusion region due to poor coverage can be avoided, and the production yield of this type of semiconductor device can be improved. Further, since an aluminum wiring layer having a flat upper surface can be formed, there is an effect that it is easy to miniaturize a pattern required for a semiconductor device with high performance and high integration.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a process in an embodiment of the present invention, FIG. 2 is an explanatory view of a sputtering method suitable for carrying out the present invention, and FIG. 3 is an explanatory view of a conventional problem. In the figure, 1 is a silicon substrate, 2 is an impurity diffusion region, 3 is an interlayer insulating layer, 4 is a contact metal layer, 5 is a barrier layer, 6 is an aluminum wiring layer, 8 is a Ti layer, 11 is a titanium target, and 31 is an opening. It is.

Claims (2)

(57) [Claims] A step of forming an insulating layer having an opening exposing a connection region defined on one surface of a silicon substrate; and selectively forming a contact metal layer on the surface of the silicon substrate exposing in the opening. Growing a barrier layer forming layer that reacts with the contact metal layer to form a barrier layer over the entire surface of the substrate at a temperature at which the barrier layer forming layer and the contact metal layer react with each other; Depositing a conductive layer containing aluminum as a main component on the surface of the substrate on which the barrier layer formation layer has been grown. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the vapor phase growth of the barrier layer forming layer is performed by a DC sputtering method applying a high frequency bias.