JP3021582B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP3021582B2 JP3021582B2 JP2232963A JP23296390A JP3021582B2 JP 3021582 B2 JP3021582 B2 JP 3021582B2 JP 2232963 A JP2232963 A JP 2232963A JP 23296390 A JP23296390 A JP 23296390A JP 3021582 B2 JP3021582 B2 JP 3021582B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- adhesive
- semiconductor element
- substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
- Optical Integrated Circuits (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、半導体装置に係り、さらに詳しくは、光信
号を用いて信号の入出力を行う半導体装置の実装構造に
関するものである。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a mounting structure of a semiconductor device that inputs and outputs a signal using an optical signal.
［従来の技術］ 半導体素子を基板上に実装するに当たっては、 多くの方式がある。従来行なわれている最も一般的な実
装構造として、ワイヤーボンディング方式がある。[Prior Art] There are many methods for mounting a semiconductor element on a substrate. The most common mounting structure conventionally performed is a wire bonding method.
第２図は、ワイヤーボンディング方式の断面図であ
る。図において、10は、半導体素子で、11はその能動面
に形成された電極、12は基板15上に形成された配線パタ
ーンであり、13は電極11と配線パターン12を電気的に接
続するために設けられた金ワイヤーであり、14は半導体
素子10を基板15上に固定するための接着剤である。FIG. 2 is a sectional view of the wire bonding method. In the figure, 10 is a semiconductor element, 11 is an electrode formed on its active surface, 12 is a wiring pattern formed on a substrate 15, and 13 is for electrically connecting the electrode 11 and the wiring pattern 12. Is an adhesive for fixing the semiconductor element 10 on the substrate 15.
次に、上記の半導体装置を構成するプロセスを説明す
る。まず、基板15上に金属皮膜を形成する。これを半導
体素子10の電極11と対応した形にエッチングし、配線パ
ターン12を形成する。半導体素子10は、接着剤14によっ
て基板15上に接着され、容易に動かないよう固定され
る。固定された半導体素子10上の電極11と基板15上の配
線パターン12とを20〜30μｍの金ワイヤー13を用いて接
続を行ない電気的導通が可能となる。Next, a process for configuring the above semiconductor device will be described. First, a metal film is formed on the substrate 15. This is etched into a shape corresponding to the electrode 11 of the semiconductor element 10 to form a wiring pattern 12. The semiconductor element 10 is adhered on a substrate 15 by an adhesive 14, and is fixed so as not to move easily. The electrode 11 on the fixed semiconductor element 10 and the wiring pattern 12 on the substrate 15 are connected to each other using the gold wire 13 of 20 to 30 μm, thereby enabling electrical conduction.
［発明が解決しようとする課題］ 上記ワイヤーボンディング方式に代表されるような電
気的接続を行なう構造の半導体装置においては、次のよ
うな課題を有する。[Problem to be Solved by the Invention] A semiconductor device having a structure for making an electrical connection as represented by the wire bonding method has the following problems.
（１）電気的接続であるため、電極間のギャップが狭く
なるにつれ接続抵抗が増加し、半導体素子の正常な機能
を阻害する。(1) Because of the electrical connection, as the gap between the electrodes becomes narrower, the connection resistance increases and the normal function of the semiconductor element is hindered.
（２）電気信号であるため、電送できる情報量が少なく
半導体装置の情報処理能力の向上を望めない。(2) Since it is an electric signal, the amount of information that can be transmitted is small, and it is not possible to expect an improvement in information processing capability of the semiconductor device.
（３）電気抵抗を小さく抑えるためには、接続配線の太
さを太くしなければならず、微細ピッチの接続が困難で
ある。(3) In order to reduce the electric resistance, the thickness of the connection wiring must be increased, and it is difficult to connect at a fine pitch.
本発明は、上記の課題を解決すべくなされたもので、
半導体装置の情報処理能力を向上させ、なおかつ微細ピ
ッチでの接続を可能とする半導体装置を得ることを目的
としたものである。The present invention has been made to solve the above problems,
It is an object of the present invention to improve the information processing capability of a semiconductor device and to obtain a semiconductor device capable of connecting at a fine pitch.
［課題を解決するための手段］ 本発明の半導体装置は、半導体素子の能動面と基板と
が相対向した状態で電気的に接続された半導体装置であ
って、 前記半導体素子の前記能動面には受光素子で形成され
た入力端子及び発光素子で形成された出力端子をそれぞ
れ有し、 前記基板において、前記半導体素子の前記入力端子及
び前記出力端子に対応する位置を含んで光導波路がそれ
ぞれ設けられ、 前記半導体素子と前記基板とは接着剤にて接続される
とともに、前記接着剤中には透光性の樹脂ボールが一様
に分散され、前記樹脂ボールが少なくとも前記入力端子
及び前記出力端子と前記光導波路との間に介在してなる
ことを特徴とする。[Means for Solving the Problems] A semiconductor device according to the present invention is a semiconductor device in which an active surface of a semiconductor element and a substrate are electrically connected in a state of being opposed to each other. Has an input terminal formed of a light-receiving element and an output terminal formed of a light-emitting element, respectively, and an optical waveguide is provided on the substrate including a position corresponding to the input terminal and the output terminal of the semiconductor element. The semiconductor element and the substrate are connected by an adhesive, and a light-transmitting resin ball is uniformly dispersed in the adhesive, and the resin ball is at least the input terminal and the output terminal. And the optical waveguide.
また、半導体素子の能動面と基板とが相対向した状態
で電気的に接続された半導体装置であって、 前記半導体素子の前記能動面には受光素子で形成され
た入力端子及び発光素子で形成された出力端子をそれぞ
れ有し、 前記基板において、前記半導体素子の前記入力端子に
対応する位置には配線パターンに接続された発光素子
が、並びに前記半導体素子の前記出力端子に対応する位
置には配線パターンに接続された受光素子がそれぞれ設
けられ、 前記半導体素子と前記基板とは接着剤にて接続される
とともに、前記接着剤中には透光性の樹脂ボールが一様
に分散され、前記樹脂ボールが少なくとも前記半導体素
子の前記入力端子と前記配線パターンに接続された発光
素子との間、並びに前記半導体素子の前記出力端子と前
記配線パターンに接続された受光素子との間、に介在し
てなることを特徴とする。A semiconductor device in which an active surface of a semiconductor element and a substrate are electrically connected in a state of being opposed to each other, wherein the active surface of the semiconductor element is formed by an input terminal formed by a light receiving element and a light emitting element. A light emitting element connected to a wiring pattern at a position corresponding to the input terminal of the semiconductor element, and at a position corresponding to the output terminal of the semiconductor element on the substrate. A light-receiving element connected to a wiring pattern is provided, and the semiconductor element and the substrate are connected with an adhesive, and a light-transmitting resin ball is uniformly dispersed in the adhesive. A resin ball contacts at least between the input terminal of the semiconductor element and the light emitting element connected to the wiring pattern, and between the output terminal of the semiconductor element and the wiring pattern. And characterized by being interposed between, on the light-receiving element.
［作用］ 本発明の作用を説明すると、光導波路８を伝わってき
た光信号は、樹脂ボール９に入射し、樹脂ボール９中を
伝搬して対向している受光素子2aに到達する。受光素子
2aに伝搬した光信号は電気信号に変換され、半導体素子
１で処理される。処理された電気信号は、発光素子2bで
光信号に変換され、樹脂ボール９に入射する。入射した
光信号は樹脂ボール９中を伝搬し、光導波路８に到達す
る。[Operation] To explain the operation of the present invention, an optical signal transmitted through the optical waveguide 8 enters the resin ball 9 and propagates through the resin ball 9 to reach the opposing light receiving element 2a. Light receiving element
The optical signal propagated to 2a is converted into an electric signal and processed by the semiconductor device 1. The processed electric signal is converted into an optical signal by the light emitting element 2 b and enters the resin ball 9. The incident optical signal propagates through the resin ball 9 and reaches the optical waveguide 8.
［実施例］ 以下、実施例により本発明の詳細を示す。EXAMPLES Hereinafter, the present invention will be described in detail with reference to examples.
第１図は、本発明の一実施例を示す半導体装置の断面
図であり、１は半導体素子、2aは受光素子、2bは発光素
子、６は基板、７は接着剤、８は光導波路、９は樹脂ボ
ールである。FIG. 1 is a sectional view of a semiconductor device showing one embodiment of the present invention, wherein 1 is a semiconductor element, 2a is a light receiving element, 2b is a light emitting element, 6 is a substrate, 7 is an adhesive, 8 is an optical waveguide, 9 is a resin ball.
まず、セラミック性の基板６上に半導体素子１上の受
光素子2aおよび発光素子2bと対応する形にSiO2系光導波
路８を形成する。基板６として、ガラスエポキシ基板、
ガラス基板、ポリイミド基板、等を用いてもよい。光導
波路８として、LiNbO3光導波路、Al2O3光導波路、等を
使用してもよい。First, an SiO 2 optical waveguide 8 is formed on a ceramic substrate 6 so as to correspond to the light receiving element 2 a and the light emitting element 2 b on the semiconductor element 1. As the substrate 6, a glass epoxy substrate,
A glass substrate, a polyimide substrate, or the like may be used. As the optical waveguide 8, a LiNbO 3 optical waveguide, an Al 2 O 3 optical waveguide, or the like may be used.
つぎに、濃厚な色素を含んだエポキシ系接着剤７中に
８μｍの平均直径をもつ樹脂ボール９を約10体積％混入
し、約５分間混練する事で樹脂ボール９を接着剤７中に
一様に分散させる。この時使用した樹脂ボール９は、ア
クリル系樹脂で出来ており、その屈折率は、1.54であっ
た。この接着剤７を基板６上に塗布した後、半導体素子
１の発光素子2bおよび受光素子2aと基板６上の光導波路
８とを位置合わせを行なった後、半導体素子１を約3kg/
cm2の圧力で加圧しかつ、180℃に加熱し10秒間硬化させ
半導体素子１を基板６上に圧着固定する。接着剤７は、
樹脂ボール９中で全反射せずもれ出した光を吸収するた
め濃厚な着色を施してある。また、接着剤７の屈折率は
1.4以下である。接着剤７として、屈折率が1.5未満であ
れば、熱硬化性樹脂、熱可塑性樹脂、常温硬化性樹脂、
嫌気性樹脂、光硬化性樹脂、電子線硬化性樹脂、紫外線
硬化性樹脂、等の接着剤を使用してもよい。Next, about 10% by volume of a resin ball 9 having an average diameter of 8 μm is mixed into the epoxy adhesive 7 containing a thick pigment, and the mixture is kneaded for about 5 minutes, so that the resin ball 9 is added to the adhesive 7. Disperse as The resin ball 9 used at this time was made of an acrylic resin and had a refractive index of 1.54. After the adhesive 7 is applied on the substrate 6, the light emitting element 2b and the light receiving element 2a of the semiconductor element 1 are aligned with the optical waveguide 8 on the substrate 6, and then the semiconductor element 1 is weighed at about 3 kg / kg.
The semiconductor element 1 is pressurized with a pressure of cm 2 , heated to 180 ° C. and cured for 10 seconds, and the semiconductor element 1 is fixed on the substrate 6 by pressure bonding. The adhesive 7
In order to absorb the light that has leaked out without being totally reflected in the resin ball 9, the resin ball 9 is densely colored. The refractive index of the adhesive 7 is
1.4 or less. If the refractive index of the adhesive 7 is less than 1.5, a thermosetting resin, a thermoplastic resin, a room temperature curable resin,
An adhesive such as an anaerobic resin, a photocurable resin, an electron beam curable resin, or an ultraviolet curable resin may be used.
この様にして、第１図に示したような半導体装置を作
成した。Thus, a semiconductor device as shown in FIG. 1 was produced.
この構造を持つ半導体装置では、光導波路８を伝わっ
てきた光信号は、一部は接着剤７中に入射するため、接
着剤中で吸収され損失となる。樹脂ボール９に入射した
光信号は、屈折率の高い樹脂ボール９と屈折率の低い接
着剤の境界面で全反射を行いながら樹脂ボール９中を伝
搬し、対向している受光素子2aに到達する。また、発光
素子2bから発した光信号も同様に樹脂ボール９中を伝搬
し、光導波路８に到達する。In the semiconductor device having this structure, a part of the optical signal transmitted through the optical waveguide 8 enters the adhesive 7 and is absorbed in the adhesive, resulting in a loss. The optical signal incident on the resin ball 9 propagates through the resin ball 9 while undergoing total reflection at the interface between the resin ball 9 having a high refractive index and the adhesive having a low refractive index, and reaches the opposing light receiving element 2a. I do. Similarly, an optical signal emitted from the light emitting element 2b propagates through the resin ball 9 and reaches the optical waveguide 8.
なお、上記の実施例においては、基板上に光導波路を
設ける代わりに、半導体素子の受光素子に対応する位置
に配線パターンに接続された発光素子を設け、半導体素
子の発光素子に対応する位置に配線パターンに接続され
た受光素子を設けるものとしても良い。In the above embodiment, instead of providing an optical waveguide on the substrate, a light emitting element connected to the wiring pattern is provided at a position corresponding to the light receiving element of the semiconductor element, and at a position corresponding to the light emitting element of the semiconductor element. A light receiving element connected to the wiring pattern may be provided.
［発明の効果］ 以上の説明から明らかなように、本発明は、基板上の
光導波路と半導体素子上の発光素子あるいは受光素子と
を、樹脂ボールを介して光学的に接続することを可能と
するものである。このように光学的に接続された半導体
装置では、情報伝達量が電気信号にくらべ格段に高い光
信号を用いることにより、情報処理能力が飛躍的に増
す。また、接続ピッチが狭くなり配線パターンや接続部
が狭くなった場合でも、電送する信号の劣化は生じ難
く、微細ピッチの接続が可能となる。[Effects of the Invention] As is clear from the above description, the present invention makes it possible to optically connect an optical waveguide on a substrate and a light emitting element or a light receiving element on a semiconductor element via a resin ball. Is what you do. In the semiconductor device optically connected in this way, by using an optical signal whose information transmission amount is much higher than that of an electric signal, the information processing ability is dramatically increased. Further, even when the connection pitch is narrowed and the wiring pattern and the connection portion are narrowed, deterioration of a signal to be transmitted hardly occurs, and connection at a fine pitch is possible.
第１図は、本発明における半導体装置の一実施例を示し
た断面図である。 第２図は、従来例を示した断面図である。 1:半導体素子、2a:受光素子、2b:発光素子、6:基板、7:
接着剤、8:光導波路、9:樹脂ボール、10:半導体素子、1
1:電極、12:配線パターン、13:金ワイヤー、14:接着
剤、15:基板FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to the present invention. FIG. 2 is a cross-sectional view showing a conventional example. 1: semiconductor element, 2a: light receiving element, 2b: light emitting element, 6: substrate, 7:
Adhesive, 8: Optical waveguide, 9: Resin ball, 10: Semiconductor element, 1
1: electrode, 12: wiring pattern, 13: gold wire, 14: adhesive, 15: board
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 31/12 H01L 33/00 G02B 6/12 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 31/12 H01L 33/00 G02B 6/12
Claims (6)
状態で電気的に接続された半導体装置であって、 前記半導体素子の前記能動面には受光素子で形成された
入力端子及び発光素子で形成された出力端子をそれぞれ
有し、 前記基板において、前記半導体素子の前記入力端子及び
前記出力端子に対応する位置を含んで光導波路がそれぞ
れ設けられ、 前記半導体素子と前記基板とは接着剤にて接続されると
ともに、前記接着剤中には透光性の樹脂ボールが一様に
分散され、前記樹脂ボールが少なくとも前記入力端子及
び前記出力端子と前記光導波路との間に介在してなるこ
とを特徴とする半導体装置。1. A semiconductor device in which an active surface of a semiconductor element and a substrate are electrically connected in a state of being opposed to each other, wherein the active surface of the semiconductor element has an input terminal formed of a light receiving element and a light emitting element. An optical waveguide is provided on the substrate including a position corresponding to the input terminal and the output terminal of the semiconductor element, and the semiconductor element and the substrate are bonded to each other; While being connected by an agent, a transparent resin ball is uniformly dispersed in the adhesive, and the resin ball is interposed at least between the input terminal and the output terminal and the optical waveguide. A semiconductor device, comprising:
状態で電気的に接続された半導体装置であって、 前記半導体素子の前記能動面には受光素子で形成された
入力端子及び発光素子で形成された出力端子をそれぞれ
有し、 前記基板において、前記半導体素子の前記入力端子に対
応する位置には配線パターンに接続された発光素子が、
並びに前記半導体素子の前記出力端子に対応する位置に
は配線パターンに接続された受光素子がそれぞれ設けら
れ、 前記半導体素子と前記基板とは接着剤にて接続されると
ともに、前記接着剤中には透光性の樹脂ボールが一様に
分散され、前記樹脂ボールが少なくとも前記半導体素子
の前記入力端子と前記配線パターンに接続された発光素
子との間、並びに前記半導体素子の前記出力端子と前記
配線パターンに接続された受光素子との間、に介在して
なることを特徴とする半導体装置。2. A semiconductor device in which an active surface of a semiconductor element and a substrate are electrically connected in a state of being opposed to each other, wherein the active surface of the semiconductor element has an input terminal formed of a light receiving element and a light emitting element. A light emitting element connected to a wiring pattern at a position on the substrate corresponding to the input terminal of the semiconductor element;
A light receiving element connected to a wiring pattern is provided at a position corresponding to the output terminal of the semiconductor element, and the semiconductor element and the substrate are connected with an adhesive, and in the adhesive, Transparent resin balls are uniformly dispersed, and the resin balls are at least between the input terminal of the semiconductor element and the light emitting element connected to the wiring pattern, and the output terminal of the semiconductor element and the wiring A semiconductor device interposed between a light receiving element connected to a pattern.
対して約10体積％混入されてなることを特徴とする請求
項１または請求項２項に記載の半導体装置。3. The semiconductor device according to claim 1, wherein the resin balls are mixed at about 10% by volume with respect to the total volume of the adhesive.
材からなることを特徴とする請求項１乃至３項に記載の
半導体装置。4. The semiconductor device according to claim 1, wherein said resin ball is made of a member having a refractive index of 1.5 or more.
りも小さい値の屈折率からなる部材を用いてなることを
特徴とする請求項４項に記載の半導体装置。5. The semiconductor device according to claim 4, wherein said adhesive is made of a member having a refractive index smaller than that of said resin ball.
らなることを特徴とする請求項５項に記載の半導体装
置。 前記接着剤には色素が混入されてなることを特徴とする
請求項１乃至６項に記載の半導体装置。6. The semiconductor device according to claim 5, wherein said adhesive is made of a member having a refractive index of less than 1.5. 7. The semiconductor device according to claim 1, wherein a dye is mixed in the adhesive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2232963A JP3021582B2 (en) | 1990-09-03 | 1990-09-03 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2232963A JP3021582B2 (en) | 1990-09-03 | 1990-09-03 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04113675A JPH04113675A (en) | 1992-04-15 |
| JP3021582B2 true JP3021582B2 (en) | 2000-03-15 |
Family
ID=16947620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2232963A Expired - Fee Related JP3021582B2 (en) | 1990-09-03 | 1990-09-03 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3021582B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100463911B1 (en) * | 1997-10-01 | 2004-12-30 | 히다치 가세고교 가부시끼가이샤 | Optical information processor |
| US6392778B1 (en) * | 1999-03-17 | 2002-05-21 | Koninklijke Philips Electronics N.V. | Opto-electronic element |
| JP4288841B2 (en) * | 2000-09-21 | 2009-07-01 | ソニー株式会社 | Optical bus member manufacturing method and optical bus device |
| JP2011044737A (en) * | 2005-12-28 | 2011-03-03 | Kyocera Corp | Optical wiring module |
| JP2007199657A (en) * | 2005-12-28 | 2007-08-09 | Kyocera Corp | Optical wiring module |
-
1990
- 1990-09-03 JP JP2232963A patent/JP3021582B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04113675A (en) | 1992-04-15 |
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