JP3045342B2 - Pachinko machine - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a game board
A prize device, and communicating with the first prize device;
One by one after temporarily storing the winning balls that have won the winning device
Device for storing and discharging winning balls, and device for storing and discharging winning balls
A second prize device that operates based on a ball ejected from the device;
The present invention relates to a pachinko game machine equipped with a pachinko game machine .

[0002]

2. Description of the Related Art JP-A-63-262169 discloses a game
On the board, a variable display device is provided at the top and below it
Display with variable first winning device-variable winning unit
And a second display provided below the variable display-variable winning unit.
Variable winning device and variable display-on the left and right of the variable winning unit
Each has a special winning port arranged, and variable display-variable
The winning prize unit will be linked to the first floating prize device.
, Temporarily store the winning ball that has won the first variable winning device
The winning ball storage unit and one ball stored in the winning ball storage unit
Has a ball discharge device with a rotating disk that discharges
According to the winning detection of the operation detection switch arranged in the mouth
Of three-digit display unit identification information in a variable display device
The display is performed, and the display result of the three-digit display unit is a specific display mode.
(For example, an odd-numbered number), the first variation
The prize winning device is opened for a predetermined time, and the first fluctuation during the opening is performed.
When a game ball wins the prize device, the first variable prize device
The winning prize balls are stored in the prize ball storage unit, and the balls are discharged.
The balls stored in the winning ball storage unit by the delivery device
Discharge and count detection switch provided at the outlet
Detected ball ejected by the, the second variable winning device accordingly
To open the winning opening for a predetermined time.
Pachinko machines are described.

[0003] The first variable input in the above pachinko gaming machine
Winning ball storage section that temporarily stores the winning ball that has won the prize device
And to discharge the balls stored in the winning ball storage unit one by one.
The ball discharging device having the turning plate is a movable portion of the first variable winning device.
Just above the winning ball reservoir just below the two open / close wings
Form the ball entrance of the part, and from the ball entrance to the left and right
Forming a wing part with an internal space expanded in a box shape, the winning ball storage part
A discharge port and a storage ball standby part following it are formed in the lower center.
Have been. In addition, the ball discharge device is the stored ball of the winning ball storage section
There is a ball holding part consisting of a concave part for one ball below the waiting part
A turntable is provided, and an outlet is formed below the turntable.
You.

In the above-mentioned pachinko gaming machines, one ball is
Above the ball discharge device that has a rotating disk that discharges balls one by one,
The prize ball storage unit temporarily stores the prize balls that have won the prize device.
And the device must be large in the vertical direction.
There is no structure. In addition, the winning ball storage section
Internal space left and right to temporarily store pachinko balls
Since it is expanded, the winning ball storage unit (wing part) itself
Has to be larger in the left and right direction.
In addition, the pachinko balls in the storage state
Because they are divided and waited on the slope of
Get the feeling of being stored.

[0005]

SUMMARY OF THE INVENTION The object of the present invention is as follows .
And the first prize device.
Prize balls that are stored one by one after they are temporarily stored
The size of the storage / discharge device itself is reduced and the
Space on the game board
Is small and is stored and in a standby state
Multiple pachinko balls can be lined up and arranged.
Can easily check the number of balls in the standby state and win
No. that operates based on the ball discharged from the ball storage and discharge device
Pachinko game where you can easily check the number of times the prize device 2 is activated
To provide a technical machine .

[0006]

The pachinko according to claim 1, wherein :
The game machine has a first winning device and the first prize device on a game board surface.
And the first prize device.
Prize balls that are stored one by one after they are temporarily stored
Discharge from the storage and discharge device and the winning ball storage and discharge device
A second prize device operating based on the ball to be played.
A than, in order to solve the above problem, the winning ball savings
The stay and discharge device includes a winning ball storage unit and the winning ball storage unit.
It is placed behind and stored in the winning ball storage section
Rotation that receives one ball at the receiving position and discharges it at the discharging position
And the winning prize ball storage unit is formed of a transparent member.
A ball entrance for receiving the winning ball;
A ball guide path which is formed into a substantially S-shape by communicating with the mouth,
A through-hole formed at the end of the ball guiding path,
When the rotating body takes a position other than the receiving position, the through hole
A plurality of winning balls in the ball guiding path
It is characterized by being stored next. Claim 2
The pachinko game machine described in claim 1
And a symbol display means on the game board, wherein the first input is provided.
The prize device is provided with detecting means for detecting a ball that has entered, and the symbol
The display result due to the design change of the display means is a specific display mode
Activates the first prize device and receives a hit ball
To convert it from difficult to accept
Then, the operation ending condition of the first prize device is determined to be an operation start condition.
A predetermined time has elapsed since the start of the operation
If the number of balls reaches the specified number, one of the conditions
It is characterized in that it is at the time of standing.

[0007]

When the game ball wins the first winning device and becomes a winning ball, the winning ball storing and discharging means temporarily stores the winning ball and then discharges it one by one, and then discharges the winning ball from the winning ball storing and discharging device.
The second winning device operates based on the ball that is played . Winning ball storage
Behind the retaining part, the ball stored in the winning ball storage part is accepted
A rotating body that receives one at the position and discharges it at the discharge position
Device does not become large in the vertical direction.
And realize. The winning ball storage section is composed of a transparent member
Along with the ball entrance to receive the winning ball, and communicate with the ball entrance
Of a ball taxiway that is bent into a substantially S-shape
The configuration with the through hole formed at the end is a winning ball storage
The size of the part can be reduced, and the rotating body accepts
By closing the through hole when taking a position other than the position,
Ball guidance of multiple pachinko balls that are stored and waiting
Can be lined up along the road. This puts you in a standby state
Can easily check the number of balls in the prize ball storage and discharge device
Of the second prize device, which operates on the ball ejected from the device
The number of operations can be easily confirmed.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.
Will be described. In FIG. 1, a symbol display unit 2 constituting a main part of a symbol display device of a pachinko machine is provided at a substantially central portion of the game board 1. A gate 10 is arranged at the center lower portion of the symbol display unit 2, and further below the gate 10 is a first prize device 3 as an electric accessory normal prize device linked to the symbol display unit 2 and driven to open by a solenoid or the like. Are arranged. Further, in the left and right direction of the symbol display unit 2, a tulip-type ordinary accessory 1 is on the left hand side.
On the right hand side, a second prize device 6 as an electric accessory normal prize device which is driven to open and close by a solenoid or the like is arranged. Then, the left ordinary electric accessory 7 and the right ordinary electric accessory 8 which are linked to the second prize device 6 and are opened and operated by a solenoid or the like, respectively, below and on the left and right of the tulip type ordinary accessory 16 and the second prize device 6, respectively. Are arranged.

In the center of the symbol display unit 2, a left symbol display portion 11, a middle symbol display portion 13, and a right symbol display portion as a symbol display body of a pachinko machine comprising dot matrix LEDs arranged vertically and horizontally in a matrix. 12 are provided.
On the back of the game board 1 substantially below the gate 10, a gate 10
A first detection body including a symbol actuation switch SW1 for detecting a game ball passing through and displaying the left symbol display portion 11, the middle symbol display portion 13, and the right symbol display portion 12 in a variable manner is provided. The symbol change by the symbol activation switch SW1 is performed after a predetermined time, the symbols are stopped in the order of left, right, and middle. When the combination of the symbols at the time of the stop is the same for both the left, right, and middle, the first prize is won. The opening operation of the device 3 is performed.
Also, two gate passing storage number displays L are provided on both sides of each of the three symbol display portions 11 to 13 of the symbol display unit 2.
The ED 14 is arranged, and the number of game balls passing through the gate 10 is illuminated and displayed to a maximum of four, including when the symbol is changed, to notify the player, and the symbol display unit 2 is used after the symbol change is stopped or the first winning device. After the opening operation of No. 3, the symbol is changed again.

The first winning device 3 performs the opening operation for a predetermined time based on the symbol matching specified by the symbol display unit 2. The opening operation time is set to 5.8 seconds. If the total number of game balls that have won the first prize device 3 exceeds 7, the opening operation ends when the seventh prize is detected. The detection of a winning ball in the first winning device 3 is performed by a first winning ball detection switch SW2 provided in a winning ball storage / discharge device 4 described later.

The second prize device 6 includes a prize ball storing and discharging device 4.
The opening / closing operation is performed by a second winning device operation switch SW3 provided in the vehicle. The opening / closing operation time is set to 29.5 seconds and the opening is performed five times for 1.1 seconds. Does not perform the opening / closing operation again by the second winning device operation switch SW3. On the front surface of the second prize device 6, an opening number LED 15 for displaying the remaining number of opening times of the second prize device 6 is provided.
Is provided, and a second winning ball detection switch SW4 for detecting a winning of a game ball is disposed inside the second winning device 6.

The left ordinary electric accessory 7 and the right ordinary electric accessory 8
The opening operation is performed for a predetermined time in accordance with a winning detection signal from the second winning detection switch SW4 of the second winning device 6.
Although the opening time is set to 5.8 seconds, the opening operation by the second winning ball detection switch SW4 is not performed again during the opening operation.

A first winning device 3 is provided below the center of the game board 1.
The prize ball provided downstream of the first prize device 3 and provided with a rotating mechanism for temporarily storing the prize balls that have won the first prize device 3 and discharging the prize balls one by one after a certain period of time. A winning ball storage / discharge device 4 as storage / discharge means is provided.

FIG. 2 shows a gambling ball storage / discharge device 4 connected to a game board 1.
A winning ball storage section 24 which is extracted from the game board 1 and is provided so as to protrude therefrom, and a winning ball discharging section 25 which is buried in the game board 1.
FIG. 3 is a perspective view of the game board 1 as viewed from an oblique direction with the direction in which the game board 1 is mounted facing the front.

The prize ball storage section 24 protruding from the game board 1 is formed in a thin and substantially cylindrical shape having a substantially circular shape when viewed from the front side of the game board 1, and the front 49 and the back 48 are formed of transparent members. A winning ball entrance 26 is provided at the top, and the winning ball entrance 26 communicates with the first winning device 3. A ball guiding path 41 is provided in the winning ball storage unit 24 and communicates with the winning ball inlet 26 to reach the lower end 42 of the winning ball storage unit 24. The ball guiding path 41 is formed by two wall surfaces perpendicular to the radial direction of the winning ball storage unit 24, and is bent left and right like an S shape when viewed from the front side of the game board 1, and the lower end 42 is formed into an S shape. It is a continuation part and is formed in the up-down direction. Also,
An arch-shaped through hole 27 is formed in the back surface of the lower end 42, and the bottom 36 of the lower end 42 is inclined more toward the back surface 48 than the front surface 49 side, and is higher at the front surface 49 side.

A winning ball discharging unit 25 buried in the game board 1
Is a rotating shaft 4 in a direction perpendicular to the surface on which the casing 43 is mounted on the gaming board 1 with the center of rotation being the center of the casing 43 and facing the gaming board 1 and housed in the casing 43.
A rotating body 5 having a thin, substantially cylindrical shape and a rotating shaft 4
Rotator driving motor 2 that is connected to
9, the cylindrical shape of the rotating body 5 is a winning ball storage unit 24.
And a receiving hole 28 cut out in the same shape as the through hole 27 of the winning ball storing part 24 at one end of the rotating body 5. A substantially circular back wall (not shown) is attached behind the rotating body 5, and the back wall is concentric with the receiving hole 28 of the rotating body 5 from the center 44 when viewed from the front of the game board 1. Receiving hole 2 at left position in left and right direction
A ball passage opening 9 having the same shape as that of the ball passage 8 is provided. Then, below the ball passage 9, a casing 43 in which a second detection body including a second winning device operation switch SW3 which is an operation switch of the second winning device 6 in FIG.
This is a member for mounting the winning ball storing and discharging device 4 to the game board 1, and a mounting piece 45 is formed integrally with the casing 43 so as to surround the rotating body 5. The winning ball storage unit 24 is mounted on the front surface of the casing 43, and the winning ball storage unit 24 is provided.
And the rotating surface of the rotating body 5 are brought close to each other. The winning ball entrance 26 of the winning ball storage section 24 at the upper part of the casing 43
The first winning ball detection switch SW2 is disposed in a portion corresponding to.

The rotating body drive motor 29 rotates twice per minute, and rotates in a clockwise direction. The rotating body 5 is rotated by a rotating body drive motor 29 to form a casing 43.
The inside rotates, and the receiving hole 28 provided in the rotating body 5 always rotates clockwise around the rotating shaft 40 along the inner wall 47 of the casing 43. When the winning ball storage unit 24 is attached,
When the receiving hole 28 of the rotating body 5 comes to a position directly below the center 44 in the up-down direction when viewed from the front of the gaming board 1, the through-hole 27 provided on the back surface of the winning ball storage unit 24 becomes the receiving hole 28.
Is to be matched. That is, when the receiving hole 28 of the rotating body 5 is located immediately below the center 44, the through hole 27
, And coincides with the ball passage opening 9 provided on the rear wall when located on the left side when viewed from the center 44. Also, the through hole 27,
The size of the receiving hole 28 and the ball passage opening 9 is sufficient when one game ball passes, but is large enough that two game balls cannot pass at the same time.

The game balls that have won the winning device 3 are winning balls 46.
It falls into the prize ball storing and discharging device 4. Winning ball 46
Passes through the prize ball entrance 26 above the prize ball storage unit 24, and the first prize ball detection switch SW2 detects the prize of the game ball to the prize device 3. After passing through the winning ball entrance 26, the winning ball 46 moves downward along the ball guiding path 41, reaches the lower end 42, and reaches the front of the through hole 27. The winning device 3 finishes the opening operation upon the detection of the seventh winning, so that a maximum of seven normally enter the ball guiding path 41, and in rare cases, the game ball jumps in immediately before the closing of the first winning opening 3 '. However, since the following description is the same,
The following description is based on the assumption that the winning balls fall into the ball guiding path 41.

The rotating body 5 close to the back of the winning ball storage section 24 rotates clockwise at a rotation speed of two revolutions per minute, and the receiving hole 28 provided in the rotating body 5 is viewed from the center 44. When it comes to the position just below, it coincides with the through hole 27 of the prize ball storing part 24, but at other positions, the rotating body 5 closes the through hole 27, and the prize ball 46 In such a case, the vehicle temporarily stops at the front of the through hole 27 at the lower end 42 of the winning ball storage unit 24. Then, if there are the second and third winning balls, the ball sequentially moves downward along the ball guiding path 41, and the second winning ball is positioned above the first winning ball. Then, the winning balls are stored in the ball guiding path 41 so that the third winning ball is positioned next to the second winning ball.

A receiving hole 28 provided in the rotating body 5
Comes to a position just below when viewed from the center 44 and coincides with the through-hole 27 of the winning ball storage section 24, the first winning ball 46
Is passed through the through-hole 27 to the outside of the winning ball storage section 24 and the rotating body 5
Into the receiving hole 28. That is, the winning ball 46 has been transferred to the winning ball discharging unit 25. Then the ball taxiway 4
The next winning ball stored in 1 moves to the front of the through-hole 27 and stops until the next match of the through-hole 27 and the receiving hole 28.

The time from the coincidence between the through hole 27 and the receiving hole 28 to the next coincidence is determined by the rotation speed of the rotating body 5 (2 rotations per minute).
(Rotation) is 30 seconds.

The prize ball 4 that has been transferred into the receiving hole 28 of the rotating body 5
6 moves around with the receiving hole 28 while being held by the receiving hole 28, the receiving hole 28 comes to the left position when viewed from the center 44, and the receiving hole 28 of the rotating body 5 and the rear wall of the rotating body 5 When coinciding with the provided ball passage opening 9, it is discharged behind the rotating body 5 through the ball passage opening 9 and detected by the second winning device operation switch SW3 which is an operation switch of the second winning device 6. . In this way, the discharge of the winning ball from the winning ball storing and discharging device 4 is detected.

The time from the transfer of the winning ball to the receiving hole 28 to the discharge from the ball passage opening 9 behind the rotating body 5 is considered to be 1/4 of one cycle, and is 7.5 seconds. .
Then, the receiving hole 28 of the rotating body 5 orbits and the prize ball storing section 2
When it comes again to a position coinciding with the through hole 27 of 4, the next winning ball stored in the ball guide path 41 moves into the receiving hole 28.

In this way, the winning balls that have won the first winning device 3 are stored in the winning ball storing section 24 and are discharged one by one by the winning ball discharging section 25 provided with the rotating body 5. .

In FIG. 1, the lower left winning opening 17, the lower right winning opening 18, the windmill 20, the out ball receiving port 22, the ball guiding rail 23, and the return rubber 21 are well known and will not be described. .

Reference numerals 50 to 53 denote indicator lights, which constitute groups A, B, C, and D for each element, and are lit and blinked for each group, and 50 are indicator lights A and 51 are indicator lights. B and 52 are indicator lights C and 53 is an indicator light D.

When the game ball passes through the gate, a sound effect is output from a speaker (not shown) according to the design change and the winning state of the game ball.

Tables 5 to 7 show the display and lighting modes of the lamps and LEDs according to the operation state of the pachinko machine. Table 11 shows the speaker sound effect generation modes according to the operation state of the pachinko machine. FIG.

[0029]

[Table 5]

[0030]

[Table 6]

[0031]

[Table 7] In FIG. 3, a control unit as a control device of the pachinko machine includes a control program of the symbol display unit 2, the first winning device 3, the second winning device 6, and the left and right ordinary electric accessories 7, 8, and data of display symbols. Each part of the symbol display unit 2 is driven and controlled in accordance with a ROM 30 storing ROMs and the like and a RAM 31 used for temporary storage of data and a control program of the ROM 30, and the first prize device 3, the second prize device 6, and the left and right normal electric motors. The control unit is constituted by a CPU 32 for driving and controlling the objects 7 and 8, and also serves as a display control unit and a condition detection unit. Note that the ROM here does not mean a storage unit that cannot be written or rewritten.

The symbol actuating switch SW1 provided on the back surface below the gate 10, the first winning ball detecting switch SW1 and the second winning device operating switch SW3 provided on the winning ball storing and discharging device 4, and the inside of the second winning device 6. Each of the second winning ball detection switches SW4 disposed in the switch detection unit 33
And the left, right, and middle symbol display LEDs in the left symbol display unit 11, right symbol display unit 12, and middle symbol display unit 13 by dot matrix LEDs.
Each of (L), (R), and (C), the stored number display LED 14 and the open count display LED 15 is individually or simultaneously driven controlled by the CPU 32 via the LED display circuit 34. Each of the solenoids for operating the first and second prize devices 3 and 6 and the left and right ordinary electric accessories 7 and 8, that is, the first prize device opening solenoid S
OL1 and the second prize device opening / closing solenoid SOL2, and left and right ordinary electric accessory opening solenoids SOL3 and SOL4.
Are connected to the CPU 32 via the solenoid drive circuit 35.
Drive control individually or simultaneously. The clock reset circuit 36 is connected to the CPU 32
Defines the processing cycle.

The CPU 32 controls each indicator light A on the game board 1.
To D and a drive control means such as a continuous number display LED 20 and a speaker for outputting a sound effect. However, the drive control method of each of these members is well known, and therefore the description thereof is omitted.

Hereinafter, the processing operation of the pachinko machine according to the present embodiment will be described with reference to flowcharts (FIGS. 4 to 22) showing the main part of the control program stored in the ROM 30. Note that the processing of task 1 shown in FIGS.
7 to 7, the task 3 shown in FIGS. 8 to 17, and the task 4 shown in FIGS.
The processing of the task 5 shown in FIGS. 20 and 21 and the processing of the task 6 shown in FIG. 22 are performed by the CPU 32 every predetermined processing cycle (on the order of μs) according to a signal from the clock reset circuit 36. It is executed repeatedly in parallel.

The processing of task 1 shown in FIGS.
U32 is generated by sequentially incrementing the value of the hit determination random number for symbol display in the range of 0 to 300 at predetermined intervals, and then the symbol switch from the symbol actuation switch SW1 according to the passing state of the game ball through the gate 10. Each time a detection signal is input, up to four hit determination random numbers are stored, and up to four passes of the game ball through the gate 10 are lit on the gate passing storage number display LED 14 of the symbol display unit 2. Display by

The CPU 32 sequentially increments the value of the random number for hit determination in the range of 0 to 300 at every predetermined processing cycle, and the value of the random number storage register for hit determination RAN1 becomes 30.
Each time the value reaches 0, the value of the register RAN1 is initialized to 0. (Step a1 to Step a3).

Further, each time a detection signal is inputted from the symbol actuation switch SW1 in accordance with the state of the game ball passing through the gate 10, it hits the unused fixed random number storage register Ri and the current value of the judgment random number storage register RAN1. The value is stored (step a4 to step a10). CPU 32 is gate 1
Each time a pass of 0 is detected, the storage state identification flag Fi detects an unused definite random number storage register Ri based on the value of the search index i. Since the current value is stored and the storage state discrimination flag Fi is set, as shown in FIG.
Up to four values of RAN1 at the time of detection of the passage of 0 are stored.

The value of the hit determination random number storage register RAN1 changes in a regular manner at every predetermined processing cycle.
Since there is no causal relationship between the timing of detection of the passage to and the current value of RAN1, the current value of RAN1 at the time of detection of passage can be used as a random number. Also, RA
The value of N1 varies from 1 to 300 in the range of 0 to 300,
Since the value of RAN1 that has reached 300 is immediately initialized in the processing on the upstream side, the value of 300 is not detected in the processing at the time of detecting the passage of the gate.

Then, the CPU 32 detects the used storage state identification flag Fi based on the value of the search index i, and adds one to the storage number display register Rd each time it is detected (steps a11 to a11). Step a16). In addition,
At the initial stage, 0 is set in the storage number display register Rd.

Next, in the symbol display unit 2, the symbol display unit 2 is currently in the process of changing the symbol, determining the symbol, during the symbol change standby time, or during the opening operation of the first winning device 3. In the case of (1), it is determined whether or not the value of the definition flag fa defined by the value 1 is 1 (step a17).

If the value of the regulation flag fa is not 1, the symbol is being changed, the symbol is being determined, the symbol is being changed, the symbol is being changed, or the first winning device 3 is being opened. In the initial case, the regulation flag fa is set to 0, and in this case, the CPU 32
The stored number display LEDs 14 corresponding to the value of the stored number display register Rd are displayed by lighting them (step a21).

If the value of the definition flag fa is determined to be 1 in the determination processing of step a17, the data of the storage state identification flags F1 to F3 are replaced with the storage state identification flags F0 to F2 in the processing of task 3 described later. And the memory state identification flag F3 is set to 0 and initialized, and the gate including the symbol change, the symbol determination, the symbol change standby time, and the opening operation of the first prize device 3 is performed. As a process for lighting and displaying a maximum of four passing storage numbers to the CPU 10, the CPU 32 executes the storage number display register R
One is added to the value of d and stored in the stored number display register Rd (step a18), and the value of the stored number display register Rd becomes 4
It is determined whether or not the value is larger (step a19). If the value of the storage number display register Rd is larger than 4, Rd is set to 4 (step a20).

Then, the storage number display LEDs 14 corresponding to the value of the storage display register Rd are displayed by lighting them (step a21). Displayed memory number display L
The number of EDs 14 is any one of 0 to 4.

In this embodiment, the comparison value for setting the value range of the hit determination random number storage register RAN1 is set to 300. However, this value is not fixed, and the parameter in the program is changed. Can be reset to any value.

In the processing of task 2 shown in FIGS. 6 and 7, the value of the internal processing index stored in each of the left symbol data storage register r0, the right symbol data storage register r1, and the middle symbol data storage register r2 is set to a predetermined value. This is for randomly creating a combination of symbols that is different from a combination of winning symbols by sequentially changing the combinations for each processing cycle.

The CPU 32 sets the second and third bits (values from 0 to 3) of the hit determination random number storage register RAN1 to the register Rx as a process for setting each value of the left, right, and middle symbol data. Similarly, the first and second bits and the 0th and first bits of the hit determination random number storage register RAN1 are stored in the registers Ry and Rz, respectively (steps b1 to b3), and the register Rx
Is added to the value and stored in the register R '(step b).
4), it is determined whether or not the value of the register R 'is 4 (step b5); if it is 4, 0 is stored in the register R' (step b6); otherwise, the stored value is left as it is. ,
The value of the register R 'and the value of the left symbol data storage register r0 (values from 0 to 11) are added and stored in the left symbol data storage register r0 (step b7). The CPU 32
It is determined whether the value of the left symbol data storage register r0 is 12 or more (step b8). If it is 12 or more, 12 is subtracted from the value of the register r0 and stored in the left symbol data storage register r0 (step b9).

As a result, the left symbol data storage register r0
Is set to any value from 0 to 11. Here, the registers Rx, Ry, Rz and R 'are stored in the CPU 32.
Is a register used for internal processing.

The value of this register Rx and the value of the left symbol data storage register r0 (values from 0 to 11) are
The CPU 32 performs the determination process and the calculation process performed by the
The same operation is performed for each value of the register Ry and the right symbol storage register r1 (values from 0 to 11) (step b10 to step b15).

The CPU 32 calculates the values of the register Rz and the medium symbol storage register r2 (values from 0 to 18) by
1 is added to the value of the register Rz and stored in the register R '(step b16), and it is determined whether or not the value of the register R' is 4 (step b17). If it is 4, 0 is stored in the register R '. (Step b18) If it is not 4, the stored value is left as it is, and the value of the register R 'and the value of the middle symbol data storage register r2 (values from 0 to 18) are added, and the middle symbol data storage register is added. r2 (step b1)
9). The CPU 32 determines whether or not the value of the medium symbol data storage register r2 is 19 or more (step b20).
If it is 9 or more, 19 is subtracted from the value of the register r2 and stored in the middle symbol data storage register r2 (step b2)
1).

Left, right and middle symbol storage registers r0 to r2
Is the value of the internal processing index, and
2 is to sequentially change this value for each processing cycle, thereby creating all possible combinations of symbols that can be displayed, and the combination of the internal processing indices created in the processing cycle relates to the hit symbol. It is determined whether or not the symbol is related to a missing symbol (step b22 to step b2).
3) That is, it is determined whether or not the combination of the internal processing indices created with respect to the internal indices r0 to r2 is related to a hit symbol if each is equal to each other, and if the combination is an unrelated symbol if each is different from each other. If it is a hit symbol, the current values of the internal processing indices r0 to r2 are set to the left, right and middle hit symbol data storage registers r0a to r0.
2a (step b24), and if the combination of the internal processing indices created in the processing cycle is related to a lost symbol, the current values of the internal processing indices r0 to r2 are left, right, and center. Lost symbol data storage register r0
Stored in each of b to r2b (step b25).

Accordingly, in each of the left, right, and middle hit symbol data storage registers r0a to r2a, only the value of the internal processing index relating to the hit symbol is sequentially updated and stored. In each of the storage registers r0b to r2b, only the value of the internal processing index relating to the lost symbol is sequentially changed and stored.

Left, right, and middle symbol storage registers r0 to r2
The relationship between the value of the internal processing index and the design stored in the table is as shown in Tables 1 to 3. The display index il, ir, ic of the left, right, and middle symbols is replaced with the value of the internal processing index. I have. The possible values of the internal processing index for the left symbol and the right symbol are 0 to 11, and the allowable values of the internal processing index for the middle symbol are 0 to 18, so that all combinations of symbols that can be displayed are cycled. In order to create
For 2 ^2, 19 times (2736 times) is required.

[0053]

[Table 1]

[0054]

[Table 2]

[0055]

[Table 3] In addition, the winning combination of the symbols is a case where the left, right, and middle symbols all match.

That is, the combination of symbols stored in the left, right, and middle hit symbol data storage registers r0a to r2a is one of the same symbols in the left, right, and middle, and all other combinations are the same. Since it is stored in the left, right, and out-of-center symbol data storage registers r0b to r2b, the probability of a hit on the display is a value obtained by dividing the number of combinations of hit symbols by the total number of combinations of symbols. 2736 (0.730
/ 200).

In the embodiment, the symbol to be displayed when the variable display is stopped is selected based on the relationship between the set value and the value of the fixed random number storage register Ri set at the time when the passage to the gate 10 is detected. , The hit probability can be set arbitrarily irrespective of the combination occurrence probability of each symbol. The values of the registers r0a to r2a, the registers r0b to r2b, and the registers r0 to r2 indicate the values of the internal processing indices, and represent the current values of the display indices il, ir, ic used for the actual fluctuation display. Is irrelevant.

The processing of task 3 shown in FIGS.
It is related to a variable display of symbols.

The CPU 32 that has started the processing of the task 3
First, it is determined whether or not a new symbol variation display based on the detection of a passing signal to the gate 10 can be started.
Is detected based on whether 1 or 2 is set in step c1 (step c1, step c2). State storage flag Fa
If the value of is 1, the symbol variation display is being executed, and
If the value of the state storage flag Fa is 2, the opening operation of the first winning device 3 is being executed, and in any case, a new symbol variation display cannot be started. When the value of the state storage flag Fa is 1, the CPU 32 continuously executes the symbol variation display in the processing of the task 3, and the state storage flag F
When the value of a is 2, the opening operation of the first winning device 3 is continuously executed in the processing of the task 4.

If the state storage flag Fa is a value other than 1 and 2, neither the symbol change display nor the opening operation of the first winning device 3 is performed, so that a new symbol change can be started. However, in the present embodiment, when the passage to the gate 10 is stored by the processing of the task 1, the standby time for the start of the symbol change of 0.504 seconds is set, and in the case of the per symbol, the standby time is set. Since the first winning device 3 performs the opening operation, after the opening operation of the first winning device 3 is completed, 0.
It waits for 504 seconds, and in the case of a lost symbol, waits for 0.504 seconds after the determination of the symbol. Therefore, during the standby time, the state storage flag Fa is set to 3 in the subsequent processing.
Is set. At the initial stage, the value of Fa is 0, and the detection of the passing signal of the gate 10 is awaited.

The CPU 32 determines whether or not the value of the status storage flag Fa is 0 (step c3). If the value of Fa is not determined to be 0, the process of task 3 detects the elapse of the standby time. It is executed continuously.

When the value of the state storage flag Fa is determined to be 0, a new symbol change can be started.

In this case, the CPU 32 first determines whether or not the storage state identification flag F0 is set to 1;
It is determined whether or not a passing signal to the gate 10 has already been detected in the processing of the task 1 (step c4).

If a passing signal to the gate 10 has been detected, the value of the hit determination random number storage register RAN1 at the time of signal detection is stored in the fixed random number storage register Ri in the processing of the task 1, and the fixed random number storage register 1 is set to the storage state identification flag Fi corresponding to Ri,
At this time, the CPU 32 stores the random number in the determined random number storage register Ri in the order of i = 0 to 3 each time the passage to the gate 10 is detected, so that the storage state identification flag F0 is set to 1. If the passage to the gate 10 is at least 1
The time means that it has been detected (see step a4 to step a10).

If 1 is set to the storage state identification flag F0, the CPU 32 proceeds to step c5, sets 1 to the state storage flag Fa, stores the start of the variable display, and performs the variable display selection processing. Is set to 0 (step c6), and the variable state storage flag Fb defining
A predetermined value is set to the parameters tg to tg (step c7). As shown in FIG. 24, ta to tg are fixed values indicating the switching time of the fluctuation speed of each of the left, right, and middle symbols.

The CPU 32 having set the switching time of the change speed of each of the left, right, and middle symbols, then sets the left, right, and middle symbol display LE of the left, right, and middle symbol display units 11, 12, and 13.
A process of continuously incrementing the values of the display indices il, ir, and ic indicating the symbols to be displayed on each of D (L), (R), and (C) and starting a high-speed variation of each symbol is started (step c8). ), The timer T is operated to start measuring the elapsed time after the start of the variable display (step c9). The actual symbol feed is performed by switching the display output of each symbol display LED (L), (R), and (C) every several lines at a predetermined cycle, so that the symbols continuously flow as if the symbols flow vertically. However, since this is well known as a display technique using an LED element or the like, description thereof will be omitted. In the case of the embodiment, the reference values of the symbol feed speed of each symbol at the time of high-speed fluctuation, medium-speed fluctuation and low-speed fluctuation are 0.064 seconds / symbol, 0.256 seconds / symbol, and 0.512 seconds / symbol, respectively.

As described above, the symbol variation display based on the detection of the passage to the gate 10 is started. At the time of the variation display start, the value after th shown in FIG. 24, that is, the middle symbol display LED ( C) The value that regulates the time of the medium speed and low speed fluctuation is not set.

In the processing after the next cycle, since the state storage flag Fa has already been set to 1, the CPU 32 proceeds to step c9 after executing the determination processing in step c1.
In accordance with the current value 0 of the fluctuation state storage flag Fb, until the elapsed time T after the start of the fluctuation display reaches the set value ta, the determination processing of step c1 and steps c10 to c11 and each of the left, right, and middle Symbol display LED (L),
The processing of step c11 relating to the high-speed fluctuation of (R) and (C) is repeatedly executed at a predetermined processing cycle.

When the elapsed time T after the start of the fluctuation display reaches the set value ta while repeatedly executing the high-speed fluctuation processing of each symbol in this way (step c12), the CPU 32 proceeds to step c12.
The value of the fixed random number storage register R0 is read and stored in the fixed value storage register Ra, and the definition flag fa is set to 1 (step c13). As shown in FIG. 23B, the storage state identification flags F1 to F3 are set. And the data in the determined random number storage registers R1 to R3 are stored in the storage state identification flags F0 to F2 and the determined random number storage registers R0 to R2.
Then, the data is sequentially shifted to 2, and the storage state identification flag F3 and the fixed random number storage register R3 are set to 0 for initialization (step c14).

Next, the CPU 32 determines whether or not the value of the fixed value storage register Ra matches the set value 7, that is, determines whether or not a collision has occurred at the time of detection of passage to the gate 10 which has been the starting stimulus of the current symbol variation process. It is determined whether or not the value of the random number storage register RAN1 matches the set value corresponding to the hit (step c15). If the value of the fixed value storage register Ra matches the set value, the left, right, and middle hit symbol data While the values of the storage registers r0a to r2a are stored in the left, right, middle, and display symbol storage registers r0c to r2c (step c16), if the value of the fixed value storage register Ra does not match the set value, the left and right are set. , And the respective values of the center-losing symbol data storage registers r0b to r2b are stored in the left, right, and middle display symbol storage registers r0c to r2c, respectively (step c).
17) A symbol to be displayed on each symbol display LED at the time of stopping the fluctuation is determined.

Next, the CPU 32 operates the left symbol display LED.
The value of the display index il relating to the left symbol is set and changed such that the symbol corresponding to the internal processing index of the left display symbol storage register r0c is displayed at the time of the fluctuation stop time tc of (L) (step c18), and the left symbol display is performed. While changing the fluctuation speed of the LED (L) from the high speed fluctuation to the medium speed fluctuation (step c)
19), the variable state storage flag Fb is set to 1 (step c20), and the processing in this cycle ends.

Although the value of the display index il of the left symbol display LED (L) at the time of ta is not obvious, the left symbol display LED (L) is not obvious.
(L) The value of the middle speed fluctuation time tb-ta = A and the value of the low speed fluctuation time tc-tb = B of the left symbol display LED (L) are set in advance, and the left symbol display LED (L) Since the medium speed fluctuation speed and the low speed fluctuation speed are constant, only the information of the display index r0c of the symbol to be displayed on the left symbol display LED (L) during the variation stop time tc of the left symbol display LED (L). , The setting change value of the display index il can be obtained.

According to the processing timing of the embodiment, when switching from high-speed fluctuation to medium-speed fluctuation, the current value of the display index il is changed from the display index r0c of the symbol to be displayed on the left symbol display LED (L) when the fluctuation is stopped. Also, by changing the value of il so as to be a display index three symbols before, a symbol of r0c can be obtained at the time of stopping the fluctuation.

In the processing after the next cycle, the CPU 32 proceeds to step c21 after executing the determination processing in step c1 and step c10, and thereafter, according to the current value 1 of the fluctuation state storage flag Fb, the elapsed time after the start of the fluctuation display. Until T reaches the set value tb, steps c1 and c10
In addition, the determination processing of steps c21 to c22, the processing relating to the medium speed fluctuation of the left symbol display LED (L), and the processing of step c23 relating to the high speed fluctuation of each of the right and middle symbol display LEDs (R) and (C) are predetermined. Will be repeatedly executed in the processing cycle.

In this manner, the elapsed time T after the start of the fluctuation display is set to the set value t while the fluctuation processing of each symbol is repeatedly executed.
When it reaches b (step c22), the CPU 32 switches the fluctuation speed of the left symbol display LED (L) from the medium speed fluctuation to the low speed fluctuation (step c24), and sets 2 to the fluctuation state storage flag Fb (step c25). ), The process of this cycle ends.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 2, so that the CPU 32
After execution of the determination processing in step c10 and step c21, the process proceeds to step c26, and thereafter, according to the current value 2 of the fluctuation state storage flag Fb, the step is performed until the elapsed time T after the start of the fluctuation display reaches the set value tc. c1, step c1
0, determination processing of step c21 and steps c26 to c27, processing relating to low-speed fluctuation of the left symbol display LED (L), and right and middle symbol display LEDs
The processing of step c28 concerning the high-speed fluctuation of (R) and (C) is repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tc in the determination process in step c27, the CP
U32 stops the low speed fluctuation of the left symbol display LED (L) (step c29), sets 3 to the fluctuation state storage flag Fb (step c30), and ends the processing of this cycle. When the low-speed change of the left symbol display LED (L) is stopped, the symbol corresponding to the index stored in the left symbol storage register r0c is statically displayed on the left symbol display LED (L). However, if normal display control is disturbed by the influence of external noise or the like, another symbol may be displayed when the variable display is stopped. Even in such a case, since the symbol is displayed based on the data read from the ROM 30 based on the value of the display index il, the relationship between the value of the display index il and the left symbol is Always secured.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 3, so that the CPU 32
After the execution of the determination processing in steps c10, c21, c26, and c31, the process proceeds to step c32, and the elapsed time T after the start of the variable display is set to the set value td according to the current value 3 of the variable state storage flag Fb. Step c1, Step c10, Step c
21, step c26 and the discrimination processing of steps c31 to c32, and the right and middle symbol display LEDs
The processing of step c33 relating to the high-speed fluctuation of (R) and (C) is repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value td in the determination processing of step c32, the CP
U32 is the fluctuation stop time tf of the right symbol display LED (R).
Sometimes, the value of the display index ir for the right symbol is changed so that the symbol corresponding to the internal processing index of the middle display symbol storage register r1c is displayed (step c34), and the fluctuation speed of the right symbol display LED (R) is changed. Switching from the high-speed fluctuation to the medium-speed fluctuation (step c35), the fluctuation state storage flag Fb is set to 4 (step c36), and the processing in this cycle ends.

Medium speed fluctuation time t of the right symbol display LED (R)
Since the value of e-td = A and the value of the low-speed fluctuation time tf-te = B are the same as in the case of the left symbol display LED (L), the condition for changing the setting of the display index ir is also the left symbol display LED.
As in the case of (L), when switching from high-speed fluctuation to medium-speed fluctuation, the current value of the display index ir is a display index r of a symbol to be displayed on the right symbol display LED (R) when the fluctuation stops.
By changing the value of ir so as to be a display index three symbols earlier than 1c, a symbol of r1c can be obtained at the time of stopping the fluctuation.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 4, so that the CPU 32 executes step c1,
After execution of the determination processing of step c10, step c21, step c26, step c31, and step c37, the process proceeds to step c38, and thereafter, the elapsed time T after the start of the variable display is set according to the current value 4 of the variable state storage flag Fb. Until the value te is reached, steps c1 and c1
0, step c21, step c26, step c31
And the determination processing of steps c37 to c38, the processing relating to the medium speed fluctuation of the right symbol display LED (R) and the processing of step c39 relating to the high speed fluctuation of the middle symbol display LED (C) are repeatedly executed at a predetermined processing cycle. Becomes

In this way, the elapsed time T after the start of the fluctuation display is set to the set value t while the fluctuation processing of each symbol is repeatedly executed.
e (step c38), the CPU 32 switches the fluctuation speed of the right symbol display LED (R) from the medium speed fluctuation to the low speed fluctuation (step c40), and sets 5 to the fluctuation state storage flag Fb (step c41). ), The process of this cycle ends.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 5, so that the CPU 32 executes step c1,
After execution of the discriminating processes in steps c10, c21, c26, c31, c37, and c42, the process proceeds to step c43, and thereafter, the elapsed time after the start of the fluctuation display according to the current value 5 of the fluctuation state storage flag Fb. Step c until T reaches the set value tf.
1, step c10, step c21, step c2
6, Step c31, Step c37 and Step c
42 to step c43, the right symbol display LE
Processing related to low-speed fluctuation of D (R) and medium symbol display LE
The processing of step c44 relating to the high-speed fluctuation of D (C) is repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tf in the determination processing of step c43, the CP
U32 stops the low speed fluctuation of the right symbol display LED (R) (step c45), sets 6 to the fluctuation state storage flag Fb (step c46), and ends the processing of this cycle. At the time point when the low-speed fluctuation of the right symbol display LED (R) is stopped, the symbol corresponding to the index stored in the right symbol storage register r1c is statically displayed on the right symbol display LED (R). . Even when normal display control is hindered by the influence of external noise or the like, the display index ir
The relationship between the value and the right symbol is always ensured.

That is, each of the left symbol display LED (L) and the right symbol display LED (R) starts changing the symbol display.
When the predetermined set times tc and tf have elapsed, they are individually stopped by the processing of the CPU 32.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 6, so that the CPU 32 executes step c1,
After executing the determination processing of step c10, step c21, step c26, step c31, step c37, step c42, and step c47, the process proceeds to step c48,
Hereinafter, steps c1, step c10, step c21 and step c21 are performed until the elapsed time T after the start of the fluctuation display reaches the set value tg in accordance with the current value 6 of the fluctuation state storage flag Fb.
Step c26, step c31, step c37, step c42, and steps c47 to c48
And the processing of step c49 relating to the high-speed fluctuation of the middle symbol display LED (C) are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tg in the determination process of step c48, the CP
U32 is whether or not the current value of the display index il of the left symbol display LED (L) matches the current value of the display index ir of the right symbol display LED (R), that is, the left symbol for which the fluctuation display is stopped. A comparison is made as to whether the symbol combination of the display LED (L) and the right symbol display LED (R) satisfies the necessary conditions for the combination of the hit symbols (step c50), and according to the comparison result, after time tg. , The middle symbol display LE
Various data required for setting the time of the medium speed and low speed change of D (C) will be set.

First, when the determination result of step c50 is false, that is, the stop symbol of the left symbol display LED (L) does not match the stop symbol of the right symbol display LED (R),
When there is no probability of occurrence of a hit (hereinafter, referred to as a case other than reach), the CPU 32 sets a predetermined value to a parameter of thno and tj indicating a switching time of the change speed of the right symbol ( Step c51) Change the value of the display index ic relating to the middle symbol so that the symbol corresponding to the internal processing index of the middle symbol storage register r2c is displayed at the time of the fluctuation stop time ti of the middle symbol display LED (C). (Step c52), the change speed of the middle symbol display LED (C) is switched from the high speed change to the medium speed change (Step c53), and the change state storage flag Fb is set to 7 (Step c54), and the process of this cycle is performed. To end.

Medium symbol display LED (C) medium speed fluctuation time t
Since the value of h-tg = A and the value of the low speed fluctuation time ti-th = B of the middle symbol display LED (C) are fixed, the middle symbol display LE at the time of the fluctuation stop time ti of the middle symbol display LED (C).
The setting change value of the display index ic can be obtained based only on the information of the display index r2c of the symbol to be displayed in D (C). According to the processing timing of the embodiment, when switching from the high-speed fluctuation to the medium-speed fluctuation, the current value of the display index ic is three symbols longer than the display index r2c of the symbol to be displayed on the middle symbol display LED (C) when the fluctuation is stopped. By changing the value of ic so that it becomes the previous display index, r
2c can be obtained.

When the result of the determination in step c50 becomes true, that is, the stop symbol of the left symbol display LED (L) matches the stop symbol of the right symbol display LED (R) (hereinafter referred to as "reach"). If the required condition of the winning symbol combination is satisfied, the CPU 32 changes the current value of the display index ic for the medium symbol to a specific value 0 (step c55), and then selects the parameters tk to tl. Is set.

That is, when the stop symbol of the left symbol display LED (L) matches the stop symbol of the right symbol display LED (R), the variation is made based on the selection condition file in the ROM 30 as shown in Table 4. Display index r of the symbol to be displayed when stopped
The variation time C corresponding to 2c is selected, tg + C is set as the parameter tk, and a predetermined constant value is added to the value of the parameter tk to set the value of the parameter tl (step c56).

[0092]

[Table 4] Therefore, the display index r2c of the symbol to be displayed when the fluctuation stops.
Is 0, 9.792 s is selected from Table 4 as the variation time C, and the value of the parameter tk is tg +
If C = 16.896s, and the value of the display index r2c of the symbol to be displayed when the fluctuation is stopped is 18,
19.008 s is selected as the fluctuation time C, and the value of the parameter tk is tg + C = 26.112 s.

The CPU 32 switches the fluctuation speed of the middle symbol display LED (C) from the high-speed fluctuation to the low-speed fluctuation (step c57), sets 10 to the fluctuation state storage flag Fb (step c58), and executes the processing of this cycle. To end.

That is, the speed change of the fluctuation speed of the middle symbol display LED (C) is different between the case of reach and the case other than the reach, and in the case of other than reach, the middle speed change is performed and then the low speed change is performed. In the case of the reach, only the low speed fluctuation is performed without performing the medium speed fluctuation.

The processing in step c55 is performed by setting the fluctuation time at the middle speed and the low speed to be constant as in the processing shown in step c18, step c34, and step c52, the value of the symbol display index r2c to be displayed when the fluctuation is stopped. Instead of resetting the value of the display index ic at the start of the low-speed fluctuation, the display index i at the start of the low-speed fluctuation
The value of c is set to a specific value, and the low-speed fluctuation time is set in accordance with the value of the display index r2c of the symbol to be displayed when the fluctuation is stopped.

As shown in Table 4, which variable display time is selected and set is determined by the display index r2 indicating the stop symbol.
As the value of the display index r2c, which is determined by the value of c and indicates the stop symbol, increases simply during the variable display time as the value of the display index r2c increases. For example, if the value of the display index r2c is 0, the medium symbol display L
If the value of the display index r2c is 18, the symbol display of the middle symbol display LED (C) is made approximately twice, but the display index r2c is displayed on the player's side.
Since it is not possible to recognize the current value of the symbol and it is not possible to know whether the symbol display makes one round or two rounds, it is very difficult to simply estimate the stop symbol by observing the length of the fluctuation time Have difficulty.

Note that the values of the fluctuation time shown in Table 4 are examples based on the processing timing of the embodiment, and do not limit the fluctuation time and the like.

Hereinafter, in cases other than reach, step c54
The processing operation of the CPU 32 until the symbol determination of the left, right, and middle three symbols when the variable state storage flag Fb is set to 7 in the process of (1) will be described.

As a result, in the processing after the next cycle, step c1, step c10, step c21, step c
26, step c31, step c37, step c4
After the execution of the determination processing in step c47 and step c59, the CPU 32 proceeds to step c60, and thereafter, the elapsed time T after the start of the variable display reaches the set value th according to the current value 7 of the variable state storage flag Fb. Until step c1, step c10, step c21, step c
26, step c31, step c37, step c4
2, the determination processing of step c47 and steps c59 to c60 and the processing of step c61 relating to the medium speed fluctuation of the middle symbol display LED (C) are repeatedly executed at a predetermined processing cycle.

During the repeated execution of the symbol variation process, the elapsed time T after the start of the variation display is set to the set value t.
When h is reached (step c60), the CPU 32 switches the fluctuation speed of the middle symbol display LED (C) from the medium speed fluctuation to the low speed fluctuation (step c62), and sets 8 to the fluctuation state storage flag Fb (step c63). ), The process of this cycle ends.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 8, so that the CPU 32 executes step c1,
After executing the discriminating processes of Step c10, Step c21, Step c26, Step c31, Step c37, Step c42, Step c47, Step c59, and Step c64, the process proceeds to Step c65, and thereafter, according to the current value 8 of the fluctuation state storage flag Fb. Steps c1 and c1 until the elapsed time T after the start of the variable display reaches the set value ti.
Step c10, step c21, step c26, step c31, step c37, step c42, step c47, step c59, step c64 to step c65, and the middle symbol display LED (C)
The processing of step c66 relating to the low-speed fluctuation is repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value ti in the determination processing of step c65, the CP
U32 stops the low speed fluctuation of the middle symbol display LED (C) (step c67), sets 9 to the fluctuation state storage flag Fb (step c68), and ends the processing of this cycle. When the low-speed fluctuation of the middle symbol display LED (C) is stopped, the symbol corresponding to the index stored in the middle symbol storage register r2c is statically displayed on the middle symbol display LED (C). . Further, even when normal display control is hindered by the influence of external noise or the like, the display index ic
The relationship between the value of and the middle symbol is always ensured.

Then, the CPU 32, which has finished displaying the fluctuation of all the symbols, sets the value of the fluctuation state storage flag Fb to 9 in the processing after the next cycle.
10, step c21, step c26, step c3
1, Step c37, Step c42, Step c4
7, the process proceeds to steps c69 to c70 after execution of the discriminating processes of step c59 and step c64, and thereafter, the elapsed time T after the start of the variable display reaches the set value tj according to the current value 9 of the variable state storage flag Fb. Until step c1, step c10, step c21, step c26, step c31, step c37, step c
42, step c47, step c59, step c6
4 and the determination processing of steps c69 to c70 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tj in the determination processing of step c70, the CP
U32 is whether or not the current value of the display index il of the left symbol display LED (L) matches the current value of the display index ir of the right symbol display LED (R), that is, the finally displayed left. Stop symbol and right symbol display LED of symbol display LED (L)
Whether or not the stop symbol of (R) matches (step c)
71) and the display index i of the left symbol display LED (L)
Whether the current value of l and the current value of the display index ic of the middle symbol display LED (C) match, that is, the finally displayed left symbol display LED (L) stopped symbol and the middle symbol display L
It is determined whether or not the stop symbol of the ED (C) and the stop symbol of the right symbol display LED (R) all match (step c72). Various data required for the opening operation processing of the one winning device 3 will be set.

As described above, even in cases other than the reach in the processing of step c54, symbols are determined in the processing of steps c71 and c72.

As described above, in the processing of step c54, the CPU 32 determines the symbol variation of the middle symbol display LED (C) and the symbol determination of the left, right, and middle symbols in cases other than the reach in which the variation state storage flag Fb is set to 7. CPU 3 to reach
The processing operation 2 has been described.

Next, in the process of step c58, the CPU 32 determines the symbol variation of the middle symbol display LED (C) and the symbol judgment of the left, right and middle symbols in the case of the reach in which the variation state storage flag Fb is set to 10. CPU 32 to reach
Will be described. That is, this is a case where the determination result is determined to be true in the determination processing in step c50, and the stop symbol of the left symbol display LED (L) matches the stop symbol of the right symbol display LED (R).

In this case, since the value of the variable state storage flag Fb is 10, in the processing after the next cycle, steps c1,
After executing the determination processes of step c10, step c21, step c26, step c31, step c37, step c42, step c47, step c59, step c64, step c69, and step c84, the CPU 3
2 proceeds to step c85, and thereafter, in accordance with the current value 10 of the fluctuation state storage flag Fb, until the elapsed time T after the start of the fluctuation display reaches the set value tk, steps c1, step c10, step c21, The determination processing of step c26, step c31, step c37, step c42, step c47, step c59, step c64, step c69, and steps c84 to c85, and the processing of step c86 regarding the low-speed fluctuation of the middle symbol display LED (C) are performed. It is repeatedly executed in a predetermined processing cycle.

In this manner, the elapsed time T after the start of the fluctuation display is set to the set value t while the fluctuation processing of each symbol is repeatedly executed.
When it is detected in step c85 that the number k has been reached, the CPU 32 stops the low-speed fluctuation of the middle symbol display LED (C) (step c87), and the fluctuation state storage flag Fb
Is set to 11 (step c88), and the process in this cycle is ended. When the low-speed fluctuation of the middle symbol display LED (C) is stopped, the symbol corresponding to the index stored in the middle symbol storage register r2c is statically displayed on the middle symbol display LED (C). . Further, even when normal display control is disturbed by the influence of external noise or the like, the relationship between the value of the display index ic and the middle symbol is always ensured.

Then, the CPU 32, which has finished displaying the fluctuations of all the symbols, sets the value of the fluctuation state storage flag Fb to 11 in the processing after the next cycle, so that step c1, step c10, step c21, step c26, step c
31, step c37, step c42, step c4
7, Step c59, Step c64, Step c6
9. After execution of the determination process in step c84, the process proceeds to step c89, and thereafter, in accordance with the current value 11 of the variable state storage flag Fb, until the elapsed time T after the start of variable display reaches the set value tl, step c1 is performed. , Step c10, Step c21, Step c26, Step c31, Step c37, Step c42, Step c47, Step c
59, step c64, step c69, step c8
4 and step c89 are repeatedly executed in a predetermined processing cycle.

When the elapsed time T reaches the set value tl in the determination processing of step c89, the CP
U32 is whether or not the current value of the display index il of the left symbol display LED (L) matches the current value of the display index ir of the right symbol display LED (R), that is, the finally displayed left. Stop symbol and right symbol display LED of symbol display LED (L)
Whether or not the stop symbol of (R) matches (step c)
71) and the display index i of the left symbol display LED (L)
Whether the current value of l and the current value of the display index ic of the middle symbol display LED (C) match, that is, the finally displayed left symbol display LED (L) stopped symbol and the middle symbol display L
It is determined whether or not the stop symbol of the ED (C) and the stop symbol of the right symbol display LED (R) all match (step c72). Various data required for the opening operation processing of the one winning device 3 will be set.

As described above, in the process of step c58, the CPU 32 changes the symbol of the middle symbol display LED (C) and determines the symbols of the left, right and middle symbols in the case of the reach in which the variation state storage flag Fb is set to 10. CPU32
Has been described.

Next, first, when the determination result of step c71 or step c72 is false, that is, the stop symbol of the left symbol display LED (L) matches the stop symbol of the middle symbol display LED (C). If not, CPU3
2 judges whether or not the passage to the gate 10 is stored. By the processing of step c14, the storage of the gate passage before the CPU 32 performs the processing of the task 3 has been shifted from the storage state identification flag F1 to the storage state identification flag F0, so that the value of the storage state identification flag F0 is 1 It is determined whether or not there is (step c73).

If the passing signal to the gate 10 is not stored, the value of the storage state discrimination flag F0 is 0, so that the CPU 32 sets the state storage flag Fa to 0 and initializes it (step c74). State storage flag Fb
Is set to 0 to initialize (step C75), and the processing in this cycle ends.

If the passage signal to the gate 10 is stored, the CPU 32 sets 3 to the state storage flag Fa (step c76), sets a predetermined value to the parameter t0 (step c80), and sets the timer T Is operated to measure the elapse of the standby time T relating to the start of symbol fluctuation (step c81), and it is determined whether or not the standby time T has reached the set value t0 (step c82). If T has not reached the set value t0, the processing in this cycle ends. In the embodiment. The value of the set value t0 is set to 0.504 seconds.

In the processing for shifting to the next cycle, the state storage flag F
Since the value of a is 3, the CPU 32 proceeds to step c.
1, Step c2, Step c3 and Step c81
Is repeatedly executed until the standby time T reaches the set value t0.

When it is detected in step c82 that the standby time T has reached the set value t0, CP
U32 sets the state storage flag Fa to 0 and initializes it (step c83), initializes the value of the regulation flag fa to 0 (step c84), and ends the processing of this cycle.

On the other hand, when both the determination results of step c71 and step c72 become true, that is, the stop symbol of the left symbol display LED (L) and the right symbol display LED
When the stop symbol of (R) and the stop symbol of the middle symbol display LED (C) are all the same, that is, in the case of a hit, the CPU 32 initializes the value of the fluctuation state storage flag Fb (step c7).
7), 2 is set to the state storage flag Fa (step 7)
8), operating time flag f relating to opening of first prize device 3
Initialization is performed by setting t to 0 (step c79), and execution of the processing of task 4 is permitted.

The probability of occurrence of a hit in the embodiment is a value obtained by dividing the range of the set value corresponding to the hit by the range of the random number storage register RAN1 for hit determination. In this example, the number of set values corresponding to the hit Is only the specific value 7 and the possible value of the hit determination random number storage register RAN1 is 0 to 2
Since it is an integer of 99, the probability of hit is 1/30
0 (0.666 / 200). Therefore, a mechanical rotary drum type symbol display device which has three rotary drums which represent each symbol shown in Tables 1 to 3 and which is set as a combination of symbols when three identical symbols are arranged. It does not match the probability of occurrence 10/2736 (0.730 / 200). Further, the probability of hitting can be arbitrarily controlled by changing the value of the comparison value used in the determination process of step a2 or setting the value of the comparison value used in the determination process of step c15 as an area. be able to.

The processing of task 4 shown in FIGS. 18 to 19 relates to the opening operation processing of the first winning device 3.

The first winning device 3 is, as shown in FIG.
If the left, right, and middle symbols match in the processing of task 3 and are determined to be a hit, the opening is performed for 5.800 seconds after the elapse of 6.004 seconds after the symbol determination, and the first operation is performed during the opening operation. When the total number of game balls that have won the first prize device 3 is detected by the prize ball detection switch SW2, seven or more game balls are detected.

When the state storage flag Fa is set to 2 in the processing of step c78 of task 3, the CPU 32
Moves to step d2 after executing the determination processing in step d1, and first detects whether or not the opening operation of the first winning device 3 is possible by determining whether 1 or 2 is set in the operation time flag ft. When the state storage flag Fa is other than 2, the processing of the task 4 is substantially not executed.

If the value of the operating time flag ft is 1, the standby closing operation is being performed until the opening of the first winning device 3 is started. If the value of the operating time flag ft is 2, the first winning device 3 is set. Is being executed, and it is impossible to start a new opening operation of the first winning device 3 in any case. If the operation time flag ft is a value other than 1 and 2,
Since the opening operation of the first winning device 3 or the standby closed state is not being executed, the opening operation of the first winning device 3 can be started. In the initial stage, the operation time flag ft is set to 0 in the processing of the task 3. In this case, the CPU
32 is a predetermined value tm to tn for the parameter P
Is set (step d4), and 1 is set in the operation time flag ft.
Is set (step d5), the number-of-acquired-balls storage counter C 'for obtaining seven is set to 0 (step d6), and the timer Ta is operated to determine the elapsed time Ta until the opening of the first winning device 3 is started. The measurement is started (step d7).

In the processing after the next cycle, since the operation time flag ft is already set to 1, the CPU 3
In step 2, after execution of the determination process in step d1, the process proceeds to step d8, and the determination processes in step d1 and steps d2 to d3 are performed at a predetermined processing cycle until the elapsed time Ta in the standby closed state reaches the set value tm. It will be executed repeatedly.

When it is detected in step d8 that the elapsed time Ta before the opening of the first prize device 3 has reached the set value tm, the CPU 32 determines that the first prize device 3 is open.
A drive command is output to the solenoid drive circuit 35 to open the first winning device opening solenoid SOL1 to open the first winning device 3 (step d9), and the operation time flag ft is set to 2 (step d9). Step d5), the processing in this cycle ends.

In the processing after the next cycle, the operation time flag f
Since 2 is set to t, the CPU 32 proceeds to step d11 after executing the determination processing of step d1, step d2, and step d3, and proceeds to the open state elapsed time Ta.
Until reaches the set value tn, the discriminating process of step d1, step d2, step d3, and step d11 and the opening operation command of the first winning device 3 are output (step d12), and the first winning ball detection switch SW1 is output. By reading the incoming ball detection signal, it is determined whether or not there is an incoming ball (step d13). If it is determined that there is an incoming ball, the value of the incoming ball number storage counter C 'is incremented (step d14). ), It is determined whether or not the number of balls entering the first prize device 3 has reached the set value 7 (step d15).
If the number of balls entered into is within the range of the set value 7, step d
1. The determination processing of step d2, step d3, and step d11 and the processing of steps d12 to d15 are repeatedly executed at a predetermined processing cycle.

If it is determined in the determination process at step d15 that the number of balls entering the first prize device 3 has reached the set value 7, the elapsed time Ta of the opening operation has reached the predetermined time tn. The first prize device 3 is closed at least if the elapsed time Ta of the opening operation has reached the set value tn in the determination process of step d11. Becomes

That is, a drive stop command is output to the solenoid drive circuit 35 to release the excitation of the first winning device opening solenoid SOL1 and close the first winning device 3 (step d1).
6), the entry number storage counter C 'is set to 0 for initialization (step d17), the operation time flag ft is set to 0 for initialization (step d18), and then the CPU 32
Determines whether the passage to the gate 10 is stored. By the processing of step c14 of task 3, the CP
The storage of the gate passage before U32 performs the processing of task 3 is performed based on the storage state identification flag F1 based on the storage state identification flag F1.
Since it has been shifted to 0, it is determined whether or not the value of the storage state identification flag F0 is 1 (step d19).

If the pass signal to the gate 10 is not stored, the value of the storage state discrimination flag F0 is 0, so that the CPU 32 sets the state storage flag Fa to 0 and initializes it (step d20). The flag fa is set to 0 for initialization (step d21), and the processing in this cycle ends.

If the passing signal to the gate 10 is stored, the CPU 32 sets 3 to the state storage flag Fa (step d22), sets a predetermined value to the parameter t0 (step d23), and sets the timer T Is operated to measure the elapse of the standby time T relating to the start of symbol fluctuation (step d24), and the processing in this cycle is ended.

As a result, the value of the state storage flag Fa becomes 3, so that in the next cycle, the determination result of the step d1 is false, and the processing of the task 4 is practically not performed. Since it is determined to be false in the determination process of c3 and the process proceeds to step c82, the processes of step c82 and thereafter are performed according to the value of the state storage flag fa and the set value t0. The value of the set value t0 is set to 0.504 seconds as in the case of the task 3.

The processing of the task 5 shown in FIGS. 20 to 21 relates to the opening / closing operation processing of the second winning device 6.

The game balls that have won the first prize device 3 during the opening operation of the first prize device 3 fall into the prize ball storing and discharging device 4 and are temporarily stored in the ball guiding path 41. , Into the receiving hole 28 provided in the rotating body 5, discharged from the ball passage 9, and detected by the second winning device operation switch SW 3, which is the operation switch of the second winning device 6.

The second winning device 6 is opened and closed by a signal detected by the second winning device operation switch SW3.
As shown in FIG. 26, the opening / closing operation time is set to 29.5 seconds, and opening for 1.1 seconds is performed five times. Even if the signal is detected by the second winning device operation switch SW3, the opening and closing operation is not started again after the opening and closing operation is completed.

First, the CPU 32 detects whether or not a new opening / closing operation of the second winning device 6 is possible based on whether or not 0 is set in the new state identification flag fb (step e).
1). When the new state identification flag fb is other than 0, the opening operation of the second winning device 6 is being executed or the closed state is continuing, and when not new, the opening operation of the second winning device 6 is being executed. In this case, 1 is set in the state flag Ft, 2 is set in the case where the closed state is continued, and 0 is set in the initial stage.

When the new state identification flag fb is 0, the CP
U32 is determined to be true in the determination processing of step e1, determines whether or not a signal is detected by the second winning device activation switch SW3 (step e2). If no signal is detected, the task 5 is substantially performed. Is not executed.

In the determination process of step e2, when it is determined that the signal from the second winning device operation switch SW3 is detected, the CPU 32 sets the opening number counter D for counting the number of times the second winning device 6 is opened. It is set to 0 and initialized (step e3), and the new state identification flag fb is set.
Is set to 1 to switch to a non-new state (step e4).

Next, the CPU 32 determines whether or not the value of the status flag Ft is 1 or 2 (step e).
5 to step e6). If the value of the new state identification flag fb is not 0 in the determination processing of step e1,
Move to 5. If it is determined that the value of the state flag Ft is 1, the process proceeds to the opening operation elapsed time determination processing of step e13. If it is determined that the value of the state flag Ft is 2, the processing proceeds to step e20. The process proceeds to a closed state elapsed time determination process.

At the initial stage, the value of the state flag Ft is 0.
Therefore, the CPU 32 sets a predetermined value A to a parameter t1 defining the execution time of the opening operation (step e7), sets 1 to a state flag Ft (step e8), and obtains a second winning. In order to open the device 6, a drive command is output to the solenoid drive circuit 35 and the second
The second prize device 6 is opened by exciting the prize device opening / closing solenoid SOL2 (step e9), the value of the release counter D is incremented (step e10), and a preset number is calculated to calculate the remaining number of release times. The value of the number-of-openings counter D is subtracted from the value of the number-of-openings 5 and stored in the number-of-openings-remaining display register E (step e11), and the number-of-openings display LED1 provided on the front of the second winning device 6
5, the value of the number-of-openings-remaining-number display register E is numerically displayed (step e12), the timer Tb is operated, the elapsed time of the opening operation is measured (step e13), and the processing of this cycle is ended in the next cycle. After the processing, since the value of the new state identification flag fb is 1 and the value of the state flag Ft is 1, the CPU 32 proceeds to the determination processing of step e14 after the determination processing of steps e1 and e5,
Hereinafter, steps e1, step e5, and step e1 are performed until the elapsed time Tb after the opening operation of the second winning device 6 reaches the set value t1 according to the value of the state flag Ft.
The determination process of No. 4 and the process related to the opening operation of the second winning device 6 are repeatedly executed at a predetermined processing cycle (step e15).

Then, in the determination processing of step e14, the second
When it is detected that the elapsed time Tb after the opening operation of the winning device 6 has reached the set value t1, the CPU 32 sets the second time.
In order to close the winning device 6, the solenoid drive circuit 35
To stop the second prize device opening / closing solenoid SOL2 to close the second prize device 6 (step e16), and determine whether the value of the open counter D reaches the set value 5. (Step e1)
7), the number-of-openings counter D is determined in the determination processing of step e17.
Is determined not to have reached the set value 5, a predetermined value B that defines the closed state continuation time after the closing of the second winning device 6 is set in the parameter t2 (step e18). The state flag Ft is set to 2 (step e19), and the timer Tb is operated to measure the elapsed time Tb of the closed state after the closing of the second winning device 6 (step e2).
0), the process in this cycle ends.

In the processing after the next cycle, the value of the new state identification flag fb is 2 and the value of the state flag Ft is 2, so that the CPU 32 executes step e1 and step e.
After the determination process of step 5 and step e6, the process proceeds to the determination process of step e20. Thereafter, according to the value 2 of the state flag Ft, until the elapsed time Tb of the closing continuation after the closing of the second winning device 6 reaches the set value t2. During step e1, step e
5, the processing relating to the determination processing of step e6 and step e21 is repeatedly executed at a predetermined processing cycle.

Then, in the determination processing of step e21, the second
When it is detected that the elapsed time Tb after the execution of the closing of the winning device 6 has reached the set value t2, the CPU 32 sets the status flag Ft to 0 and initializes the second winning device 6 to open it again. (Step e22), the processing in this cycle ends.

In the processing in the next cycle, the value of the state flag Ft is 0 and the value of the new state identification flag fb is 1, so that the CPU 32 determines in steps e1, e5 and e6. After the process, the process proceeds to step e7, in which a predetermined value A is set again in the parameter t1 (step e7), 1 is set in the state flag Ft (step e8), and the second winning device 6 is opened. Will be performed.

In the determination process of step e16, the CPU 32 determines in step e1 until it is determined that the value of the number-of-opening times counter D for counting the number of times of opening of the second winning device 6 has reached the set value 5. Step e5 is performed by cyclically switching the processing and the values 0, 1, and 2 of the state flag Ft.
The processing from step e22 to the opening and closing operation of the second winning device 6 is repeated at a predetermined processing cycle.

If it is determined in step e17 that the value of the number-of-openings counter D has reached the set value 5, the CPU 32 sets the value of the number-of-openings counter D to 0 and initializes it (step e17). e23), set the status flag Ft to 0 to initialize (step e2)
4) The value of the new state identification flag fb is set to 0 to initialize (step e25), and the processing in this cycle is ended.

In the processing of task 5, if the processing is new in step e1, the new state identification flag fb
Is zero, the process proceeds to the signal detection determination process from the second winning device activation switch SW3 in step e2, but after the determination process in step e2, the value of the new state identification flag fb is switched to 1 in the process in step e4. Therefore, from the processing after the next cycle, the value of the number-of-opens counter D reaches the set value 5 in the processing of step e16, and the process proceeds to step e25 until the value of the new state identification flag fb is set to 0 and initialization is performed. Does not shift to the signal detection process of step e2.

That is, from the start of the opening and closing operation of the second winning device 6 to the time when the number of times the opening is performed reaches the predetermined number of five times, the ball passing port 9 of the winning ball storing / discharging device 4 is closed. Even if a winning ball is ejected, the CPU 32 does not determine the detection signal, so that the opening and closing operation of the second winning device 6 is not started again.

When there are a plurality of stored prize balls in the ball guiding path 41 of the prize ball storage / discharge device 4, the stored first prize ball is discharged from the ball passage 9 and the second prize device. The second winning device operation switch SW which is the operation switch of No. 6
3 to 30 seconds depending on the rotation speed of the rotating body 5 while the second winning ball stored is detected by the second winning device operation switch SW3, while the second winning device 6 is detected. Is set to 29.5 seconds from the start to the end of the opening / closing operation of the prize ball, normally, a plurality of prize balls stored in the ball guide path 41 of the prize ball storage / discharge device 4 are displayed. For each of them, the CPU 32 performs signal detection determination processing from the second prize device operation switch SW3. Therefore, if the five opening and closing operations of the second prize device 6 are one prize operation, the second prize device 6 One winning operation is performed a number of times corresponding to a plurality of winning balls stored in the ball guiding path 41. For example, when there are seven winning balls stored in the ball guiding path 41, the second winning device 6
Seven winning operations, that is, 35 opening / closing operations are performed.

The processing of the task 5 is executed substantially in parallel with the symbol variation processing of the task 3 and the opening operation processing of the first winning device 3 of the task 4, and the opening and closing operation of the second winning device 6 is performed. In some cases, the symbol change display of the symbol display unit 2 by the task 3 or the opening operation of the first winning device 3 by the task 4 may be performed.

The processing of task 6 shown in FIG.
This is related to the opening operation processing of the right ordinary electric accessory 7,8.

A game ball that has won the second prize device 6 during the opening / closing operation of the second prize device 6 is detected by the second prize ball detection switch SW4 disposed in the second prize device 6. The left and right ordinary electric accessories 7, 8 are opened by a signal detected by the second winning ball detection switch SW4, and the opening operation time is set to 5.8 seconds as shown in FIG. Even if a game ball newly wins in the second winning device 6 during the operation of the left and right ordinary motorized characters 7, 8 and a signal is detected by the second winning ball detection switch SW4, after the opening operation is completed, it is again performed. Does not perform the opening operation.

First, the CPU 32 detects whether or not the opening operation of the left and right ordinary electric accessories 7, 8 is possible based on whether or not 0 is set in the state identification flag fc (step e).
1). When the state identification flag fc is other than 0, the opening operation of the left and right ordinary electric accessories 7, 8 is being executed, and the state identification flag fc is set to 1.
Is set.

When the state identification flag fc is 0, the CPU 3
2 is determined to be true in the determination processing of step f1, and it is determined whether a signal is detected by the second winning ball detection switch SW4 (step f2). If no signal is detected, the task 6 is substantially performed. Is not executed.

In the determination process of step f2, when it is determined that the signal from the second winning ball detection switch SW4 has been detected, the CPU 32 sets 1 to the state identification flag fc and sets the initial open state to the open state. (Step f3).

The CPU 32 sets a predetermined value to a parameter t3 which defines the execution time of the opening operation (step f4), and sends a signal to the solenoid drive circuit 35 in order to open the left and right ordinary electric accessories 7,8. Output the drive command,
The solenoids SOL3 and SOL4 for opening the right normal electric accessory are energized to open the left and right ordinary electric accessories 7, 8 (step f5), and the timer Tc is operated (step f5).
6) Measure the elapsed time Tc of the opening operation (step f)
7), end the processing of this cycle In the processing of the next cycle and thereafter, since the value of the state identification flag fc is 1, the CPU 32 proceeds to the determination processing of step f7 after the determination processing of step f1, and According to the value of the state identification flag fc, until the elapsed time Tc after the opening operation of the left and right ordinary electric accessories 7, 8 reaches the set value t3, the discriminating process of step f1 and step f7 and step The processing related to the opening operation of the left and right ordinary electric accessories 7, 8 in f8 is repeatedly executed at a predetermined processing cycle.

The elapsed time Tc after execution of the opening operation of the left and right ordinary electric accessories 7, 8 in the discriminating process of step f7.
Has reached the set value t3, the CPU 32
Outputs a drive stop command to the solenoid drive circuit 35 in order to close the left and right ordinary electric accessory 7, 8 to release the excitation of the left and right ordinary electric accessory opening solenoids SOL3, SOL4, The right ordinary electric accessories 7 and 8 are closed (step f9), the value of the state identification flag fc is set to 0 and initialized (step f10), and the process of this cycle ends.

In the process of the task 6, if the value of the state identification flag fc is 0 in the initial stage of the process of the step f1, the process proceeds to the signal detection determination process from the second winning ball detection switch SW4 of the step f2. However, since the value of the state identification flag fc is switched to 1 in the processing of step f3 after the determination processing of step f2, the elapsed time Tc after the execution of the opening operation in the processing of step f7 from the processing of the next cycle is set to the set value t3. Does not proceed to the signal detection process of step f2 until the process proceeds to step f10 and the value of the state identification flag fc is set to 0 and initialization is performed.

In other words, during the period from the start of the opening operation of the left and right ordinary electric accessories 7, 8 until the time when the opening is performed reaches a predetermined time of 5.8 seconds, the second winning device. Since the CPU 32 does not discriminate the detection signal even if the game ball wins at 6, the opening operation of the left and right ordinary electric auditors 7, 8 is performed again after the opening operation of the left and right ordinary electric auditors 7, 8 is completed. Will not be started.

The processing of the task 6 is executed substantially in parallel with the symbol variation processing of the task 3, the opening operation processing of the first winning apparatus 3 of the task 4, and the opening / closing operation processing of the second winning apparatus 6 of the task 5. During the opening operation of the left and right ordinary electric accessories 7, 8, the symbol change display of the symbol display unit 2 by the task 3, or the opening operation of the first winning device 3 by the task 4, or the first operation by the task 5, The opening and closing operation of the two-prize winning device 6 may be performed.

In the game board 1, when a game is started and a game ball passes through the gate 10, in the processing of the task 1 by the CPU 32, an unused fixed random number storage register Ri is hit by a detection signal from the symbol operation switch SW1. The current value of the determination random number storage register RAN1 is stored, and each time the passage to the gate 10 is detected, the storage state identification flag Fi is set based on the value of the search index i.

Then, in the process of task 2, the CPU 32 creates a combination of symbols in accordance with the current value of the hit determination memory register RAN1.
When the combination of the stopped symbols is determined to be a hit by performing the variable display of the symbols, the first winning device 3 is opened and driven in the processing of the task 4. While the first prize device 3 is open for 5.8 seconds, several game balls win the first prize port 3 ',
The first winning device 3 finishes the opening operation.

During this time, the game balls that have won the first winning opening 3 ′ fall into the winning ball storing and discharging device 4, and the ball guiding path 41
After being temporarily stored therein, it enters the receiving hole 28 provided in the rotating body 5, is discharged from the ball passage 9, and is a second prize device operation switch SW 3 which is an operation switch of the second prize device 6. Is detected by

The CPU 32 executes the task 5 to
When the detection signal is detected by the second winning device operation switch SW3, the opening and closing operation of the second winning device 6 is performed for 29.5 seconds. Then, if a game ball wins in the second winning device 6 during the opening and closing operation of the second winning device 6, the CPU 32 opens the left and right ordinary motorized characters 7, 8 by the processing of the task 6.

A plurality of prize balls stored in the ball guide path 41 of the prize ball storage / discharge device 4 are sequentially discharged from the prize ball storage / discharge device 4 by the rotator 5 every 30 seconds.
Since there is a difference of 0.5 second between the signal detection cycle of the second winning device operation switch SW3 and the opening / closing operation time of the second winning device 6, signal detection is determined by the CPU 32 and the opening / closing operation of the second winning device 6 is performed. Is done again.

Therefore, it appears to the player as if the opening and closing operation of the second winning device 6 is being performed continuously.

On the other hand, in parallel with the processing of task 5 by the CPU 32, if the first prize device 3 finishes the opening operation and there is a memory of passing through the gate, after 0.504 seconds, the CPU
At 32, the symbol is changed and displayed by the task 3 again.

The processes of tasks 1 to 6 are executed repeatedly in parallel by the CPU 32 every predetermined processing cycle (on the order of μs) in response to a signal from the clock / reset circuit 36.

Accordingly, the player can change the symbol display on the symbol display sections 11, 12, and 13 in the symbol display unit 2, open and close the second winning device 6, and operate the left and right ordinary electric accessories 7,8. The opening operation is visually recognized on the game board 1 at the same time.

[0169]

According to the first aspect of the present invention , a winning ball is provided.
Accepts the balls stored in the winning ball storage section behind the storage section
Rotating body that receives one at the position and discharges at the discharge position
The device itself can be moved vertically or horizontally.
The size of the device itself
To make the game more compact and
In addition to making the installation space small,
The reservoir is made of a transparent material and receives a prize ball.
The ball entrance to be inserted, and it is bent into a substantially S-shape communicating with the ball entrance
The formed ball taxiway and the penetration formed at the end of the ball taxiway
With holes, the size of the prize ball storage area is also reduced.
When the rotating body takes a position other than the receiving position
By closing the through hole, the
Several pachinko balls are sequentially arranged in a substantially S-shaped ball guideway
Can be lined up, so that the ball in the waiting state
Easy to check the number and discharge from winning ball storage and discharge device
The number of actuations of the second prize device that operates based on the ball played
It can be easily confirmed.

According to the configuration of the second aspect, the second input
Opportunity for hitting a ball into the first prize device that activates the prize device
Sets the condition for terminating the operation of the first winning device from the start of operation.
Number of balls won after a fixed period of time and since the start of operation
If the number reaches the specified number, one of the conditions
At the time when the ball was hit into the first prize device
As an opportunity, if the condition favorable to the player is only during the predetermined time
The number of balls won from the start of operation is not predetermined
In order to end when the number has been reached, the player
You can balance profits.

[Brief description of the drawings]

FIG. 1 is a front view showing a game board of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is a perspective view showing a winning ball storing and discharging device according to the embodiment.

FIG. 3 is a main block diagram showing a control unit of the pachinko machine of the embodiment.

FIG. 4 is a flowchart showing a part of processing by a CPU provided in the pachinko machine of the embodiment;

FIG. 5 is a continuation of the flowchart of FIG. 4;

FIG. 6 is a flowchart showing a part of processing by a CPU provided in the pachinko machine of the embodiment;

7 is a continuation of the flowchart of FIG. 6;

FIG. 8 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

9 is a continuation of the flowchart of FIG. 8;

10 is a continuation of the flowchart of FIG. 9;

FIG. 11 is a continuation of the flowchart of FIG. 10;

FIG. 12 is a continuation of the flowchart of FIG. 11;

FIG. 13 is a continuation of the flowchart of FIG. 12;

14 is a continuation of the flowchart of FIG.

FIG. 15 is a continuation of the flowchart of FIG. 14;

16 is a continuation of the flowchart of FIG.

17 is a continuation of the flowchart of FIG.

FIG. 18 is a flowchart showing a part of processing by the CPU provided in the pachinko machine of the embodiment;

FIG. 19 is a continuation of the flowchart of FIG. 18;

FIG. 20 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

FIG. 21 is a continuation of the flowchart of FIG. 19;

FIG. 22 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine of the embodiment;

FIG. 23 is an operation principle diagram showing a storage operation of a fixed random number storage register Ri in the embodiment.

FIG. 24 is a timing chart showing a symbol changing process in the symbol display unit of the pachinko machine of the embodiment.

FIG. 25 is a timing chart showing an opening operation process in the first winning device of the pachinko machine of the embodiment.

FIG. 26 is a timing chart showing an opening / closing operation process in the second winning device of the pachinko machine of the embodiment.

FIG. 27 is a timing chart showing the opening operation processing of the left and right ordinary electric accessories of the pachinko machine of the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Game board 2 Symbol display unit 3 1st prize device 3 '1st prize port 4 prize ball storage / discharge device 5 Rotating body 6 2nd prize device 7 Left middle ordinary electric accessory 8 Right middle ordinary electric accessory 9 Ball passage port DESCRIPTION OF SYMBOLS 10 Gate 11 Left symbol display part 12 Right symbol display part 13 Middle symbol display part 14 Gate passage memory number display LED 15 Number of times of opening LED 16 Tulip type ordinary character 17 Lower left winning opening 18 Lower right winning opening 19 Natural winning opening 20 Windmill 21 Return rubber 22 Out ball receiving port 23 Ball guiding rail 24 Winning ball storage section 25 Winning ball discharge section 26 Winning ball inlet 27 Through hole 28 Receiving hole 29 Rotating body drive motor 30 ROM 31 RAM 32 CPU 33 Switch detecting section 34 LED display circuit 35 Solenoid drive circuit 36 Clock reset circuit 39 Bottom part 40 Rotation axis 41 Ball guideway 42 Lower end 43 Leasing 44 Center 45 Wearing piece 46 Winning ball 47 Inner wall 48 Back 49 Front 50 Indicator light A 51 Indicator light B 52 Indicator light C 53 Indicator light D SW1 Symbol operation switch SW2 First winning ball detection switch SW3 Second prize device operation switch SW4 Second winning ball detection switch (L) Left symbol display LED (R) Right symbol display LED (C) Middle symbol display LED SOL1 First prize device opening solenoid SOL2 Second prize device opening / closing solenoid SOL3 Left ordinary motorized object opening solenoid SOL4 Right ordinary electric accessory release solenoid

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) A63F 7/02

Claims (2)

(57) [Claims] (1)A first prize device on the game board surface,
To the first prize device and to the first prize device.
Winning prize balls that temporarily store the winning prize balls and then discharge them one by one
Ball storage / discharge device and the prize ball storage / discharge device.
A second prize device that operates based on the thrown ball.
In pachinko machines, The winning ball storage and discharge device includes a winning ball storage unit and the winning ball.
The prize ball storage unit is disposed behind the prize ball storage unit.
Receiving one ball at the receiving position and discharging at the discharging position
And a rotating body for discharging, The winning ball storage section is made of a transparent material,
A ball entrance that accepts filled prize balls and communicates with the ball entrance
A ball guide path bent and formed in a substantially S-shape;
And a through hole formed at the end of
When taking a position other than the position,
Thus, a plurality of winning balls are sequentially stored in the ball guiding path and stored.
A pachinko gaming machine characterized by being retained. 2. The game board has a symbol display means on a surface thereof.
The first prize device is provided with a detecting means for detecting a ball having entered.
The display result due to the symbol change of the symbol display means is a specific
In the case of the display mode, the first winning device is operated to
Convert a ball from unacceptable to acceptable
The condition for ending the operation of the first prize device is as follows:
When a predetermined time has elapsed since the start of operation and after the start of operation
Any of the conditions when the number of balls won
The claim is characterized by the fact that the matter was concluded earlier
Item 7. A pachinko gaming machine according to item 1.